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1 /*
2  * (C) Copyright 2009
3  * Marvell Semiconductor <www.marvell.com>
4  * Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * (C) Copyright 2009
7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8  *
9  * (C) Copyright 2011-2012
10  * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
11  * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
12  *
13  * See file CREDITS for list of people who contributed to this
14  * project.
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License as
18  * published by the Free Software Foundation; either version 2 of
19  * the License, or (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
29  * MA 02110-1301 USA
30  */
31
32 /*
33  * for linking errors see
34  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
35  */
36
37 #ifndef _CONFIG_KM_KIRKWOOD_H
38 #define _CONFIG_KM_KIRKWOOD_H
39
40 /* KM_KIRKWOOD */
41 #if defined(CONFIG_KM_KIRKWOOD)
42 #define CONFIG_IDENT_STRING             "\nKeymile Kirkwood"
43 #define CONFIG_HOSTNAME                 km_kirkwood
44 #define CONFIG_KM_DISABLE_PCIE
45 #define KM_IVM_BUS                      "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
46
47 /* KM_KIRKWOOD_PCI */
48 #elif defined(CONFIG_KM_KIRKWOOD_PCI)
49 #define CONFIG_IDENT_STRING             "\nKeymile Kirkwood PCI"
50 #define CONFIG_HOSTNAME                 km_kirkwood_pci
51 #define KM_IVM_BUS                      "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
52 #define CONFIG_KM_FPGA_CONFIG
53
54 /* KM_NUSA */
55 #elif defined(CONFIG_KM_NUSA)
56 #define KM_IVM_BUS                      "pca9547:70:9"  /* I2C2 (Mux-Port 1)*/
57 #define CONFIG_IDENT_STRING             "\nKeymile NUSA"
58 #define CONFIG_HOSTNAME                 kmnusa
59 #undef CONFIG_SYS_KWD_CONFIG
60 #define CONFIG_SYS_KWD_CONFIG \
61                 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
62 #define CONFIG_KM_ENV_IS_IN_SPI_NOR
63 #define CONFIG_KM_FPGA_CONFIG
64 #define CONFIG_KM_PIGGY4_88E6352
65 #define CONFIG_MV88E6352_SWITCH
66 #define CONFIG_KM_MVEXTSW_ADDR          0x10
67
68 /* KM_MGCOGE3UN */
69 #elif defined(CONFIG_KM_MGCOGE3UN)
70 #define CONFIG_IDENT_STRING             "\nKeymile COGE3UN"
71 #define CONFIG_HOSTNAME                 mgcoge3un
72 #define KM_IVM_BUS                      "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
73 #undef CONFIG_SYS_KWD_CONFIG
74 #define CONFIG_SYS_KWD_CONFIG \
75                 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
76 #define CONFIG_KM_BOARD_EXTRA_ENV       "waitforne=true\0"
77 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET  3
78 #define CONFIG_KM_DISABLE_PCIE
79 #define CONFIG_KM_PIGGY4_88E6061
80
81 /* KMCOGE5UN */
82 #elif defined(CONFIG_KM_COGE5UN)
83 #define CONFIG_IDENT_STRING             "\nKeymile COGE5UN"
84 #define KM_IVM_BUS                      "pca9547:70:9"  /* I2C2 (Mux-Port 1)*/
85 #undef  CONFIG_SYS_KWD_CONFIG
86 #define CONFIG_SYS_KWD_CONFIG \
87                 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
88 #define CONFIG_KM_ENV_IS_IN_SPI_NOR
89 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET  3
90 #define CONFIG_HOSTNAME                 kmcoge5un
91 #define CONFIG_KM_DISABLE_PCIE
92 #define CONFIG_KM_PIGGY4_88E6352
93
94 /* KM_PORTL2 */
95 #elif defined(CONFIG_KM_PORTL2)
96 #define CONFIG_IDENT_STRING             "\nKeymile Port-L2"
97 #define CONFIG_HOSTNAME                 portl2
98 #define KM_IVM_BUS                      "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
99 #define CONFIG_KM_PIGGY4_88E6061
100
101 #else
102 #error ("Board unsupported")
103 #endif
104
105 /* include common defines/options for all arm based Keymile boards */
106 #include "km/km_arm.h"
107
108 #ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR
109 #define KM_ENV_BUS      "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
110 #endif
111
112 #if defined(CONFIG_KM_PIGGY4_88E6352)
113 /*
114  * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
115  * an Marvell 88E6352 simple switch.
116  * In this case we have to change the default settings for the etherent mac.
117  * There is NO ethernet phy. The ARM and Switch are conencted directly over
118  * RGMII in MAC-MAC mode
119  * In this case 1GBit full duplex and autoneg off
120  */
121 #define PORT_SERIAL_CONTROL_VALUE               ( \
122         MVGBE_FORCE_LINK_PASS                       | \
123         MVGBE_DIS_AUTO_NEG_FOR_DUPLX            | \
124         MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL        | \
125         MVGBE_ADV_NO_FLOW_CTRL                      | \
126         MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX     | \
127         MVGBE_FORCE_BP_MODE_NO_JAM                  | \
128         (1 << 9) /* Reserved bit has to be 1 */ | \
129         MVGBE_DO_NOT_FORCE_LINK_FAIL            | \
130         MVGBE_DIS_AUTO_NEG_SPEED_GMII           | \
131         MVGBE_DTE_ADV_0                                 | \
132         MVGBE_MIIPHY_MAC_MODE                       | \
133         MVGBE_AUTO_NEG_NO_CHANGE                    | \
134         MVGBE_MAX_RX_PACKET_1552BYTE            | \
135         MVGBE_CLR_EXT_LOOPBACK                      | \
136         MVGBE_SET_FULL_DUPLEX_MODE                  | \
137         MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
138         MVGBE_SET_GMII_SPEED_TO_1000        |\
139         MVGBE_SET_MII_SPEED_TO_100)
140
141 #endif
142
143 #ifdef CONFIG_KM_PIGGY4_88E6061
144 /*
145  * Some keymile boards like mgcoge3un have their PIGGY4 connected via
146  * an Marvell 88E6061 simple switch.
147  * In this case we have to change the default settings for the
148  * ethernet phy connected to the kirkwood.
149  * In this case 100MB full duplex and autoneg off
150  */
151 #define PORT_SERIAL_CONTROL_VALUE               ( \
152         MVGBE_FORCE_LINK_PASS                   | \
153         MVGBE_DIS_AUTO_NEG_FOR_DUPLX            | \
154         MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL        | \
155         MVGBE_ADV_NO_FLOW_CTRL                  | \
156         MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX     | \
157         MVGBE_FORCE_BP_MODE_NO_JAM              | \
158         (1 << 9) /* Reserved bit has to be 1 */ | \
159         MVGBE_DO_NOT_FORCE_LINK_FAIL            | \
160         MVGBE_DIS_AUTO_NEG_SPEED_GMII           | \
161         MVGBE_DTE_ADV_0                         | \
162         MVGBE_MIIPHY_MAC_MODE                   | \
163         MVGBE_AUTO_NEG_NO_CHANGE                | \
164         MVGBE_MAX_RX_PACKET_1552BYTE            | \
165         MVGBE_CLR_EXT_LOOPBACK                  | \
166         MVGBE_SET_FULL_DUPLEX_MODE              | \
167         MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX        |\
168         MVGBE_SET_GMII_SPEED_TO_10_100  |\
169         MVGBE_SET_MII_SPEED_TO_100)
170 #endif
171
172 #ifdef CONFIG_KM_DISABLE_PCI
173 #undef  CONFIG_KIRKWOOD_PCIE_INIT
174 #endif
175
176
177 #endif /* _CONFIG_KM_KIRKWOOD */