include/configs/omap3_overo.h

   1 /*
   2  * Configuration settings for the Gumstix Overo board.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17  * MA 02111-1307 USA
  18  */
  19
  20 #ifndef __CONFIG_H
  21 #define __CONFIG_H
  22
  23 /*
  24  * High Level Configuration Options
  25  */
  26 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  27 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  28 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  29 #define CONFIG_OMAP3_OVERO      1       /* working with overo */
  30
  31 #define CONFIG_SDRC     /* The chip has SDRC controller */
  32
  33 #include <asm/arch/cpu.h>       /* get chip and board defs */
  34 #include <asm/arch/omap3.h>
  35
  36 /*
  37  * Display CPU and Board information
  38  */
  39 #define CONFIG_DISPLAY_CPUINFO          1
  40 #define CONFIG_DISPLAY_BOARDINFO        1
  41
  42 /* Clock Defines */
  43 #define V_OSCK                  26000000        /* Clock output from T2 */
  44 #define V_SCLK                  (V_OSCK >> 1)
  45
  46 #undef CONFIG_USE_IRQ           /* no support for IRQs */
  47 #define CONFIG_MISC_INIT_R
  48
  49 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  50 #define CONFIG_SETUP_MEMORY_TAGS        1
  51 #define CONFIG_INITRD_TAG               1
  52 #define CONFIG_REVISION_TAG             1
  53
  54 #define CONFIG_OF_LIBFDT                1
  55
  56 /*
  57  * Size of malloc() pool
  58  */
  59 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  60                                                 /* Sector */
  61 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  62
  63 /*
  64  * Hardware drivers
  65  */
  66
  67 /*
  68  * NS16550 Configuration
  69  */
  70 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  71
  72 #define CONFIG_SYS_NS16550
  73 #define CONFIG_SYS_NS16550_SERIAL
  74 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  75 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  76
  77 /*
  78  * select serial console configuration
  79  */
  80 #define CONFIG_CONS_INDEX               3
  81 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  82 #define CONFIG_SERIAL3                  3
  83
  84 /* allow to overwrite serial and ethaddr */
  85 #define CONFIG_ENV_OVERWRITE
  86 #define CONFIG_BAUDRATE                 115200
  87 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
  88                                         115200}
  89 #define CONFIG_GENERIC_MMC              1
  90 #define CONFIG_MMC                      1
  91 #define CONFIG_OMAP_HSMMC               1
  92 #define CONFIG_DOS_PARTITION            1
  93
  94 /* DDR - I use Micron DDR */
  95 #define CONFIG_OMAP3_MICRON_DDR         1
  96
  97 /* commands to include */
  98 #include <config_cmd_default.h>
  99
 100 #define CONFIG_CMD_CACHE
 101 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 102 #define CONFIG_CMD_FAT          /* FAT support                  */
 103 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 104
 105 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 106 #define CONFIG_CMD_MMC          /* MMC support                  */
 107 #define CONFIG_CMD_NAND         /* NAND support                 */
 108
 109 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 110 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 111 #undef CONFIG_CMD_IMI           /* iminfo                       */
 112 #undef CONFIG_CMD_IMLS          /* List all found images        */
 113 #undef CONFIG_CMD_NFS           /* NFS support                  */
 114 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 115
 116 #define CONFIG_SYS_NO_FLASH
 117 #define CONFIG_HARD_I2C                 1
 118 #define CONFIG_SYS_I2C_SPEED            100000
 119 #define CONFIG_SYS_I2C_SLAVE            1
 120 #define CONFIG_SYS_I2C_BUS              0
 121 #define CONFIG_SYS_I2C_BUS_SELECT       1
 122 #define CONFIG_I2C_MULTI_BUS            1
 123 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 124
 125 /*
 126  * TWL4030
 127  */
 128 #define CONFIG_TWL4030_POWER            1
 129 #define CONFIG_TWL4030_LED              1
 130
 131 /*
 132  * Board NAND Info.
 133  */
 134 #define CONFIG_SYS_NAND_QUIET_TEST      1
 135 #define CONFIG_NAND_OMAP_GPMC
 136 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 137                                                         /* to access nand */
 138 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 139                                                         /* to access nand */
 140                                                         /* at CS0 */
 141 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 142
 143 #define CONFIG_SYS_MAX_NAND_DEVICE      1       /* Max number of NAND */
 144                                                 /* devices */
 145 #define CONFIG_JFFS2_NAND
 146 /* nand device jffs2 lives on */
 147 #define CONFIG_JFFS2_DEV                "nand0"
 148 /* start of jffs2 partition */
 149 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 150 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 151                                                         /* partition */
 152
 153 /* Environment information */
 154 #define CONFIG_BOOTDELAY                5
 155
 156 #define CONFIG_EXTRA_ENV_SETTINGS \
 157         "loadaddr=0x82000000\0" \
 158         "console=ttyS2,115200n8\0" \
 159         "mpurate=500\0" \
 160         "vram=12M\0" \
 161         "dvimode=1024x768MR-16@60\0" \
 162         "defaultdisplay=dvi\0" \
 163         "mmcdev=0\0" \
 164         "mmcroot=/dev/mmcblk0p2 rw\0" \
 165         "mmcrootfstype=ext3 rootwait\0" \
 166         "nandroot=/dev/mtdblock4 rw\0" \
 167         "nandrootfstype=jffs2\0" \
 168         "mmcargs=setenv bootargs console=${console} " \
 169                 "mpurate=${mpurate} " \
 170                 "vram=${vram} " \
 171                 "omapfb.mode=dvi:${dvimode} " \
 172                 "omapdss.def_disp=${defaultdisplay} " \
 173                 "root=${mmcroot} " \
 174                 "rootfstype=${mmcrootfstype}\0" \
 175         "nandargs=setenv bootargs console=${console} " \
 176                 "mpurate=${mpurate} " \
 177                 "vram=${vram} " \
 178                 "omapfb.mode=dvi:${dvimode} " \
 179                 "omapdss.def_disp=${defaultdisplay} " \
 180                 "root=${nandroot} " \
 181                 "rootfstype=${nandrootfstype}\0" \
 182         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 183         "bootscript=echo Running bootscript from mmc ...; " \
 184                 "source ${loadaddr}\0" \
 185         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 186         "mmcboot=echo Booting from mmc ...; " \
 187                 "run mmcargs; " \
 188                 "bootm ${loadaddr}\0" \
 189         "nandboot=echo Booting from nand ...; " \
 190                 "run nandargs; " \
 191                 "nand read ${loadaddr} 280000 400000; " \
 192                 "bootm ${loadaddr}\0" \
 193
 194 #define CONFIG_BOOTCOMMAND \
 195         "if mmc rescan ${mmcdev}; then " \
 196                 "if run loadbootscript; then " \
 197                         "run bootscript; " \
 198                 "else " \
 199                         "if run loaduimage; then " \
 200                                 "run mmcboot; " \
 201                         "else run nandboot; " \
 202                         "fi; " \
 203                 "fi; " \
 204         "else run nandboot; fi"
 205
 206 #define CONFIG_AUTO_COMPLETE    1
 207 /*
 208  * Miscellaneous configurable options
 209  */
 210 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 211 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 212 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 213 #define CONFIG_SYS_PROMPT               "Overo # "
 214 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 215 /* Print Buffer Size */
 216 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 217                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 218 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 219                                                 /* args */
 220 /* Boot Argument Buffer Size */
 221 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 222 /* memtest works on */
 223 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 224 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 225                                         0x01F00000) /* 31MB */
 226
 227 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 228                                                                 /* address */
 229 /*
 230  * OMAP3 has 12 GP timers, they can be driven by the system clock
 231  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 232  * This rate is divided by a local divisor.
 233  */
 234 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 235 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 236 #define CONFIG_SYS_HZ                   1000
 237
 238 /*-----------------------------------------------------------------------
 239  * Stack sizes
 240  *
 241  * The stack sizes are set up in start.S using the settings below
 242  */
 243 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 244 #ifdef CONFIG_USE_IRQ
 245 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 246 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 247 #endif
 248
 249 /*-----------------------------------------------------------------------
 250  * Physical Memory Map
 251  */
 252 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 253 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 254 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 255 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 256
 257 /* SDRAM Bank Allocation method */
 258 #define SDRC_R_B_C              1
 259
 260 /*-----------------------------------------------------------------------
 261  * FLASH and environment organization
 262  */
 263
 264 /* **** PISMO SUPPORT *** */
 265
 266 /* Configure the PISMO */
 267 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 268 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 269
 270 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 271
 272 #if defined(CONFIG_CMD_NAND)
 273 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 274 #endif
 275
 276 /* Monitor at start of flash */
 277 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 278 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 279
 280 #define CONFIG_ENV_IS_IN_NAND           1
 281 #define ONENAND_ENV_OFFSET              0x240000 /* environment starts here */
 282 #define SMNAND_ENV_OFFSET               0x240000 /* environment starts here */
 283
 284 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 285 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 286 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 287
 288 #if defined(CONFIG_CMD_NET)
 289 /*----------------------------------------------------------------------------
 290  * SMSC9211 Ethernet from SMSC9118 family
 291  *----------------------------------------------------------------------------
 292  */
 293
 294 #define CONFIG_NET_MULTI
 295 #define CONFIG_SMC911X          1
 296 #define CONFIG_SMC911X_32_BIT
 297 #define CONFIG_SMC911X_BASE     0x2C000000
 298
 299 #endif /* (CONFIG_CMD_NET) */
 300
 301 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 302 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 303 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 304 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 305                                          CONFIG_SYS_INIT_RAM_SIZE - \
 306                                          GENERATED_GBL_DATA_SIZE)
 307
 308 #endif                          /* __CONFIG_H */