include/configs/omap3_overo.h

   1 /*
   2  * Configuration settings for the Gumstix Overo board.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __CONFIG_H
   8 #define __CONFIG_H
   9
  10 /*
  11  * High Level Configuration Options
  12  */
  13 #define CONFIG_OMAP                             /* in a TI OMAP core */
  14 #define CONFIG_OMAP34XX                         /* which is a 34XX */
  15 #define CONFIG_OMAP3_OVERO                      /* working with overo */
  16 #define CONFIG_OMAP_GPIO
  17
  18 #define CONFIG_SDRC                             /* The chip has SDRC controller */
  19
  20 #include <asm/arch/cpu.h>                       /* get chip and board defs */
  21 #include <asm/arch/omap3.h>
  22
  23 /*
  24  * Display CPU and Board information
  25  */
  26 #define CONFIG_DISPLAY_CPUINFO
  27 #define CONFIG_DISPLAY_BOARDINFO
  28
  29 /* Clock Defines */
  30 #define V_OSCK                  26000000        /* Clock output from T2 */
  31 #define V_SCLK                  (V_OSCK >> 1)
  32
  33 #define CONFIG_MISC_INIT_R
  34
  35 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  36 #define CONFIG_SETUP_MEMORY_TAGS
  37 #define CONFIG_INITRD_TAG
  38 #define CONFIG_REVISION_TAG
  39
  40 #define CONFIG_OF_LIBFDT
  41
  42 /*
  43  * Size of malloc() pool
  44  */
  45 #define CONFIG_ENV_SIZE         (128 << 10)     /* 128 KiB */
  46                                                 /* Sector */
  47 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + (128 << 10))
  48
  49 /*
  50  * Hardware drivers
  51  */
  52
  53 /*
  54  * NS16550 Configuration
  55  */
  56 #define V_NS16550_CLK           48000000        /* 48MHz (APLL96/2) */
  57
  58 #define CONFIG_SYS_NS16550
  59 #define CONFIG_SYS_NS16550_SERIAL
  60 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  61 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  62
  63 /*
  64  * select serial console configuration
  65  */
  66 #define CONFIG_CONS_INDEX               3
  67 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  68 #define CONFIG_SERIAL3                  3
  69
  70 /* allow to overwrite serial and ethaddr */
  71 #define CONFIG_ENV_OVERWRITE
  72 #define CONFIG_BAUDRATE                 115200
  73 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
  74                                         115200}
  75 #define CONFIG_GENERIC_MMC
  76 #define CONFIG_MMC
  77 #define CONFIG_OMAP_HSMMC
  78 #define CONFIG_DOS_PARTITION
  79
  80 /* commands to include */
  81 #include <config_cmd_default.h>
  82
  83 #define CONFIG_CMD_CACHE
  84 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
  85 #define CONFIG_CMD_FAT          /* FAT support                  */
  86 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
  87
  88 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
  89 #define CONFIG_CMD_MMC          /* MMC support                  */
  90 #define CONFIG_CMD_NAND         /* NAND support                 */
  91
  92 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
  93 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
  94 #undef CONFIG_CMD_IMI           /* iminfo                       */
  95 #undef CONFIG_CMD_IMLS          /* List all found images        */
  96 #undef CONFIG_CMD_NFS           /* NFS support                  */
  97 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
  98
  99 #define CONFIG_SYS_NO_FLASH
 100 #define CONFIG_HARD_I2C
 101 #define CONFIG_SYS_I2C_SPEED            100000
 102 #define CONFIG_SYS_I2C_SLAVE            1
 103 #define CONFIG_I2C_MULTI_BUS
 104 #define CONFIG_DRIVER_OMAP34XX_I2C
 105
 106 /*
 107  * TWL4030
 108  */
 109 #define CONFIG_TWL4030_POWER
 110 #define CONFIG_TWL4030_LED
 111
 112 /*
 113  * Board NAND Info.
 114  */
 115 #define CONFIG_SYS_NAND_QUIET_TEST
 116 #define CONFIG_NAND_OMAP_GPMC
 117 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 118                                                         /* to access nand */
 119 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 120                                                         /* to access nand */
 121                                                         /* at CS0 */
 122 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 123
 124 #define CONFIG_SYS_MAX_NAND_DEVICE      1       /* Max number of NAND */
 125                                                 /* devices */
 126 #define CONFIG_JFFS2_NAND
 127 /* nand device jffs2 lives on */
 128 #define CONFIG_JFFS2_DEV                "nand0"
 129 /* start of jffs2 partition */
 130 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 131 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 132                                                         /* partition */
 133
 134 /* Environment information */
 135 #define CONFIG_BOOTDELAY                5
 136
 137 #define CONFIG_EXTRA_ENV_SETTINGS \
 138         "loadaddr=0x82000000\0" \
 139         "console=ttyO2,115200n8\0" \
 140         "mpurate=500\0" \
 141         "optargs=\0" \
 142         "vram=12M\0" \
 143         "dvimode=1024x768MR-16@60\0" \
 144         "defaultdisplay=dvi\0" \
 145         "mmcdev=0\0" \
 146         "mmcroot=/dev/mmcblk0p2 rw\0" \
 147         "mmcrootfstype=ext3 rootwait\0" \
 148         "nandroot=ubi0:rootfs ubi.mtd=4\0" \
 149         "nandrootfstype=ubifs\0" \
 150         "mmcargs=setenv bootargs console=${console} " \
 151                 "${optargs} " \
 152                 "mpurate=${mpurate} " \
 153                 "vram=${vram} " \
 154                 "omapfb.mode=dvi:${dvimode} " \
 155                 "omapdss.def_disp=${defaultdisplay} " \
 156                 "root=${mmcroot} " \
 157                 "rootfstype=${mmcrootfstype}\0" \
 158         "nandargs=setenv bootargs console=${console} " \
 159                 "${optargs} " \
 160                 "mpurate=${mpurate} " \
 161                 "vram=${vram} " \
 162                 "omapfb.mode=dvi:${dvimode} " \
 163                 "omapdss.def_disp=${defaultdisplay} " \
 164                 "root=${nandroot} " \
 165                 "rootfstype=${nandrootfstype}\0" \
 166         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 167         "bootscript=echo Running bootscript from mmc ...; " \
 168                 "source ${loadaddr}\0" \
 169         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 170         "mmcboot=echo Booting from mmc ...; " \
 171                 "run mmcargs; " \
 172                 "bootm ${loadaddr}\0" \
 173         "nandboot=echo Booting from nand ...; " \
 174                 "run nandargs; " \
 175                 "nand read ${loadaddr} 280000 400000; " \
 176                 "bootm ${loadaddr}\0" \
 177
 178 #define CONFIG_BOOTCOMMAND \
 179         "mmc dev ${mmcdev}; if mmc rescan; then " \
 180                 "if run loadbootscript; then " \
 181                         "run bootscript; " \
 182                 "else " \
 183                         "if run loaduimage; then " \
 184                                 "run mmcboot; " \
 185                         "else run nandboot; " \
 186                         "fi; " \
 187                 "fi; " \
 188         "else run nandboot; fi"
 189
 190 #define CONFIG_AUTO_COMPLETE    1
 191 /*
 192  * Miscellaneous configurable options
 193  */
 194 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 195 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 196 #define CONFIG_SYS_PROMPT               "Overo # "
 197 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 198 /* Print Buffer Size */
 199 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 200                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 201 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 202                                                 /* args */
 203 /* Boot Argument Buffer Size */
 204 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 205 /* memtest works on */
 206 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 207 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 208                                         0x01F00000) /* 31MB */
 209
 210 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 211                                                                 /* address */
 212 /*
 213  * OMAP3 has 12 GP timers, they can be driven by the system clock
 214  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 215  * This rate is divided by a local divisor.
 216  */
 217 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 218 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 219 #define CONFIG_SYS_HZ                   1000
 220
 221 /*-----------------------------------------------------------------------
 222  * Physical Memory Map
 223  */
 224 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 225 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 226 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 227
 228 /*-----------------------------------------------------------------------
 229  * FLASH and environment organization
 230  */
 231
 232 /* **** PISMO SUPPORT *** */
 233
 234 /* Configure the PISMO */
 235 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 236 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 237
 238 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 239
 240 #if defined(CONFIG_CMD_NAND)
 241 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 242 #endif
 243
 244 /* Monitor at start of flash */
 245 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 246 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 247
 248 #define CONFIG_ENV_IS_IN_NAND
 249 #define ONENAND_ENV_OFFSET              0x240000 /* environment starts here */
 250 #define SMNAND_ENV_OFFSET               0x240000 /* environment starts here */
 251
 252 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 253 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 254 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 255
 256 #if defined(CONFIG_CMD_NET)
 257 /*----------------------------------------------------------------------------
 258  * SMSC9211 Ethernet from SMSC9118 family
 259  *----------------------------------------------------------------------------
 260  */
 261
 262 #define CONFIG_SMC911X
 263 #define CONFIG_SMC911X_32_BIT
 264 #define CONFIG_SMC911X_BASE             0x2C000000
 265
 266 #endif /* (CONFIG_CMD_NET) */
 267
 268 /*
 269  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
 270  * and older u-boot.bin with the new U-Boot SPL.
 271  */
 272 #define CONFIG_SYS_TEXT_BASE            0x80008000
 273 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 274 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 275 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 276 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 277                                          CONFIG_SYS_INIT_RAM_SIZE - \
 278                                          GENERATED_GBL_DATA_SIZE)
 279
 280 #define CONFIG_SYS_CACHELINE_SIZE       64
 281
 282 /* Defines for SPL */
 283 #define CONFIG_SPL
 284 #define CONFIG_SPL_FRAMEWORK
 285 #define CONFIG_SPL_NAND_SIMPLE
 286 #define CONFIG_SPL_TEXT_BASE            0x40200800
 287 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 288 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 289
 290 /* move malloc and bss high to prevent clashing with the main image */
 291 #define CONFIG_SYS_SPL_MALLOC_START     0x87000000
 292 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 293 #define CONFIG_SPL_BSS_START_ADDR       0x87080000      /* end of minimum RAM */
 294 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 295
 296 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 297 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 298 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
 299 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
 300
 301 #define CONFIG_SPL_BOARD_INIT
 302 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 303 #define CONFIG_SPL_LIBDISK_SUPPORT
 304 #define CONFIG_SPL_I2C_SUPPORT
 305 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 306 #define CONFIG_SPL_MMC_SUPPORT
 307 #define CONFIG_SPL_FAT_SUPPORT
 308 #define CONFIG_SPL_SERIAL_SUPPORT
 309 #define CONFIG_SPL_NAND_SUPPORT
 310 #define CONFIG_SPL_NAND_BASE
 311 #define CONFIG_SPL_NAND_DRIVERS
 312 #define CONFIG_SPL_NAND_ECC
 313 #define CONFIG_SPL_GPIO_SUPPORT
 314 #define CONFIG_SPL_POWER_SUPPORT
 315 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 316
 317 /* NAND boot config */
 318 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 319 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 320 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 321 #define CONFIG_SYS_NAND_OOBSIZE         64
 322 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 323 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 324 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 325                                                 10, 11, 12, 13}
 326 #define CONFIG_SYS_NAND_ECCSIZE         512
 327 #define CONFIG_SYS_NAND_ECCBYTES        3
 328 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 329 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 330
 331 #endif                          /* __CONFIG_H */