2 * Configuration settings for the Gumstix Overo board.
4 * SPDX-License-Identifier: GPL-2.0+
11 * High Level Configuration Options
13 #define CONFIG_OMAP /* in a TI OMAP core */
14 #define CONFIG_OMAP34XX /* which is a 34XX */
15 #define CONFIG_OMAP3_OVERO /* working with overo */
16 #define CONFIG_OMAP_GPIO
17 #define CONFIG_OMAP_COMMON
19 #define CONFIG_SDRC /* The chip has SDRC controller */
21 #include <asm/arch/cpu.h> /* get chip and board defs */
22 #include <asm/arch/omap3.h>
25 * Display CPU and Board information
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
31 #define V_OSCK 26000000 /* Clock output from T2 */
32 #define V_SCLK (V_OSCK >> 1)
34 #define CONFIG_MISC_INIT_R
36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
39 #define CONFIG_REVISION_TAG
41 #define CONFIG_OF_LIBFDT
42 #define CONFIG_CMD_BOOTZ
45 * Size of malloc() pool
47 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
49 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
50 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
51 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
58 * NS16550 Configuration
60 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
62 #define CONFIG_SYS_NS16550
63 #define CONFIG_SYS_NS16550_SERIAL
64 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
65 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
68 * select serial console configuration
70 #define CONFIG_CONS_INDEX 3
71 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
72 #define CONFIG_SERIAL3 3
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_BAUDRATE 115200
77 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
79 #define CONFIG_GENERIC_MMC
81 #define CONFIG_OMAP_HSMMC
82 #define CONFIG_DOS_PARTITION
84 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
85 #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
86 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
87 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
88 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
90 /* commands to include */
91 #include <config_cmd_default.h>
93 #define CONFIG_CMD_CACHE
94 #define CONFIG_CMD_EXT2 /* EXT2 Support */
95 #define CONFIG_CMD_FAT /* FAT support */
96 #define CONFIG_CMD_FS_GENERIC
98 #define CONFIG_CMD_I2C /* I2C serial bus support */
99 #define CONFIG_CMD_MMC /* MMC support */
100 #define CONFIG_CMD_NAND /* NAND support */
102 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
103 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
104 #undef CONFIG_CMD_IMI /* iminfo */
105 #undef CONFIG_CMD_IMLS /* List all found images */
106 #undef CONFIG_CMD_NFS /* NFS support */
107 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
109 #ifdef CONFIG_CMD_NAND
111 #define CONFIG_CMD_MTDPARTS /* MTD partition support */
112 #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
113 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
115 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
116 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
118 #define CONFIG_MTD_DEVICE /* required by CONFIG_CMD_MTDPARTS */
119 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
121 /* NAND block size is 128 KiB. Synchronize these values with
122 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
123 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB
124 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
125 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
126 * linux 64 * NAND_BLOCK_SIZE = 8 MiB
129 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
130 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
136 #else /* CONFIG_CMD_NAND */
137 #define MTDPARTS_DEFAULT
138 #endif /* CONFIG_CMD_NAND */
140 #define CONFIG_SYS_NO_FLASH
141 #define CONFIG_SYS_I2C
142 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
143 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
144 #define CONFIG_SYS_I2C_OMAP34XX
149 #define CONFIG_TWL4030_POWER
150 #define CONFIG_TWL4030_LED
155 #define CONFIG_SYS_NAND_QUIET_TEST
156 #define CONFIG_NAND_OMAP_GPMC
157 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
159 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
162 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
164 /* Environment information */
165 #define CONFIG_BOOTDELAY 5
167 #define CONFIG_EXTRA_ENV_SETTINGS \
168 "loadaddr=0x82000000\0" \
169 "dtbaddr=0x81600000\0" \
170 "dtbfile=overo.dtb\0" \
172 "bootfile=zImage\0" \
174 "console=ttyO2,115200n8\0" \
178 "dvimode=1024x768MR-16@60\0" \
179 "defaultdisplay=dvi\0" \
181 "mmcroot=/dev/mmcblk0p2 rw\0" \
182 "mmcrootfstype=ext3 rootwait\0" \
183 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
184 "nandrootfstype=ubifs\0" \
185 "mtdparts=" MTDPARTS_DEFAULT "\0" \
186 "mmcargs=setenv bootargs console=${console} " \
188 "mpurate=${mpurate} " \
190 "omapfb.mode=dvi:${dvimode} " \
191 "omapdss.def_disp=${defaultdisplay} " \
193 "rootfstype=${mmcrootfstype}\0" \
194 "nandargs=setenv bootargs console=${console} " \
196 "mpurate=${mpurate} " \
198 "omapfb.mode=dvi:${dvimode} " \
199 "omapdss.def_disp=${defaultdisplay} " \
200 "root=${nandroot} " \
201 "rootfstype=${nandrootfstype}\0" \
202 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
203 "bootscript=echo Running boot script from mmc ...; " \
204 "source ${loadaddr}\0" \
205 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
206 "importbootenv=echo Importing environment from mmc ...; " \
207 "env import -t ${loadaddr} ${filesize}\0" \
208 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
209 "mmcboot=echo Booting from mmc...; " \
211 "bootm ${loadaddr}\0" \
212 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
213 "loadfdt=load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
214 "mmcbootfdt=echo Booting with DT from mmc ...; " \
216 "bootz ${loadaddr} - ${dtbaddr}\0" \
217 "nandboot=echo Booting from nand ...; " \
219 "nand read ${loadaddr} linux; " \
220 "bootm ${loadaddr}\0" \
222 #define CONFIG_BOOTCOMMAND \
223 "mmc dev ${mmcdev}; if mmc rescan; then " \
224 "if run loadbootscript; then " \
227 "if run loadbootenv; then " \
228 "echo Loaded environment from ${bootenv};" \
229 "run importbootenv;" \
231 "if test -n $uenvcmd; then " \
232 "echo Running uenvcmd ...;" \
235 "if run loaduimage; then " \
238 "if run loadzimage; then " \
239 "if test -n $dtbfile; then " \
240 "if run loadfdt; then " \
248 #define CONFIG_AUTO_COMPLETE 1
250 * Miscellaneous configurable options
252 #define CONFIG_SYS_LONGHELP /* undef to save memory */
253 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
254 #define CONFIG_SYS_PROMPT "Overo # "
255 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
256 /* Print Buffer Size */
257 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
258 sizeof(CONFIG_SYS_PROMPT) + 16)
259 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
261 /* Boot Argument Buffer Size */
262 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
263 /* memtest works on */
264 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
265 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
266 0x01F00000) /* 31MB */
268 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
271 * OMAP3 has 12 GP timers, they can be driven by the system clock
272 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
273 * This rate is divided by a local divisor.
275 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
276 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
278 /*-----------------------------------------------------------------------
279 * Physical Memory Map
281 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
282 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
283 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
285 /*-----------------------------------------------------------------------
286 * FLASH and environment organization
289 /* **** PISMO SUPPORT *** */
291 /* Configure the PISMO */
292 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
293 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
295 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
297 #if defined(CONFIG_CMD_NAND)
298 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
301 /* Monitor at start of flash */
302 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
303 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
305 #define CONFIG_ENV_IS_IN_NAND
306 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
307 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
309 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
310 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
311 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
313 #if defined(CONFIG_CMD_NET)
314 /*----------------------------------------------------------------------------
315 * SMSC9211 Ethernet from SMSC9118 family
316 *----------------------------------------------------------------------------
319 #define CONFIG_SMC911X
320 #define CONFIG_SMC911X_32_BIT
321 #define CONFIG_SMC911X_BASE 0x2C000000
323 #endif /* (CONFIG_CMD_NET) */
326 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
327 * and older u-boot.bin with the new U-Boot SPL.
329 #define CONFIG_SYS_TEXT_BASE 0x80008000
330 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
331 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
332 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
333 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
334 CONFIG_SYS_INIT_RAM_SIZE - \
335 GENERATED_GBL_DATA_SIZE)
337 #define CONFIG_SYS_CACHELINE_SIZE 64
339 /* Defines for SPL */
341 #define CONFIG_SPL_FRAMEWORK
342 #define CONFIG_SPL_NAND_SIMPLE
343 #define CONFIG_SPL_TEXT_BASE 0x40200800
344 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
345 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
347 /* move malloc and bss high to prevent clashing with the main image */
348 #define CONFIG_SYS_SPL_MALLOC_START 0x87000000
349 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
350 #define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */
351 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
353 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
354 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
355 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
356 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
358 #define CONFIG_SPL_BOARD_INIT
359 #define CONFIG_SPL_LIBCOMMON_SUPPORT
360 #define CONFIG_SPL_LIBDISK_SUPPORT
361 #define CONFIG_SPL_I2C_SUPPORT
362 #define CONFIG_SPL_LIBGENERIC_SUPPORT
363 #define CONFIG_SPL_MMC_SUPPORT
364 #define CONFIG_SPL_FAT_SUPPORT
365 #define CONFIG_SPL_SERIAL_SUPPORT
366 #define CONFIG_SPL_NAND_SUPPORT
367 #define CONFIG_SPL_NAND_BASE
368 #define CONFIG_SPL_NAND_DRIVERS
369 #define CONFIG_SPL_NAND_ECC
370 #define CONFIG_SPL_GPIO_SUPPORT
371 #define CONFIG_SPL_POWER_SUPPORT
372 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
374 /* NAND boot config */
375 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
376 #define CONFIG_SYS_NAND_PAGE_COUNT 64
377 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
378 #define CONFIG_SYS_NAND_OOBSIZE 64
379 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
380 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
381 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
383 #define CONFIG_SYS_NAND_ECCSIZE 512
384 #define CONFIG_SYS_NAND_ECCBYTES 3
385 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
386 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
387 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
389 #endif /* __CONFIG_H */