include/configs/pxa255_idp.h

   1 /*
   2  * (C) Copyright 2002
   3  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
   4  *
   5  * (C) Copyright 2002
   6  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   7  * Marius Groeger <mgroeger@sysgo.de>
   8  *
   9  * Copied from lubbock.h
  10  *
  11  * (C) Copyright 2004
  12  * BEC Systems <http://bec-systems.com>
  13  * Cliff Brake <cliff.brake@gmail.com>
  14  * Configuation settings for the Accelent/Vibren PXA255 IDP
  15  *
  16  * See file CREDITS for list of people who contributed to this
  17  * project.
  18  *
  19  * This program is free software; you can redistribute it and/or
  20  * modify it under the terms of the GNU General Public License as
  21  * published by the Free Software Foundation; either version 2 of
  22  * the License, or (at your option) any later version.
  23  *
  24  * This program is distributed in the hope that it will be useful,
  25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27  * GNU General Public License for more details.
  28  *
  29  * You should have received a copy of the GNU General Public License
  30  * along with this program; if not, write to the Free Software
  31  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  32  * MA 02111-1307 USA
  33  */
  34
  35 #ifndef __CONFIG_H
  36 #define __CONFIG_H
  37
  38 #include <asm/arch/pxa-regs.h>
  39
  40 /*
  41  * If we are developing, we might want to start U-Boot from RAM
  42  * so we MUST NOT initialize critical regs like mem-timing ...
  43  */
  44 #undef CONFIG_SKIP_LOWLEVEL_INIT                        /* define for developing */
  45 #undef CONFIG_SKIP_RELOCATE_UBOOT                       /* define for developing */
  46
  47 /*
  48  * define the following to enable debug blinks.  A debug blink function
  49  * must be defined in memsetup.S
  50  */
  51 #undef DEBUG_BLINK_ENABLE
  52 #undef DEBUG_BLINKC_ENABLE
  53
  54 /*
  55  * High Level Configuration Options
  56  * (easy to change)
  57  */
  58 #define CONFIG_PXA250           1       /* This is an PXA250 CPU    */
  59
  60 #undef CONFIG_LCD
  61 #ifdef CONFIG_LCD
  62 #define CONFIG_SHARP_LM8V31
  63 #endif
  64
  65 #define CONFIG_MMC              1
  66 #define CONFIG_DOS_PARTITION    1
  67 #define BOARD_LATE_INIT         1
  68
  69 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  70
  71 /*
  72  * Size of malloc() pool
  73  */
  74 #define CONFIG_SYS_MALLOC_LEN       (CONFIG_ENV_SIZE + 128*1024)
  75 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
  76
  77 /*
  78  * PXA250 IDP memory map information
  79  */
  80
  81 #define IDP_CS5_ETH_OFFSET      0x03400000
  82
  83
  84 /*
  85  * Hardware drivers
  86  */
  87 #define CONFIG_DRIVER_SMC91111
  88 #define CONFIG_SMC91111_BASE    (PXA_CS5_PHYS + IDP_CS5_ETH_OFFSET + 0x300)
  89 #define CONFIG_SMC_USE_32_BIT   1
  90 /* #define CONFIG_SMC_USE_IOFUNCS */
  91
  92 /* the following has to be set high -- suspect something is wrong with
  93  * with the tftp timeout routines. FIXME!!!
  94  */
  95 #define CONFIG_NET_RETRY_COUNT  100
  96
  97 /*
  98  * select serial console configuration
  99  */
 100 #define CONFIG_FFUART          1       /* we use FFUART on LUBBOCK */
 101
 102 /* allow to overwrite serial and ethaddr */
 103 #define CONFIG_ENV_OVERWRITE
 104
 105 #define CONFIG_BAUDRATE         115200
 106
 107
 108 /*
 109  * BOOTP options
 110  */
 111 #define CONFIG_BOOTP_BOOTFILESIZE
 112 #define CONFIG_BOOTP_BOOTPATH
 113 #define CONFIG_BOOTP_GATEWAY
 114 #define CONFIG_BOOTP_HOSTNAME
 115
 116
 117 /*
 118  * Command line configuration.
 119  */
 120 #include <config_cmd_default.h>
 121
 122 #define CONFIG_CMD_FAT
 123 #define CONFIG_CMD_DHCP
 124
 125 #define CONFIG_BOOTDELAY        3
 126 #define CONFIG_BOOTCOMMAND      "bootm 40000"
 127 #define CONFIG_BOOTARGS         "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
 128
 129 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
 130 #define CONFIG_SETUP_MEMORY_TAGS        1
 131 /* #define CONFIG_INITRD_TAG            1 */
 132
 133 /*
 134  * Current memory map for Vibren supplied Linux images:
 135  *
 136  * Flash:
 137  * 0 - 0x3ffff (size = 0x40000): bootloader
 138  * 0x40000 - 0x13ffff (size = 0x100000): kernel
 139  * 0x140000 - 0x1f3ffff (size = 0x1e00000): jffs
 140  *
 141  * RAM:
 142  * 0xa0008000 - kernel is loaded
 143  * 0xa3000000 - Uboot runs (48MB into RAM)
 144  *
 145  */
 146
 147 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 148         "prog_boot_mmc="                                                \
 149                         "mw.b 0xa0000000 0xff 0x40000; "                \
 150                         "if      mmcinit && "                           \
 151                                 "fatload mmc 0 0xa0000000 u-boot.bin; " \
 152                         "then "                                         \
 153                                 "protect off 0x0 0x3ffff; "             \
 154                                 "erase 0x0 0x3ffff; "                   \
 155                                 "cp.b 0xa0000000 0x0 0x40000; "         \
 156                                 "reset;"                                \
 157                         "fi\0"                                          \
 158         "prog_uzImage_mmc="                                             \
 159                         "mw.b 0xa0000000 0xff 0x100000; "               \
 160                         "if      mmcinit && "                           \
 161                                 "fatload mmc 0 0xa0000000 uzImage; "    \
 162                         "then "                                         \
 163                                 "protect off 0x40000 0xfffff; "         \
 164                                 "erase 0x40000 0xfffff; "               \
 165                                 "cp.b 0xa0000000 0x40000 0x100000; "    \
 166                         "fi\0"                                          \
 167         "prog_jffs_mmc="                                                \
 168                         "mw.b 0xa0000000 0xff 0x1e00000; "              \
 169                         "if      mmcinit && "                           \
 170                                 "fatload mmc 0 0xa0000000 root.jffs; "  \
 171                         "then "                                         \
 172                                 "protect off 0x140000 0x1f3ffff; "      \
 173                                 "erase 0x140000 0x1f3ffff; "            \
 174                                 "cp.b 0xa0000000 0x140000 0x1e00000; "  \
 175                         "fi\0"                                          \
 176         "boot_mmc="                                                     \
 177                         "if      mmcinit && "                           \
 178                                 "fatload mmc 0 0xa1000000 uzImage && "  \
 179                         "then "                                         \
 180                                 "bootm 0xa1000000; "                    \
 181                         "fi\0"                                          \
 182         "prog_boot_net="                                                \
 183                         "mw.b 0xa0000000 0xff 0x100000; "               \
 184                         "if      bootp 0xa0000000 u-boot.bin; "         \
 185                         "then "                                         \
 186                                 "protect off 0x0 0x3ffff; "             \
 187                                 "erase 0x0 0x3ffff; "                   \
 188                                 "cp.b 0xa0000000 0x0 0x40000; "         \
 189                                 "reset; "                               \
 190                         "fi\0"                                          \
 191         "prog_uzImage_net="                                             \
 192                         "mw.b 0xa0000000 0xff 0x100000; "               \
 193                         "if      bootp 0xa0000000 uzImage; "            \
 194                         "then "                                         \
 195                                 "protect off 0x40000 0xfffff; "         \
 196                                 "erase 0x40000 0xfffff; "               \
 197                                 "cp.b 0xa0000000 0x40000 0x100000; "    \
 198                         "fi\0"                                          \
 199         "prog_jffs_net="                                                \
 200                         "mw.b 0xa0000000 0xff 0x1e00000; "              \
 201                         "if      bootp 0xa0000000 root.jffs; "          \
 202                         "then "                                         \
 203                                 "protect off 0x140000 0x1f3ffff; "      \
 204                                 "erase 0x140000 0x1f3ffff; "            \
 205                                 "cp.b 0xa0000000 0x140000 0x1e00000; "  \
 206                         "fi\0"
 207
 208
 209 /*      "erase_env="                    */
 210 /*                      "protect off"   */
 211
 212
 213 #if defined(CONFIG_CMD_KGDB)
 214 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
 215 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
 216 #endif
 217
 218 /*
 219  * Miscellaneous configurable options
 220  */
 221 #define CONFIG_SYS_HUSH_PARSER          1
 222 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 223
 224 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 225 #ifdef CONFIG_SYS_HUSH_PARSER
 226 #define CONFIG_SYS_PROMPT               "$ "            /* Monitor Command Prompt */
 227 #else
 228 #define CONFIG_SYS_PROMPT               "=> "           /* Monitor Command Prompt */
 229 #endif
 230 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 231 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 232 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 233 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 234 #define CONFIG_SYS_DEVICE_NULLDEV       1
 235
 236 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on     */
 237 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM   */
 238
 239 #define CONFIG_SYS_LOAD_ADDR            0xa0800000      /* default load address */
 240
 241 #define CONFIG_SYS_HZ                   1000
 242 #define CONFIG_SYS_CPUSPEED             0x161           /* set core clock to 400/200/100 MHz */
 243
 244 #define RTC     1                               /* enable 32KHz osc */
 245
 246                                                 /* valid baudrates */
 247 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 248
 249 #ifdef CONFIG_MMC
 250 #define CONFIG_PXA_MMC
 251 #define CONFIG_CMD_MMC
 252 #define CONFIG_SYS_MMC_BASE             0xF0000000
 253 #endif
 254
 255 /*
 256  * Stack sizes
 257  *
 258  * The stack sizes are set up in start.S using the settings below
 259  */
 260 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 261 #ifdef CONFIG_USE_IRQ
 262 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 263 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 264 #endif
 265
 266 /*
 267  * Physical Memory Map
 268  */
 269 #define CONFIG_NR_DRAM_BANKS    4          /* we have 1 banks of DRAM */
 270 #define PHYS_SDRAM_1            0xa0000000 /* SDRAM Bank #1 */
 271 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
 272 #define PHYS_SDRAM_2            0xa4000000 /* SDRAM Bank #2 */
 273 #define PHYS_SDRAM_2_SIZE       0x00000000 /* 0 MB */
 274 #define PHYS_SDRAM_3            0xa8000000 /* SDRAM Bank #3 */
 275 #define PHYS_SDRAM_3_SIZE       0x00000000 /* 0 MB */
 276 #define PHYS_SDRAM_4            0xac000000 /* SDRAM Bank #4 */
 277 #define PHYS_SDRAM_4_SIZE       0x00000000 /* 0 MB */
 278
 279 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 280 #define PHYS_FLASH_2            0x04000000 /* Flash Bank #2 */
 281 #define PHYS_FLASH_SIZE         0x02000000 /* 32 MB */
 282 #define PHYS_FLASH_BANK_SIZE    0x02000000 /* 32 MB Banks */
 283 #define PHYS_FLASH_SECT_SIZE    0x00040000 /* 256 KB sectors (x2) */
 284
 285 #define CONFIG_SYS_DRAM_BASE            0xa0000000
 286 #define CONFIG_SYS_DRAM_SIZE            0x04000000
 287
 288 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 289
 290 /*
 291  * GPIO settings
 292  */
 293
 294 #define CONFIG_SYS_GAFR0_L_VAL  0x80001005
 295 #define CONFIG_SYS_GAFR0_U_VAL  0xa5128012
 296 #define CONFIG_SYS_GAFR1_L_VAL  0x699a9558
 297 #define CONFIG_SYS_GAFR1_U_VAL  0xaaa5aa6a
 298 #define CONFIG_SYS_GAFR2_L_VAL  0xaaaaaaaa
 299 #define CONFIG_SYS_GAFR2_U_VAL  0x2
 300 #define CONFIG_SYS_GPCR0_VAL    0x1800400
 301 #define CONFIG_SYS_GPCR1_VAL    0x0
 302 #define CONFIG_SYS_GPCR2_VAL    0x0
 303 #define CONFIG_SYS_GPDR0_VAL    0xc1818440
 304 #define CONFIG_SYS_GPDR1_VAL    0xfcffab82
 305 #define CONFIG_SYS_GPDR2_VAL    0x1ffff
 306 #define CONFIG_SYS_GPSR0_VAL    0x8000
 307 #define CONFIG_SYS_GPSR1_VAL    0x3f0002
 308 #define CONFIG_SYS_GPSR2_VAL    0x1c000
 309
 310 #define CONFIG_SYS_PSSR_VAL             0x20
 311
 312 /*
 313  * Memory settings
 314  */
 315 #define CONFIG_SYS_MSC0_VAL             0x29DCA4D2
 316 #define CONFIG_SYS_MSC1_VAL             0x43AC494C
 317 #define CONFIG_SYS_MSC2_VAL             0x39D449D4
 318 #define CONFIG_SYS_MDCNFG_VAL           0x090009C9
 319 #define CONFIG_SYS_MDREFR_VAL           0x0085C017
 320 #define CONFIG_SYS_MDMRS_VAL            0x00220022
 321
 322 /*
 323  * PCMCIA and CF Interfaces
 324  */
 325 #define CONFIG_SYS_MECR_VAL             0x00000003
 326 #define CONFIG_SYS_MCMEM0_VAL           0x00014405
 327 #define CONFIG_SYS_MCMEM1_VAL           0x00014405
 328 #define CONFIG_SYS_MCATT0_VAL           0x00014405
 329 #define CONFIG_SYS_MCATT1_VAL           0x00014405
 330 #define CONFIG_SYS_MCIO0_VAL            0x00014405
 331 #define CONFIG_SYS_MCIO1_VAL            0x00014405
 332
 333 /*
 334  * FLASH and environment organization
 335  */
 336 #define CONFIG_SYS_FLASH_CFI
 337 #define CONFIG_FLASH_CFI_DRIVER 1
 338
 339 #define CONFIG_SYS_MONITOR_BASE 0
 340 #define CONFIG_SYS_MONITOR_LEN          PHYS_FLASH_SECT_SIZE
 341
 342 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 343 #define CONFIG_SYS_MAX_FLASH_SECT       128  /* max number of sectors on one chip    */
 344
 345 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 346
 347 /* timeout values are in ticks */
 348 #define CONFIG_SYS_FLASH_ERASE_TOUT     (25*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 349 #define CONFIG_SYS_FLASH_WRITE_TOUT     (25*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 350
 351 /* put cfg at end of flash for now */
 352 #define CONFIG_ENV_IS_IN_FLASH  1
 353  /* Addr of Environment Sector  */
 354 #define CONFIG_ENV_ADDR         (PHYS_FLASH_1 + PHYS_FLASH_SIZE - 0x40000)
 355 #define CONFIG_ENV_SIZE         PHYS_FLASH_SECT_SIZE    /* Total Size of Environment Sector     */
 356 #define CONFIG_ENV_SECT_SIZE    (PHYS_FLASH_SECT_SIZE / 16)
 357
 358 #endif  /* __CONFIG_H */