include/configs/qong.h

   1 /*
   2  * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
   3  *
   4  * Configuration settings for the Dave/DENX QongEVB-LITE board.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #ifndef __CONFIG_H
  23 #define __CONFIG_H
  24
  25 #include <asm/arch/imx-regs.h>
  26
  27 /* High Level Configuration Options */
  28 #define CONFIG_ARM1136                  /* This is an arm1136 CPU core */
  29 #define CONFIG_MX31                     /* in a mx31 */
  30 #define CONFIG_QONG
  31
  32 #define CONFIG_DISPLAY_CPUINFO
  33 #define CONFIG_DISPLAY_BOARDINFO
  34
  35 #define CONFIG_SYS_TEXT_BASE 0xa0000000
  36
  37 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  38 #define CONFIG_SETUP_MEMORY_TAGS
  39 #define CONFIG_INITRD_TAG
  40
  41 /*
  42  * Size of malloc() pool
  43  */
  44 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1536 * 1024)
  45
  46 /*
  47  * Hardware drivers
  48  */
  49
  50 #define CONFIG_MXC_UART
  51 #define CONFIG_MXC_UART_BASE    UART1_BASE
  52
  53 #define CONFIG_MXC_GPIO
  54 #define CONFIG_HW_WATCHDOG
  55
  56 #define CONFIG_MXC_SPI
  57 #define CONFIG_DEFAULT_SPI_BUS  1
  58 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
  59 #define CONFIG_RTC_MC13XXX
  60
  61 #define CONFIG_POWER
  62 #define CONFIG_POWER_SPI
  63 #define CONFIG_POWER_FSL
  64 #define CONFIG_FSL_PMIC_BUS     1
  65 #define CONFIG_FSL_PMIC_CS      0
  66 #define CONFIG_FSL_PMIC_CLK     100000
  67 #define CONFIG_FSL_PMIC_MODE    (SPI_MODE_0 | SPI_CS_HIGH)
  68 #define CONFIG_FSL_PMIC_BITLEN  32
  69
  70 /* FPGA */
  71 #define CONFIG_FPGA
  72 #define CONFIG_QONG_FPGA
  73 #define CONFIG_FPGA_BASE        (CS1_BASE)
  74 #define CONFIG_FPGA_LATTICE
  75 #define CONFIG_FPGA_COUNT       1
  76
  77 #ifdef CONFIG_QONG_FPGA
  78 /* Ethernet */
  79 #define CONFIG_DNET
  80 #define CONFIG_DNET_BASE        (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
  81
  82 /* Framebuffer and LCD */
  83 #define CONFIG_VIDEO
  84 #define CONFIG_CFB_CONSOLE
  85 #define CONFIG_VIDEO_MX3
  86 #define CONFIG_VIDEO_LOGO
  87 #define CONFIG_VIDEO_SW_CURSOR
  88 #define CONFIG_VGA_AS_SINGLE_DEVICE
  89 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  90 #define CONFIG_SPLASH_SCREEN
  91 #define CONFIG_CMD_BMP
  92 #define CONFIG_BMP_16BPP
  93 #define CONFIG_VIDEO_BMP_GZIP
  94 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (512 << 10)
  95
  96 /* USB */
  97 #define CONFIG_CMD_USB
  98 #ifdef CONFIG_CMD_USB
  99 #define CONFIG_USB_EHCI                 /* Enable EHCI USB support */
 100 #define CONFIG_USB_EHCI_MXC
 101 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 102 #define CONFIG_MXC_USB_PORT     2
 103 #define CONFIG_MXC_USB_PORTSC   (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT)
 104 #define CONFIG_MXC_USB_FLAGS    MXC_EHCI_POWER_PINS_ENABLED
 105 #define CONFIG_EHCI_IS_TDI
 106 #define CONFIG_USB_STORAGE
 107 #define CONFIG_DOS_PARTITION
 108 #define CONFIG_SUPPORT_VFAT
 109 #define CONFIG_CMD_EXT2
 110 #define CONFIG_CMD_FAT
 111 #endif /* CONFIG_CMD_USB */
 112
 113 /*
 114  * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
 115  * initial TFTP transfer, should the user wish one, significantly.
 116  */
 117 #define CONFIG_ARP_TIMEOUT      200UL
 118
 119 #endif /* CONFIG_QONG_FPGA */
 120
 121 #define CONFIG_CONS_INDEX       1
 122 #define CONFIG_BAUDRATE         115200
 123
 124 /***********************************************************
 125  * Command definition
 126  ***********************************************************/
 127
 128 #include <config_cmd_default.h>
 129
 130 #define CONFIG_CMD_CACHE
 131 #define CONFIG_CMD_DATE
 132 #define CONFIG_CMD_DHCP
 133 #define CONFIG_CMD_MII
 134 #define CONFIG_CMD_NAND
 135 #define CONFIG_CMD_NET
 136 #define CONFIG_CMD_PING
 137 #define CONFIG_CMD_SETEXPR
 138 #define CONFIG_CMD_SPI
 139 #define CONFIG_CMD_UNZIP
 140
 141 #define CONFIG_BOARD_LATE_INIT
 142
 143 #define CONFIG_BOOTDELAY        5
 144
 145 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
 146
 147 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 148         "netdev=eth0\0"                                                 \
 149         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 150                 "nfsroot=${serverip}:${rootpath}\0"                     \
 151         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 152         "addip=setenv bootargs ${bootargs} "                            \
 153                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 154                 ":${hostname}:${netdev}:off panic=1\0"                  \
 155         "addtty=setenv bootargs ${bootargs}"                            \
 156                 " console=ttymxc0,${baudrate}\0"                        \
 157         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 158         "addmisc=setenv bootargs ${bootargs}\0"                         \
 159         "uboot_addr=A0000000\0"                                         \
 160         "kernel_addr=A00C0000\0"                                        \
 161         "ramdisk_addr=A0300000\0"                                       \
 162         "u-boot=qong/u-boot.bin\0"                                      \
 163         "kernel_addr_r=80800000\0"                                      \
 164         "hostname=qong\0"                                               \
 165         "bootfile=qong/uImage\0"                                        \
 166         "rootpath=/opt/eldk-4.2-arm/armVFP\0"                           \
 167         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 168                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 169         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 170                 "bootm ${kernel_addr}\0"                                \
 171         "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
 172                 "run nfsargs addip addtty addmtd addmisc;"              \
 173                 "bootm\0"                                               \
 174         "bootcmd=run flash_self\0"                                      \
 175         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 176         "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 177                 " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
 178                 " +${filesize};cp.b ${fileaddr} "                       \
 179                 __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"   \
 180         "upd=run load update\0"                                         \
 181         "videomode=video=ctfb:x:640,y:480,depth:16,mode:0,pclk:40000,"  \
 182                 "le:120,ri:40,up:35,lo:10,hs:30,vs:3,sync:100663296,"   \
 183                 "vmode:0\0"                                             \
 184
 185 /*
 186  * Miscellaneous configurable options
 187  */
 188 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 189 #define CONFIG_SYS_PROMPT               "=> "
 190 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 191 /* Print Buffer Size */
 192 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 193                 sizeof(CONFIG_SYS_PROMPT) + 16)
 194 #define CONFIG_SYS_MAXARGS              32      /* max number of command args */
 195 /* Boot Argument Buffer Size */
 196 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 197
 198 /* memtest works on first 255MB of RAM */
 199 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM_1
 200 #define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM_1 + 0xff000000)
 201
 202 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 203
 204 #define CONFIG_SYS_HZ                   1000
 205
 206 #define CONFIG_CMDLINE_EDITING
 207 #define CONFIG_SYS_HUSH_PARSER                  /* Use the HUSH parser */
 208
 209 #define CONFIG_MISC_INIT_R
 210
 211 /*-----------------------------------------------------------------------
 212  * Physical Memory Map
 213  */
 214 #define CONFIG_NR_DRAM_BANKS    1
 215 #define PHYS_SDRAM_1            CSD0_BASE
 216 #define PHYS_SDRAM_1_SIZE       0x10000000      /* 256 MB */
 217
 218 /*
 219  * NAND driver
 220  */
 221
 222 #ifndef __ASSEMBLY__
 223 extern void qong_nand_plat_init(void *chip);
 224 extern int qong_nand_rdy(void *chip);
 225 #endif
 226 #define CONFIG_NAND_PLAT
 227 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 228 #define CONFIG_SYS_NAND_BASE    CS3_BASE
 229 #define NAND_PLAT_INIT() qong_nand_plat_init(nand)
 230
 231 #define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
 232 #define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
 233 #define QONG_NAND_WRITE(addr, cmd) \
 234         do { \
 235                 __REG8(addr) = cmd; \
 236         } while (0)
 237
 238 #define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
 239 #define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
 240 #define NAND_PLAT_DEV_READY(chip)      (qong_nand_rdy(chip))
 241
 242 /*-----------------------------------------------------------------------
 243  * FLASH and environment organization
 244  */
 245 #define CONFIG_SYS_FLASH_BASE           CS0_BASE
 246 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 247 /* max number of sectors on one chip */
 248 #define CONFIG_SYS_MAX_FLASH_SECT       1024
 249 /* Monitor at beginning of flash */
 250 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 251 #define CONFIG_SYS_MONITOR_LEN          0x40000         /* Reserve 256KiB */
 252
 253 #define CONFIG_ENV_IS_IN_FLASH
 254 #define CONFIG_ENV_SECT_SIZE    0x20000
 255 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 256 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x80000)
 257
 258 /* Address and size of Redundant Environment Sector     */
 259 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 260 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 261
 262 /*-----------------------------------------------------------------------
 263  * CFI FLASH driver setup
 264  */
 265 /* Flash memory is CFI compliant */
 266 #define CONFIG_SYS_FLASH_CFI
 267 /* Use drivers/cfi_flash.c */
 268 #define CONFIG_FLASH_CFI_DRIVER
 269 /* Use buffered writes (~10x faster) */
 270 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 271 /* Use hardware sector protection */
 272 #define CONFIG_SYS_FLASH_PROTECTION
 273
 274 /*
 275  * Filesystem
 276  */
 277 #define CONFIG_CMD_JFFS2
 278 #define CONFIG_CMD_UBI
 279 #define CONFIG_CMD_UBIFS
 280 #define CONFIG_RBTREE
 281 #define CONFIG_MTD_PARTITIONS
 282 #define CONFIG_CMD_MTDPARTS
 283 #define CONFIG_LZO
 284 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 285 #define CONFIG_FLASH_CFI_MTD
 286 #define MTDIDS_DEFAULT          "nor0=physmap-flash.0,"         \
 287                                 "nand0=gen_nand"
 288 #define MTDPARTS_DEFAULT        \
 289         "mtdparts=physmap-flash.0:"                             \
 290                         "512k(U-Boot),128k(env1),128k(env2),"   \
 291                         "2304k(kernel),13m(ramdisk),-(user);"   \
 292                 "gen_nand:"                                     \
 293                         "128m(nand)"
 294
 295 /* additions for new relocation code, must be added to all boards */
 296 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 297 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 298 #define CONFIG_SYS_INIT_RAM_SIZE                IRAM_SIZE
 299 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 300 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
 301
 302 #define CONFIG_BOARD_EARLY_INIT_F
 303
 304 #endif /* __CONFIG_H */