include/configs/sama5d3xek.h

   1 /*
   2  * Configuation settings for the SAMA5D3xEK board.
   3  *
   4  * Copyright (C) 2012 - 2013 Atmel
   5  *
   6  * based on at91sam9m10g45ek.h by:
   7  * Stelian Pop <stelian@popies.net>
   8  * Lead Tech Design <www.leadtechdesign.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 /*
  17  * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH
  18  * before the common header.
  19  */
  20 #include "at91-sama5_common.h"
  21
  22 /* serial console */
  23 #define CONFIG_ATMEL_USART
  24 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  25 #define CONFIG_USART_ID                 ATMEL_ID_DBGU
  26
  27 /*
  28  * This needs to be defined for the OHCI code to work but it is defined as
  29  * ATMEL_ID_UHPHS in the CPU specific header files.
  30  */
  31 #define ATMEL_ID_UHP                    ATMEL_ID_UHPHS
  32
  33 /*
  34  * Specify the clock enable bit in the PMC_SCER register.
  35  */
  36 #define ATMEL_PMC_UHP                   AT91SAM926x_PMC_UHP
  37
  38 /* LCD */
  39 #define CONFIG_LCD
  40 #define LCD_BPP                         LCD_COLOR16
  41 #define LCD_OUTPUT_BPP                  24
  42 #define CONFIG_LCD_LOGO
  43 #define CONFIG_LCD_INFO
  44 #define CONFIG_LCD_INFO_BELOW_LOGO
  45 #define CONFIG_SYS_WHITE_ON_BLACK
  46 #define CONFIG_ATMEL_HLCD
  47 #define CONFIG_ATMEL_LCD_RGB565
  48 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  49
  50 /* board specific (not enough SRAM) */
  51 #define CONFIG_SAMA5D3_LCD_BASE         0x23E00000
  52
  53 /* NOR flash */
  54 #ifndef CONFIG_SYS_NO_FLASH
  55 #define CONFIG_CMD_FLASH
  56 #define CONFIG_FLASH_CFI_DRIVER
  57 #define CONFIG_SYS_FLASH_CFI
  58 #define CONFIG_SYS_FLASH_PROTECTION
  59 #define CONFIG_SYS_FLASH_BASE           0x10000000
  60 #define CONFIG_SYS_MAX_FLASH_SECT       131
  61 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  62 #endif
  63
  64 /* SDRAM */
  65 #define CONFIG_NR_DRAM_BANKS            1
  66 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
  67 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
  68
  69 #ifdef CONFIG_SPL_BUILD
  70 #define CONFIG_SYS_INIT_SP_ADDR         0x310000
  71 #else
  72 #define CONFIG_SYS_INIT_SP_ADDR \
  73         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  74 #endif
  75
  76 /* SerialFlash */
  77 #define CONFIG_CMD_SF
  78
  79 #ifdef CONFIG_CMD_SF
  80 #define CONFIG_ATMEL_SPI
  81 #define CONFIG_SPI_FLASH
  82 #define CONFIG_SPI_FLASH_ATMEL
  83 #define CONFIG_SF_DEFAULT_SPEED         30000000
  84 #endif
  85
  86 /* NAND flash */
  87 #define CONFIG_CMD_NAND
  88
  89 #ifdef CONFIG_CMD_NAND
  90 #define CONFIG_NAND_ATMEL
  91 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  92 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  93 /* our ALE is AD21 */
  94 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  95 /* our CLE is AD22 */
  96 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  97 #define CONFIG_SYS_NAND_ONFI_DETECTION
  98 /* PMECC & PMERRLOC */
  99 #define CONFIG_ATMEL_NAND_HWECC
 100 #define CONFIG_ATMEL_NAND_HW_PMECC
 101 #define CONFIG_PMECC_CAP                4
 102 #define CONFIG_PMECC_SECTOR_SIZE        512
 103 #define CONFIG_CMD_NAND_TRIMFFS
 104 #endif
 105
 106 /* Ethernet Hardware */
 107 #define CONFIG_MACB
 108 #define CONFIG_RMII
 109 #define CONFIG_NET_RETRY_COUNT          20
 110 #define CONFIG_MACB_SEARCH_PHY
 111 #define CONFIG_RGMII
 112 #define CONFIG_CMD_MII
 113 #define CONFIG_PHYLIB
 114 #define CONFIG_PHY_MICREL
 115 #define CONFIG_PHY_MICREL_KSZ9021
 116
 117 /* MMC */
 118 #define CONFIG_CMD_MMC
 119
 120 #ifdef CONFIG_CMD_MMC
 121 #define CONFIG_MMC
 122 #define CONFIG_GENERIC_MMC
 123 #define CONFIG_GENERIC_ATMEL_MCI
 124 #define ATMEL_BASE_MMCI                 ATMEL_BASE_MCI0
 125 #endif
 126
 127 /* USB */
 128 #define CONFIG_CMD_USB
 129
 130 #ifdef CONFIG_CMD_USB
 131 #define CONFIG_USB_ATMEL
 132 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
 133 #define CONFIG_USB_OHCI_NEW
 134 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 135 #define CONFIG_SYS_USB_OHCI_REGS_BASE           ATMEL_BASE_OHCI
 136 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "sama5d3"
 137 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 138 #define CONFIG_DOS_PARTITION
 139 #define CONFIG_USB_STORAGE
 140 #endif
 141
 142 /* USB device */
 143 #define CONFIG_USB_GADGET
 144 #define CONFIG_USB_GADGET_DUALSPEED
 145 #define CONFIG_USB_GADGET_ATMEL_USBA
 146 #define CONFIG_USB_ETHER
 147 #define CONFIG_USB_ETH_RNDIS
 148 #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D3xEK"
 149
 150 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
 151 #define CONFIG_CMD_FAT
 152 #define CONFIG_FAT_WRITE
 153 #endif
 154
 155 #define CONFIG_SYS_LOAD_ADDR                    0x22000000 /* load address */
 156
 157 #ifdef CONFIG_SYS_USE_SERIALFLASH
 158 /* bootstrap + u-boot + env + linux in serial flash */
 159 #define CONFIG_ENV_IS_IN_SPI_FLASH
 160 #define CONFIG_ENV_OFFSET       0x5000
 161 #define CONFIG_ENV_SIZE         0x3000
 162 #define CONFIG_ENV_SECT_SIZE    0x1000
 163 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
 164                                 "sf read 0x22000000 0x42000 0x300000; " \
 165                                 "bootm 0x22000000"
 166 #elif CONFIG_SYS_USE_NANDFLASH
 167 /* bootstrap + u-boot + env in nandflash */
 168 #define CONFIG_ENV_IS_IN_NAND
 169 #define CONFIG_ENV_OFFSET               0xc0000
 170 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 171 #define CONFIG_ENV_SIZE                 0x20000
 172 #define CONFIG_BOOTCOMMAND      "nand read 0x21000000 0x180000 0x80000;" \
 173                                 "nand read 0x22000000 0x200000 0x600000;" \
 174                                 "bootm 0x22000000 - 0x21000000"
 175 #elif CONFIG_SYS_USE_MMC
 176 /* bootstrap + u-boot + env in sd card */
 177 #define CONFIG_ENV_IS_IN_FAT
 178 #define FAT_ENV_INTERFACE       "mmc"
 179 #define FAT_ENV_FILE            "uboot.env"
 180 #define FAT_ENV_DEVICE_AND_PART "0"
 181 #define CONFIG_ENV_SIZE         0x4000
 182 #define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x21000000 dtb; " \
 183                                 "fatload mmc 0:1 0x22000000 uImage; " \
 184                                 "bootm 0x22000000 - 0x21000000"
 185 #else
 186 #define CONFIG_ENV_IS_NOWHERE
 187 #endif
 188
 189 /* SPL */
 190 #define CONFIG_SPL_FRAMEWORK
 191 #define CONFIG_SPL_TEXT_BASE            0x300000
 192 #define CONFIG_SPL_MAX_SIZE             0x10000
 193 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
 194 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 195 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
 196 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 197
 198 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 199 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 200 #define CONFIG_SPL_GPIO_SUPPORT
 201 #define CONFIG_SPL_SERIAL_SUPPORT
 202
 203 #define CONFIG_SPL_BOARD_INIT
 204 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 205
 206 #ifdef CONFIG_SYS_USE_MMC
 207 #define CONFIG_SPL_LDSCRIPT             arch/arm/mach-at91/armv7/u-boot-spl.lds
 208 #define CONFIG_SPL_MMC_SUPPORT
 209 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x400
 210 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
 211 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 212 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
 213 #define CONFIG_SPL_FAT_SUPPORT
 214 #define CONFIG_SPL_LIBDISK_SUPPORT
 215
 216 #elif CONFIG_SYS_USE_NANDFLASH
 217 #define CONFIG_SPL_NAND_SUPPORT
 218 #define CONFIG_SPL_NAND_DRIVERS
 219 #define CONFIG_SPL_NAND_BASE
 220 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 221 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 222 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 223 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 224 #define CONFIG_SYS_NAND_OOBSIZE         64
 225 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
 226 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
 227 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 228
 229 #elif CONFIG_SYS_USE_SERIALFLASH
 230 #define CONFIG_SPL_SPI_SUPPORT
 231 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 232 #define CONFIG_SPL_SPI_LOAD
 233 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x8400
 234
 235 #endif
 236
 237 #endif