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tricorder: add led support
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1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * (C) Copyright 2012
8  * Corscience GmbH & Co. KG
9  * Thomas Weber <weber@corscience.de>
10  *
11  * Configuration settings for the Tricorder board.
12  *
13  * SPDX-License-Identifier:     GPL-2.0+
14  */
15
16 #ifndef __CONFIG_H
17 #define __CONFIG_H
18
19 /* High Level Configuration Options */
20 #define CONFIG_OMAP                     /* in a TI OMAP core */
21 #define CONFIG_OMAP34XX                 /* which is a 34XX */
22 #define CONFIG_OMAP_COMMON
23
24 #define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
25 /*
26  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
27  * 64 bytes before this address should be set aside for u-boot.img's
28  * header. That is 0x800FFFC0--0x80100000 should not be used for any
29  * other needs.
30  */
31 #define CONFIG_SYS_TEXT_BASE            0x80100000
32
33 #define CONFIG_SDRC                     /* The chip has SDRC controller */
34
35 #include <asm/arch/cpu.h>               /* get chip and board defs */
36 #include <asm/arch/omap3.h>
37
38 /* Display CPU and Board information */
39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO
41
42 /* Clock Defines */
43 #define V_OSCK                          26000000 /* Clock output from T2 */
44 #define V_SCLK                          (V_OSCK >> 1)
45
46 #define CONFIG_MISC_INIT_R
47
48 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
49 #define CONFIG_SETUP_MEMORY_TAGS
50 #define CONFIG_INITRD_TAG
51 #define CONFIG_REVISION_TAG
52
53 #define CONFIG_OF_LIBFDT
54
55 /* Size of malloc() pool */
56 #define CONFIG_SYS_MALLOC_LEN           (1024*1024)
57
58 /* Hardware drivers */
59
60 /* GPIO support */
61 #define CONFIG_OMAP_GPIO
62
63 /* LED support */
64 #define CONFIG_STATUS_LED
65 #define CONFIG_BOARD_SPECIFIC_LED
66 #define CONFIG_CMD_LED                  /* LED command */
67 #define STATUS_LED_BIT                  (1 << 0)
68 #define STATUS_LED_STATE                STATUS_LED_ON
69 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
70 #define STATUS_LED_BIT1                 (1 << 1)
71 #define STATUS_LED_STATE1               STATUS_LED_ON
72 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
73 #define STATUS_LED_BIT2                 (1 << 2)
74 #define STATUS_LED_STATE2               STATUS_LED_ON
75 #define STATUS_LED_PERIOD2              (CONFIG_SYS_HZ / 2)
76
77 /* NS16550 Configuration */
78 #define CONFIG_SYS_NS16550
79 #define CONFIG_SYS_NS16550_SERIAL
80 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
81 #define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
82
83 /* select serial console configuration */
84 #define CONFIG_CONS_INDEX               3
85 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
86 #define CONFIG_SERIAL3                  3
87 #define CONFIG_BAUDRATE                 115200
88 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
89                                         115200}
90
91 /* MMC */
92 #define CONFIG_GENERIC_MMC
93 #define CONFIG_MMC
94 #define CONFIG_OMAP_HSMMC
95 #define CONFIG_DOS_PARTITION
96
97 /* I2C */
98 #define CONFIG_HARD_I2C
99 #define CONFIG_SYS_I2C_SPEED            100000
100 #define CONFIG_SYS_I2C_SLAVE            1
101 #define CONFIG_DRIVER_OMAP34XX_I2C      1
102 #define CONFIG_I2C_MULTI_BUS
103
104 /* EEPROM */
105 #define CONFIG_SYS_I2C_MULTI_EEPROMS
106 #define CONFIG_CMD_EEPROM
107 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
108 #define CONFIG_SYS_EEPROM_BUS_NUM       1
109
110 /* TWL4030 */
111 #define CONFIG_TWL4030_POWER
112 #define CONFIG_TWL4030_LED
113
114 /* Board NAND Info */
115 #define CONFIG_SYS_NO_FLASH             /* no NOR flash */
116 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
117 #define MTDIDS_DEFAULT                  "nand0=omap2-nand.0"
118 #define MTDPARTS_DEFAULT                "mtdparts=omap2-nand.0:" \
119                                                 "128k(SPL)," \
120                                                 "1m(u-boot)," \
121                                                 "384k(u-boot-env1)," \
122                                                 "1152k(mtdoops)," \
123                                                 "384k(u-boot-env2)," \
124                                                 "5m(kernel)," \
125                                                 "2m(fdt)," \
126                                                 "-(ubi)"
127
128 #define CONFIG_NAND_OMAP_GPMC
129 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
130                                                         /* to access nand */
131 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
132                                                         /* to access nand at */
133                                                         /* CS0 */
134 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
135
136 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
137                                                         /* devices */
138 #define CONFIG_NAND_OMAP_BCH8
139 #define CONFIG_BCH
140
141 /* commands to include */
142 #include <config_cmd_default.h>
143
144 #define CONFIG_CMD_EXT2                 /* EXT2 Support */
145 #define CONFIG_CMD_FAT                  /* FAT support */
146 #define CONFIG_CMD_I2C                  /* I2C serial bus support */
147 #define CONFIG_CMD_MMC                  /* MMC support */
148 #define CONFIG_CMD_MTDPARTS             /* Enable MTD parts commands */
149 #define CONFIG_CMD_NAND                 /* NAND support */
150 #define CONFIG_CMD_NAND_LOCK_UNLOCK     /* nand (un)lock commands */
151 #define CONFIG_CMD_UBI                  /* UBI commands */
152 #define CONFIG_CMD_UBIFS                /* UBIFS commands */
153 #define CONFIG_LZO                      /* LZO is needed for UBIFS */
154
155 #undef CONFIG_CMD_NET
156 #undef CONFIG_CMD_NFS
157 #undef CONFIG_CMD_FPGA                  /* FPGA configuration Support */
158 #undef CONFIG_CMD_IMI                   /* iminfo */
159 #undef CONFIG_CMD_JFFS2                 /* JFFS2 Support */
160
161 /* needed for ubi */
162 #define CONFIG_RBTREE
163 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
164 #define CONFIG_MTD_PARTITIONS
165
166 /* Environment information (this is the common part) */
167
168 #define CONFIG_BOOTDELAY                3
169
170 /* hang() the board on panic() */
171 #define CONFIG_PANIC_HANG
172
173 /* environment placement (for NAND), is different for FLASHCARD but does not
174  * harm there */
175 #define CONFIG_ENV_OFFSET               0x120000    /* env start */
176 #define CONFIG_ENV_OFFSET_REDUND        0x2A0000    /* redundant env start */
177 #define CONFIG_ENV_SIZE                 (16 << 10)  /* use 16KiB for env */
178 #define CONFIG_ENV_RANGE                (384 << 10) /* allow badblocks in env */
179
180 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
181  * value can not be used here! */
182 #define CONFIG_LOADADDR         0x82000000
183
184 #define CONFIG_COMMON_ENV_SETTINGS \
185         "console=ttyO2,115200n8\0" \
186         "mmcdev=0\0" \
187         "vram=3M\0" \
188         "defaultdisplay=lcd\0" \
189         "kernelopts=mtdoops.mtddev=3\0" \
190         "mtdparts=" MTDPARTS_DEFAULT "\0" \
191         "mtdids=" MTDIDS_DEFAULT "\0" \
192         "commonargs=" \
193                 "setenv bootargs console=${console} " \
194                 "${mtdparts} " \
195                 "${kernelopts} " \
196                 "vt.global_cursor_default=0 " \
197                 "vram=${vram} " \
198                 "omapdss.def_disp=${defaultdisplay}\0"
199
200 #define CONFIG_BOOTCOMMAND "run autoboot"
201
202 /* specific environment settings for different use cases
203  * FLASHCARD: used to run a rdimage from sdcard to program the device
204  * 'NORMAL': used to boot kernel from sdcard, nand, ...
205  *
206  * The main aim for the FLASHCARD skin is to have an embedded environment
207  * which will not be influenced by any data already on the device.
208  */
209 #ifdef CONFIG_FLASHCARD
210
211 #define CONFIG_ENV_IS_NOWHERE
212
213 /* the rdaddr is 16 MiB before the loadaddr */
214 #define CONFIG_ENV_RDADDR       "rdaddr=0x81000000\0"
215
216 #define CONFIG_EXTRA_ENV_SETTINGS \
217         CONFIG_COMMON_ENV_SETTINGS \
218         CONFIG_ENV_RDADDR \
219         "autoboot=" \
220         "run commonargs; " \
221         "setenv bootargs ${bootargs} " \
222                 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
223                 "rdinit=/sbin/init; " \
224         "mmc dev ${mmcdev}; mmc rescan; " \
225         "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
226         "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
227         "bootm ${loadaddr} ${rdaddr}\0"
228
229 #else /* CONFIG_FLASHCARD */
230
231 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
232
233 #define CONFIG_ENV_IS_IN_NAND
234
235 #define CONFIG_EXTRA_ENV_SETTINGS \
236         CONFIG_COMMON_ENV_SETTINGS \
237         "mmcargs=" \
238                 "run commonargs; " \
239                 "setenv bootargs ${bootargs} " \
240                 "root=/dev/mmcblk0p2 " \
241                 "rootwait " \
242                 "rw\0" \
243         "nandargs=" \
244                 "run commonargs; " \
245                 "setenv bootargs ${bootargs} " \
246                 "root=ubi0:root " \
247                 "ubi.mtd=7 " \
248                 "rootfstype=ubifs " \
249                 "ro\0" \
250         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
251         "bootscript=echo Running bootscript from mmc ...; " \
252                 "source ${loadaddr}\0" \
253         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
254         "mmcboot=echo Booting from mmc ...; " \
255                 "run mmcargs; " \
256                 "bootm ${loadaddr}\0" \
257         "loaduimage_ubi=ubi part ubi; " \
258                 "ubifsmount ubi:root; " \
259                 "ubifsload ${loadaddr} /boot/uImage\0" \
260         "nandboot=echo Booting from nand ...; " \
261                 "run nandargs; " \
262                 "run loaduimage_ubi; " \
263                 "bootm ${loadaddr}\0" \
264         "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
265                         "if run loadbootscript; then " \
266                                 "run bootscript; " \
267                         "else " \
268                                 "if run loaduimage; then " \
269                                         "run mmcboot; " \
270                                 "else run nandboot; " \
271                                 "fi; " \
272                         "fi; " \
273                 "else run nandboot; fi\0"
274
275 #endif /* CONFIG_FLASHCARD */
276
277 /* Miscellaneous configurable options */
278 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
279 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
280 #define CONFIG_CMDLINE_EDITING          /* enable cmdline history */
281 #define CONFIG_AUTO_COMPLETE
282 #define CONFIG_SYS_PROMPT               "OMAP3 Tricorder # "
283 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
284 /* Print Buffer Size */
285 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
286                                         sizeof(CONFIG_SYS_PROMPT) + 16)
287 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
288
289 /* Boot Argument Buffer Size */
290 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
291
292 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x07000000)
293 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
294                                         0x01000000) /* 16MB */
295
296 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
297
298 /*
299  * OMAP3 has 12 GP timers, they can be driven by the system clock
300  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
301  * This rate is divided by a local divisor.
302  */
303 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
304 #define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
305 #define CONFIG_SYS_HZ                   1000
306
307 /*  Physical Memory Map  */
308 #define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
309 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
310 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
311
312 /* NAND and environment organization  */
313 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
314
315 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
316
317 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
318 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
319 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
320 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
321                                                 CONFIG_SYS_INIT_RAM_SIZE - \
322                                                 GENERATED_GBL_DATA_SIZE)
323
324 /* SRAM config */
325 #define CONFIG_SYS_SRAM_START           0x40200000
326 #define CONFIG_SYS_SRAM_SIZE            0x10000
327
328 /* Defines for SPL */
329 #define CONFIG_SPL
330 #define CONFIG_SPL_FRAMEWORK
331 #define CONFIG_SPL_NAND_SIMPLE
332
333 #define CONFIG_SPL_BOARD_INIT
334 #define CONFIG_SPL_GPIO_SUPPORT
335 #define CONFIG_SPL_LIBCOMMON_SUPPORT
336 #define CONFIG_SPL_LIBDISK_SUPPORT
337 #define CONFIG_SPL_I2C_SUPPORT
338 #define CONFIG_SPL_LIBGENERIC_SUPPORT
339 #define CONFIG_SPL_SERIAL_SUPPORT
340 #define CONFIG_SPL_POWER_SUPPORT
341 #define CONFIG_SPL_NAND_SUPPORT
342 #define CONFIG_SPL_NAND_BASE
343 #define CONFIG_SPL_NAND_DRIVERS
344 #define CONFIG_SPL_NAND_ECC
345 #define CONFIG_SPL_MMC_SUPPORT
346 #define CONFIG_SPL_FAT_SUPPORT
347 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
348 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
349 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
350 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
351
352 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
353 #define CONFIG_SPL_MAX_SIZE             (55 * 1024)     /* 7 KB for stack */
354 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
355
356 #define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
357 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
358
359 /* NAND boot config */
360 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
361 #define CONFIG_SYS_NAND_PAGE_COUNT      64
362 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
363 #define CONFIG_SYS_NAND_OOBSIZE         64
364 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
365 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
366 #define CONFIG_SYS_NAND_ECCPOS          {12, 13, 14, 15, 16, 17, 18, 19, 20,\
367                         21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
368                         34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\
369                         47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\
370                         60, 61, 62, 63}
371
372 #define CONFIG_SYS_NAND_ECCSIZE         512
373 #define CONFIG_SYS_NAND_ECCBYTES        13
374
375 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
376
377 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
378 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x100000
379
380 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
381 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
382
383 #endif /* __CONFIG_H */