include/power/tps65090.h

   1 /*
   2  * Copyright (c) 2015 Google, Inc
   3  * Written by Simon Glass <sjg@chromium.org>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __TPS65090_PMIC_H_
   9 #define __TPS65090_PMIC_H_
  10
  11 /* I2C device address for TPS65090 PMU */
  12 #define TPS65090_I2C_ADDR       0x48
  13
  14 /* TPS65090 register addresses */
  15 enum {
  16         REG_IRQ1 = 0,
  17         REG_CG_CTRL0 = 4,
  18         REG_CG_STATUS1 = 0xa,
  19         REG_FET_BASE = 0xe,     /* Not a real register, FETs count from here */
  20         REG_FET1_CTRL,
  21         REG_FET2_CTRL,
  22         REG_FET3_CTRL,
  23         REG_FET4_CTRL,
  24         REG_FET5_CTRL,
  25         REG_FET6_CTRL,
  26         REG_FET7_CTRL,
  27         TPS65090_NUM_REGS,
  28 };
  29
  30 enum {
  31         IRQ1_VBATG = 1 << 3,
  32         CG_CTRL0_ENC_MASK       = 0x01,
  33
  34         MAX_FET_NUM     = 7,
  35         MAX_CTRL_READ_TRIES = 5,
  36
  37         /* TPS65090 FET_CTRL register values */
  38         FET_CTRL_TOFET          = 1 << 7,  /* Timeout, startup, overload */
  39         FET_CTRL_PGFET          = 1 << 4,  /* Power good for FET status */
  40         FET_CTRL_WAIT           = 3 << 2,  /* Overcurrent timeout max */
  41         FET_CTRL_ADENFET        = 1 << 1,  /* Enable output auto discharge */
  42         FET_CTRL_ENFET          = 1 << 0,  /* Enable FET */
  43 };
  44
  45 enum {
  46         /* Status register fields */
  47         TPS65090_ST1_OTC        = 1 << 0,
  48         TPS65090_ST1_OCC        = 1 << 1,
  49         TPS65090_ST1_STATE_SHIFT = 4,
  50         TPS65090_ST1_STATE_MASK = 0xf << TPS65090_ST1_STATE_SHIFT,
  51 };
  52
  53 /* Drivers name */
  54 #define TPS65090_FET_DRIVER     "tps65090_fet"
  55
  56 #endif /* __TPS65090_PMIC_H_ */