]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
SPEAr: Configure FSMC driver for NAND interface
authorVipin KUMAR <vipin.kumar@st.com>
Tue, 22 May 2012 00:15:55 +0000 (00:15 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 7 Jul 2012 12:07:38 +0000 (14:07 +0200)
Since FSMC is a standard IP and it supports different memory interfaces, it
is supported independent of spear platform and spear is configured to use that
driver for interfacing with the NAND device

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
arch/arm/include/asm/arch-spear/hardware.h
board/spear/spear300/spear300.c
board/spear/spear310/spear310.c
board/spear/spear320/spear320.c
board/spear/spear600/spear600.c
include/configs/spear-common.h
include/configs/spear3xx.h
include/configs/spear6xx.h

index 818f36cc667a2f6917227988332a3ecb4b38fba9..a6517b2187f0e528616735de953557ba861c0d73 100644 (file)
 
 #if defined(CONFIG_SPEAR600)
 #define CONFIG_SYS_I2C_BASE                    (0xD0200000)
-#define CONFIG_SPEAR_FSMCBASE                  (0xD1800000)
+#define CONFIG_SYS_FSMC_BASE                   (0xD1800000)
 
 #elif defined(CONFIG_SPEAR300)
 #define CONFIG_SYS_I2C_BASE                    (0xD0180000)
-#define CONFIG_SPEAR_FSMCBASE                  (0x94000000)
+#define CONFIG_SYS_FSMC_BASE                   (0x94000000)
 
 #elif defined(CONFIG_SPEAR310)
 #define CONFIG_SYS_I2C_BASE                    (0xD0180000)
-#define CONFIG_SPEAR_FSMCBASE                  (0x44000000)
+#define CONFIG_SYS_FSMC_BASE                   (0x44000000)
 
 #undef CONFIG_SYS_NAND_CLE
 #undef CONFIG_SYS_NAND_ALE
@@ -57,7 +57,7 @@
 
 #elif defined(CONFIG_SPEAR320)
 #define CONFIG_SYS_I2C_BASE                    (0xD0180000)
-#define CONFIG_SPEAR_FSMCBASE                  (0x4C000000)
+#define CONFIG_SYS_FSMC_BASE                   (0x4C000000)
 
 #define CONFIG_SPEAR_EMIBASE                   (0x40000000)
 #define CONFIG_SPEAR_RASBASE                   (0xB3000000)
index 60ee54470e4a7480e17dbc6eb2ebaac0bb060af5..72a363140899d9f02c891732038da41e90524aa5 100644 (file)
 #include <common.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
+
+static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
 int board_init(void)
 {
@@ -41,18 +43,20 @@ int board_init(void)
  * Called by nand_init_chip to initialize the board specific functions
  */
 
-int board_nand_init(struct nand_chip *nand)
+void board_nand_init()
 {
        struct misc_regs *const misc_regs_p =
            (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+       struct nand_chip *nand = &nand_chip[0];
 
+#if defined(CONFIG_NAND_FSMC)
        if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
             MISC_SOCCFG30) ||
            ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
             MISC_SOCCFG31)) {
 
-               return spear_nand_init(nand);
+               fsmc_nand_init(nand);
        }
-
-       return -1;
+#endif
+       return;
 }
index 03dfe16175e274bf0318d9d1f808c342499c5285..14e666d6417f07b005587d92397daddb1b3b643a 100644 (file)
 #include <common.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
+
+static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
 int board_init(void)
 {
@@ -42,18 +44,20 @@ int board_init(void)
  * Called by nand_init_chip to initialize the board specific functions
  */
 
-int board_nand_init(struct nand_chip *nand)
+void board_nand_init()
 {
        struct misc_regs *const misc_regs_p =
            (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+       struct nand_chip *nand = &nand_chip[0];
 
+#if defined(CONFIG_NAND_FSMC)
        if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
             MISC_SOCCFG30) ||
            ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
             MISC_SOCCFG31)) {
 
-               return spear_nand_init(nand);
+               fsmc_nand_init(nand);
        }
-
-       return -1;
+#endif
+       return;
 }
index 2ba2dbb5666388b42903c88e0a65da04338dbec9..994eb2b64d2ae6139964d543e1c7553c5df691e4 100644 (file)
 #include <common.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
+
+static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
 int board_init(void)
 {
@@ -42,18 +44,21 @@ int board_init(void)
  * Called by nand_init_chip to initialize the board specific functions
  */
 
-int board_nand_init(struct nand_chip *nand)
+void board_nand_init()
 {
        struct misc_regs *const misc_regs_p =
            (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+       struct nand_chip *nand = &nand_chip[0];
 
+#if defined(CONFIG_NAND_FSMC)
        if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
             MISC_SOCCFG30) ||
            ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
             MISC_SOCCFG31)) {
 
-               return spear_nand_init(nand);
+               fsmc_nand_init(nand);
        }
+#endif
 
-       return -1;
+       return;
 }
index eef9a3771cfafb87cd2148a7b2ec1c2f0dbec3f3..ab0f760678bf35cc69608e8e67cb3625e8cb1de0 100644 (file)
 #include <common.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
+
+static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
 int board_init(void)
 {
@@ -41,13 +43,15 @@ int board_init(void)
  * Called by nand_init_chip to initialize the board specific functions
  */
 
-int board_nand_init(struct nand_chip *nand)
+void board_nand_init()
 {
        struct misc_regs *const misc_regs_p =
            (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+       struct nand_chip *nand = &nand_chip[0];
 
+#if defined(CONFIG_NAND_FSMC)
        if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS))
-               return spear_nand_init(nand);
-
-       return -1;
+               fsmc_nand_init(nand);
+#endif
+       return;
 }
index ab1b33209e369fa790caed83ab8fbcee70d78741..8d0f0369ca90f1e9dbe11fe892abbb768545493c 100644 (file)
 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 
 /* NAND FLASH Configuration */
+#define CONFIG_SYS_NAND_SELF_INIT
 #define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITIONS
-#define CONFIG_NAND_SPEAR                      1
+#define CONFIG_NAND_FSMC
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_MTD_NAND_VERIFY_WRITE           1
 
index 37bdebb392c2072aa5b46febb52ba84713c52524..2a86c212531f1d13df7b14d216d6fa06a88dad1b 100644 (file)
 
 #endif
 
+/* NAND flash configuration */
+#define CONFIG_SYS_FSMC_NAND_SP
+#define CONFIG_SYS_FSMC_NAND_8BIT
+
 #if defined(CONFIG_SPEAR300)
 #define CONFIG_SYS_NAND_BASE                   (0x80000000)
 
index 2ad5beb82c68e16dbb482ee7fef4833ce12b10b7..c5bcc30cb7531a54e3d66d2fd2f1f3ff19c6a5df 100644 (file)
@@ -38,6 +38,9 @@
 #define CONFIG_PL01x_PORTS                     { (void *)CONFIG_SYS_SERIAL0, \
                                                (void *)CONFIG_SYS_SERIAL1 }
 
+/* NAND flash configuration */
+#define CONFIG_SYS_FSMC_NAND_SP
+#define CONFIG_SYS_FSMC_NAND_8BIT
 #define CONFIG_SYS_NAND_BASE                   (0xD2000000)
 
 #endif  /* __CONFIG_H */