return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
}
MAKE_FLASH(8, b) /* flash_write8() flash_read8() */
-MAKE_FLASH(16, w) /* flash_write16() flash_write16() */
-MAKE_FLASH(32, l) /* flash_write32() flash_write32() */
-MAKE_FLASH(64, q) /* flash_write64() flash_write64() */
+MAKE_FLASH(16, w) /* flash_write16() flash_read16() */
+MAKE_FLASH(32, l) /* flash_write32() flash_read32() */
+MAKE_FLASH(64, q) /* flash_write64() flash_read64() */
void gpio_cfi_flash_init(void)
{
return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
}
MAKE_FLASH(8, b) /* flash_write8() flash_read8() */
-MAKE_FLASH(16, w) /* flash_write16() flash_write16() */
-MAKE_FLASH(32, l) /* flash_write32() flash_write32() */
-MAKE_FLASH(64, q) /* flash_write64() flash_write64() */
+MAKE_FLASH(16, w) /* flash_write16() flash_read16() */
+MAKE_FLASH(32, l) /* flash_write32() flash_read32() */
+MAKE_FLASH(64, q) /* flash_write64() flash_read64() */
void gpio_cfi_flash_init(void)
{
return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
}
MAKE_FLASH(8, b) /* flash_write8() flash_read8() */
-MAKE_FLASH(16, w) /* flash_write16() flash_write16() */
-MAKE_FLASH(32, l) /* flash_write32() flash_write32() */
-MAKE_FLASH(64, q) /* flash_write64() flash_write64() */
+MAKE_FLASH(16, w) /* flash_write16() flash_read16() */
+MAKE_FLASH(32, l) /* flash_write32() flash_read32() */
+MAKE_FLASH(64, q) /* flash_write64() flash_read64() */
void gpio_cfi_flash_init(void)
{
/* The NDFC uses Smart Media (SMC) bytes order
*/
- ecc_code[0] = p[2];
- ecc_code[1] = p[1];
+ ecc_code[0] = p[1];
+ ecc_code[1] = p[2];
ecc_code[2] = p[3];
return 0;
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 64
+#define CONFIG_SYS_MAX_FLASH_SECT 67
/*
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_MAX_FLASH_SECT 32
+#define CONFIG_SYS_MAX_FLASH_SECT 35
/*
/* SPI (see manual chapter 22) */
typedef struct {
- S3C24X0_REG32 SPCON;
- S3C24X0_REG32 SPSTA;
- S3C24X0_REG32 SPPIN;
- S3C24X0_REG32 SPPRE;
- S3C24X0_REG32 SPTDAT;
- S3C24X0_REG32 SPRDAT;
- S3C24X0_REG32 res[2];
-} __attribute__((__packed__)) S3C24X0_SPI_CHANNEL;
+ S3C24X0_REG8 SPCON;
+ S3C24X0_REG8 res1[3];
+ S3C24X0_REG8 SPSTA;
+ S3C24X0_REG8 res2[3];
+ S3C24X0_REG8 SPPIN;
+ S3C24X0_REG8 res3[3];
+ S3C24X0_REG8 SPPRE;
+ S3C24X0_REG8 res4[3];
+ S3C24X0_REG8 SPTDAT;
+ S3C24X0_REG8 res5[3];
+ S3C24X0_REG8 SPRDAT;
+ S3C24X0_REG8 res6[3];
+ S3C24X0_REG8 res7[16];
+} /*__attribute__((__packed__))*/ S3C24X0_SPI_CHANNEL;
typedef struct {
S3C24X0_SPI_CHANNEL ch[S3C24X0_SPI_CHANNELS];