smdk2410 ARM920T
VCMA9 ARM920T
+Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+ galaxy5200 mpc5200
+
Rolf Offermanns <rof@sysgo.de>
shannon SA1100
digsy_mtc \
EVAL5200 \
fo300 \
+ galaxy5200 \
icecube_5100 \
icecube_5200 \
inka4x0 \
}
@$(MKCONFIG) -a digsy_mtc ppc mpc5xxx digsy_mtc
+galaxy5200_LOWBOOT_config \
+galaxy5200_config: unconfig
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
+ @$(MKCONFIG) -a galaxy5200 ppc mpc5xxx galaxy5200
+
hmi1001_config: unconfig
@$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001
CONFIG_CMD_KGDB * kgdb
CONFIG_CMD_LOADB loadb
CONFIG_CMD_LOADS loads
+ CONFIG_CMD_MD5SUM print md5 message digest
+ (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
loop, loopw, mtest
CONFIG_CMD_MISC Misc functions like sleep etc
(requires CONFIG_CMD_I2C)
CONFIG_CMD_SETGETDCR Support for DCR Register access
(4xx only)
+ CONFIG_CMD_SHA1 print sha1 memory digest
+ (requires CONFIG_CMD_MEMORY)
CONFIG_CMD_SOURCE "source" command Support
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_USB * USB support
MPC5200 USB requires additional defines:
CONFIG_USB_CLOCK
for 528 MHz Clock: 0x0001bbbb
+ CONFIG_PSC3_USB
+ for USB on PSC3
CONFIG_USB_CONFIG
for differential drivers: 0x00001000
for single ended drivers: 0x00005000
+ for differential drivers on PSC3: 0x00000100
+ for single ended drivers on PSC3: 0x00004100
CONFIG_SYS_USB_EVENT_POLL
May be defined to allow interrupt polling
instead of using asynchronous interrupts
--- /dev/null
+#
+# (C) Copyright 2003-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# galaxy5200 board:
+#
+# Valid values for TEXT_BASE are:
+#
+# 0xFFF00000 boot high (standard configuration)
+# 0xFE000000 boot low
+# 0x00100000 boot from RAM (for testing only) does not work
+#
+
+sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+
+ifdef CONFIG_galaxy5200_LOWBOOT
+TEXT_BASE = 0xFE000000
+endif
+
+ifndef TEXT_BASE
+## Standard: boot high
+TEXT_BASE = 0xFFF00000
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * (C) Copyright 2006
+ * Eric Schumann, Phytec Messtechnik GmbH
+ *
+ * (C) Copyright 2009
+ * Eric Millbrandt, DEKA Research and Development Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+#include <pci.h>
+#include <asm-ppc/io.h>
+
+#ifndef CONFIG_SYS_RAMBOOT
+static void sdram_start(int hi_addr)
+{
+ volatile struct mpc5xxx_cdm *cdm =
+ (struct mpc5xxx_cdm *)MPC5XXX_CDM;
+ volatile struct mpc5xxx_sdram *sdram =
+ (struct mpc5xxx_sdram *)MPC5XXX_SDRAM;
+
+ long hi_addr_bit = hi_addr ? 0x01000000 : 0;
+
+ /* unlock mode register */
+ out_be32 (&sdram->ctrl,
+ (SDRAM_CONTROL | 0x80000000 | hi_addr_bit));
+
+ /* precharge all banks */
+ out_be32 (&sdram->ctrl,
+ (SDRAM_CONTROL | 0x80000002 | hi_addr_bit));
+
+#ifdef SDRAM_DDR
+ /* set mode register: extended mode */
+ out_be32 (&sdram->mode, (SDRAM_EMODE));
+
+ /* set mode register: reset DLL */
+ out_be32 (&sdram->mode, (SDRAM_MODE | 0x04000000));
+#endif
+
+ /* precharge all banks */
+ out_be32 (&sdram->ctrl,
+ (SDRAM_CONTROL | 0x80000002 | hi_addr_bit));
+
+ /* auto refresh */
+ out_be32 (&sdram->ctrl,
+ (SDRAM_CONTROL | 0x80000004 | hi_addr_bit));
+
+ /* set mode register */
+ out_be32 (&sdram->mode, (SDRAM_MODE));
+
+ /* normal operation */
+ out_be32 (&sdram->ctrl,
+ (SDRAM_CONTROL | hi_addr_bit));
+
+ /* set CDM clock enable register, set MPC5200B SDRAM bus */
+ /* to reduced driver strength */
+ out_be32 (&cdm->clock_enable, (0x00CFFFFF));
+}
+#endif
+
+/*
+ * ATTENTION: Although partially referenced initdram does NOT make
+ * real use of CONFIG_SYS_SDRAM_BASE. The code does not
+ * work if CONFIG_SYS_SDRAM_BASE
+ * is something else than 0x00000000.
+ */
+
+phys_size_t initdram(int board_type)
+{
+ volatile struct mpc5xxx_mmap_ctl *mm =
+ (struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR;
+ volatile struct mpc5xxx_sdram *sdram =
+ (struct mpc5xxx_sdram *)MPC5XXX_SDRAM;
+ ulong dramsize = 0;
+ ulong dramsize2 = 0;
+#ifndef CONFIG_SYS_RAMBOOT
+ ulong test1, test2;
+
+ /* setup SDRAM chip selects */
+ /* 256MB at 0x0 */
+ out_be32 (&mm->sdram0, 0x0000001b);
+ /* disabled */
+ out_be32 (&mm->sdram1, 0x10000000);
+
+ /* setup config registers */
+ out_be32 (&sdram->config1, SDRAM_CONFIG1);
+ out_be32 (&sdram->config2, SDRAM_CONFIG2);
+
+ /* find RAM size using SDRAM CS0 only */
+ sdram_start(0);
+ test1 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x10000000);
+ sdram_start(1);
+ test2 = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, 0x10000000);
+ if (test1 > test2) {
+ sdram_start(0);
+ dramsize = test1;
+ } else
+ dramsize = test2;
+
+ /* memory smaller than 1MB is impossible */
+ if (dramsize < (1 << 20))
+ dramsize = 0;
+
+ /* set SDRAM CS0 size according to the amount of RAM found */
+ if (dramsize > 0) {
+ out_be32 (&mm->sdram0,
+ (0x13 + __builtin_ffs(dramsize >> 20) - 1));
+ } else {
+ /* disabled */
+ out_be32 (&mm->sdram0, 0);
+ }
+
+#else /* CONFIG_SYS_RAMBOOT */
+
+ /* retrieve size of memory connected to SDRAM CS0 */
+ dramsize = in_be32(&mm->sdram0) & 0xFF;
+ if (dramsize >= 0x13)
+ dramsize = (1 << (dramsize - 0x13)) << 20;
+ else
+ dramsize = 0;
+
+ /* retrieve size of memory connected to SDRAM CS1 */
+ dramsize2 = in_be32(&mm->sdram1) & 0xFF;
+ if (dramsize2 >= 0x13)
+ dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
+ else
+ dramsize2 = 0;
+
+#endif /* CONFIG_SYS_RAMBOOT */
+
+ return dramsize + dramsize2;
+}
+
+int checkboard(void)
+{
+ puts("Board: galaxy5200\n");
+ return 0;
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t * bd)
+{
+ ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
+
+void init_ide_reset (void)
+{
+ volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT;
+ debug ("init_ide_reset\n");
+
+ /* Configure TIMER_5 as GPIO output for ATA reset */
+ /* Deassert reset */
+ gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT1 | MPC5XXX_GPT_TMS_GPIO;
+}
+
+void ide_set_reset (int idereset)
+{
+ volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT;
+ debug ("ide_reset(%d)\n", idereset);
+
+ /* Configure TIMER_5 as GPIO output for ATA reset */
+ if (idereset) {
+ gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT0 | MPC5XXX_GPT_TMS_GPIO;
+
+ /* Make a delay. MPC5200 spec says 25 usec min */
+ udelay(50);
+ } else {
+ gpt[5].emsr = MPC5XXX_GPT_GPIO_OUT1 | MPC5XXX_GPT_TMS_GPIO;
+ udelay(50);
+ }
+}
+#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */
#include <ioports.h>
#include <mpc8260.h>
#include <i2c.h>
+#include <bcd.h>
/* define to initialise the SDRAM on the local bus */
#undef INIT_LOCAL_BUS_SDRAM
{
unsigned char buffer[8];
-#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
-
if (! i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) {
- timedate->tm_sec = BCD_TO_BIN (buffer[0]);
- timedate->tm_min = BCD_TO_BIN (buffer[1]);
- timedate->tm_hour = BCD_TO_BIN (buffer[2]);
- timedate->tm_wday = BCD_TO_BIN (buffer[3]);
- timedate->tm_mday = BCD_TO_BIN (buffer[4]);
- timedate->tm_mon = BCD_TO_BIN (buffer[5]);
- timedate->tm_year = BCD_TO_BIN (buffer[6]) + 2000;
+ timedate->tm_sec = bcd2bin (buffer[0]);
+ timedate->tm_min = bcd2bin (buffer[1]);
+ timedate->tm_hour = bcd2bin (buffer[2]);
+ timedate->tm_wday = bcd2bin (buffer[3]);
+ timedate->tm_mday = bcd2bin (buffer[4]);
+ timedate->tm_mon = bcd2bin (buffer[5]);
+ timedate->tm_year = bcd2bin (buffer[6]) + 2000;
} else {
/*printf("i2c error %02x\n", rc); */
memset (timedate, 0, sizeof (struct tm));
#endif
#include <watchdog.h>
+#include <u-boot/md5.h>
+#include <sha1.h>
+
#ifdef CMD_MEM_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
#else
}
#endif /* CONFIG_CRC32_VERIFY */
+#ifdef CONFIG_CMD_MD5SUM
+int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned long addr, len;
+ unsigned int i;
+ u8 output[16];
+
+ if (argc < 3) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ addr = simple_strtoul(argv[1], NULL, 16);
+ len = simple_strtoul(argv[2], NULL, 16);
+
+ md5((unsigned char *) addr, len, output);
+ printf("md5 for %08lx ... %08lx ==> ", addr, addr + len - 1);
+ for (i = 0; i < 16; i++)
+ printf("%02x", output[i]);
+ printf("\n");
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_CMD_SHA1
+int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned long addr, len;
+ unsigned int i;
+ u8 output[20];
+
+ if (argc < 3) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ addr = simple_strtoul(argv[1], NULL, 16);
+ len = simple_strtoul(argv[2], NULL, 16);
+
+ sha1_csum((unsigned char *) addr, len, output);
+ printf("SHA1 for %08lx ... %08lx ==> ", addr, addr + len - 1);
+ for (i = 0; i < 20; i++)
+ printf("%02x", output[i]);
+ printf("\n");
+
+ return 0;
+}
+#endif
#ifdef CONFIG_CMD_UNZIP
int gunzip (void *, int, unsigned char *, unsigned long *);
);
#endif /* CONFIG_MX_CYCLIC */
+#ifdef CONFIG_CMD_MD5SUM
+U_BOOT_CMD(
+ md5sum, 3, 1, do_md5sum,
+ "compute MD5 message digest",
+ "address count"
+);
+#endif
+
+#ifdef CONFIG_CMD_SHA1SUM
+U_BOOT_CMD(
+ sha1sum, 3, 1, do_sha1sum,
+ "compute SHA1 message digest",
+ "address count"
+);
+#endif /* CONFIG_CMD_SHA1 */
+
#ifdef CONFIG_CMD_UNZIP
U_BOOT_CMD(
unzip, 4, 1, do_unzip,
/* Set the USB Clock */
*(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
+#ifdef CONFIG_PSC3_USB /* USB is using the alternate configuration */
+ /* remove all PSC3 USB bits first before ORing in ours */
+ *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00804f00;
+#else
/* remove all USB bits first before ORing in ours */
*(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
-
+#endif
/* Activate USB port */
*(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
/* Set the USB Clock */
*(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
+#ifdef CONFIG_PSC3_USB /* USB is using the alternate configuration */
+ /* remove all PSC3 USB bits first before ORing in ours */
+ *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00804f00;
+#else
/* remove all USB bits first before ORing in ours */
*(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
-
+#endif
/* Activate USB port */
*(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
COBJS-$(CONFIG_RTC_M41T11) += m41t11.o
COBJS-$(CONFIG_RTC_M41T60) += m41t60.o
COBJS-$(CONFIG_RTC_M41T62) += m41t62.o
+COBJS-$(CONFIG_RTC_M41T94) += m41t94.o
COBJS-$(CONFIG_RTC_M48T35A) += m48t35ax.o
COBJS-$(CONFIG_RTC_MAX6900) += max6900.o
COBJS-$(CONFIG_RTC_MC13783) += mc13783-rtc.o
# error Board specific rtc access functions should be supplied
#endif
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
-/* ------------------------------------------------------------------------- */
-
int rtc_get (struct rtc_time *tmp)
{
uchar sec, min, hour, mday, wday, mon, year;
#define RTC_USER_RAM_BASE 0x20
-static unsigned int bin2bcd (unsigned int n);
-static unsigned char bcd2bin (unsigned char c);
-
/* ************************************************************************* */
#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
-/* ------------------------------------------------------------------------- */
-
-static unsigned char bcd2bin (unsigned char n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-/* ------------------------------------------------------------------------- */
-
-static unsigned int bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-/* ------------------------------------------------------------------------- */
-
#endif
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
/*
* Get the current time from the RTC
{
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
-
/*
* Get the current time from the RTC
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
static uchar rtc_read( unsigned int addr );
static void rtc_write( unsigned int addr, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin(uchar c);
#define RTC_BASE ( CONFIG_SYS_NVRAM_SIZE + CONFIG_SYS_NVRAM_BASE_ADDR )
*(volatile unsigned char*)(addr) = val;
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
static uchar rtc_read(unsigned int addr );
static void rtc_write(unsigned int addr, uchar val);
-static uchar bin2bcd(unsigned int n);
-static unsigned bcd2bin(uchar c);
#define RTC_EPOCH 2000 /* century */
*(volatile unsigned char*)(addr) = val;
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
static uchar rtc_read( unsigned int addr );
static void rtc_write( unsigned int addr, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin(uchar c);
#define RTC_BASE ( CONFIG_SYS_NVRAM_SIZE + CONFIG_SYS_NVRAM_BASE_ADDR )
out8( addr, val );
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
/*
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
/*
* Get the current time from the RTC
{
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
#if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE)
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
-
/* ------------------------------------------------------------------------- */
/*
these are simple defines for the chip local to here so they aren't too
#if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE)
-static unsigned bcd2bin(uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd(unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
/*
* Convert between century and "century bits" (CB1 and CB0). These routines
* assume years are in the range 1900 - 2299.
#include <command.h>
#include <rtc.h>
#include <i2c.h>
-#include <bcd.h>
#if defined(CONFIG_CMD_DATE)
buf[0], buf[1], buf[2], buf[3],
buf[4], buf[5], buf[6], buf[7]);
- tm->tm_sec = BCD2BIN(buf[M41T62_REG_SEC] & 0x7f);
- tm->tm_min = BCD2BIN(buf[M41T62_REG_MIN] & 0x7f);
- tm->tm_hour = BCD2BIN(buf[M41T62_REG_HOUR] & 0x3f);
- tm->tm_mday = BCD2BIN(buf[M41T62_REG_DAY] & 0x3f);
+ tm->tm_sec = bcd2bin(buf[M41T62_REG_SEC] & 0x7f);
+ tm->tm_min = bcd2bin(buf[M41T62_REG_MIN] & 0x7f);
+ tm->tm_hour = bcd2bin(buf[M41T62_REG_HOUR] & 0x3f);
+ tm->tm_mday = bcd2bin(buf[M41T62_REG_DAY] & 0x3f);
tm->tm_wday = buf[M41T62_REG_WDAY] & 0x07;
- tm->tm_mon = BCD2BIN(buf[M41T62_REG_MON] & 0x1f);
+ tm->tm_mon = bcd2bin(buf[M41T62_REG_MON] & 0x1f);
/* assume 20YY not 19YY, and ignore the Century Bit */
/* U-Boot needs to add 1900 here */
- tm->tm_year = BCD2BIN(buf[M41T62_REG_YEAR]) + 100 + 1900;
+ tm->tm_year = bcd2bin(buf[M41T62_REG_YEAR]) + 100 + 1900;
debug("%s: tm is secs=%d, mins=%d, hours=%d, "
"mday=%d, mon=%d, year=%d, wday=%d\n",
/* Merge time-data and register flags into buf[0..7] */
buf[M41T62_REG_SSEC] = 0;
buf[M41T62_REG_SEC] =
- BIN2BCD(tm->tm_sec) | (buf[M41T62_REG_SEC] & ~0x7f);
+ bin2bcd(tm->tm_sec) | (buf[M41T62_REG_SEC] & ~0x7f);
buf[M41T62_REG_MIN] =
- BIN2BCD(tm->tm_min) | (buf[M41T62_REG_MIN] & ~0x7f);
+ bin2bcd(tm->tm_min) | (buf[M41T62_REG_MIN] & ~0x7f);
buf[M41T62_REG_HOUR] =
- BIN2BCD(tm->tm_hour) | (buf[M41T62_REG_HOUR] & ~0x3f) ;
+ bin2bcd(tm->tm_hour) | (buf[M41T62_REG_HOUR] & ~0x3f) ;
buf[M41T62_REG_WDAY] =
(tm->tm_wday & 0x07) | (buf[M41T62_REG_WDAY] & ~0x07);
buf[M41T62_REG_DAY] =
- BIN2BCD(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f);
+ bin2bcd(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f);
buf[M41T62_REG_MON] =
- BIN2BCD(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f);
+ bin2bcd(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f);
/* assume 20YY not 19YY */
- buf[M41T62_REG_YEAR] = BIN2BCD(tm->tm_year % 100);
+ buf[M41T62_REG_YEAR] = bin2bcd(tm->tm_year % 100);
if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) {
printf("I2C write failed in %s()\n", __func__);
--- /dev/null
+/*
+ * Driver for ST M41T94 SPI RTC
+ *
+ * Taken from the Linux kernel drivier:
+ * Copyright (C) 2008 Kim B. Heino
+ *
+ * Adaptation for U-Boot:
+ * Copyright (C) 2009
+ * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <rtc.h>
+#include <spi.h>
+
+static struct spi_slave *slave;
+
+#define M41T94_REG_SECONDS 0x01
+#define M41T94_REG_MINUTES 0x02
+#define M41T94_REG_HOURS 0x03
+#define M41T94_REG_WDAY 0x04
+#define M41T94_REG_DAY 0x05
+#define M41T94_REG_MONTH 0x06
+#define M41T94_REG_YEAR 0x07
+#define M41T94_REG_HT 0x0c
+
+#define M41T94_BIT_HALT 0x40
+#define M41T94_BIT_STOP 0x80
+#define M41T94_BIT_CB 0x40
+#define M41T94_BIT_CEB 0x80
+
+int rtc_set(struct rtc_time *tm)
+{
+ u8 buf[8]; /* write cmd + 7 registers */
+ int ret;
+
+ if (!slave) {
+ slave = spi_setup_slave(CONFIG_M41T94_SPI_BUS,
+ CONFIG_M41T94_SPI_CS, 1000000,
+ SPI_MODE_3);
+ if (!slave)
+ return -1;
+ }
+ spi_claim_bus(slave);
+
+ buf[0] = 0x80 | M41T94_REG_SECONDS; /* write time + date */
+ buf[M41T94_REG_SECONDS] = bin2bcd(tm->tm_sec);
+ buf[M41T94_REG_MINUTES] = bin2bcd(tm->tm_min);
+ buf[M41T94_REG_HOURS] = bin2bcd(tm->tm_hour);
+ buf[M41T94_REG_WDAY] = bin2bcd(tm->tm_wday + 1);
+ buf[M41T94_REG_DAY] = bin2bcd(tm->tm_mday);
+ buf[M41T94_REG_MONTH] = bin2bcd(tm->tm_mon + 1);
+
+ buf[M41T94_REG_HOURS] |= M41T94_BIT_CEB;
+ if (tm->tm_year >= 100)
+ buf[M41T94_REG_HOURS] |= M41T94_BIT_CB;
+ buf[M41T94_REG_YEAR] = bin2bcd(tm->tm_year % 100);
+
+ ret = spi_xfer(slave, 64, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
+ spi_release_bus(slave);
+ return ret;
+}
+
+int rtc_get(struct rtc_time *tm)
+{
+ u8 buf[2];
+ int ret, hour;
+
+ if (!slave) {
+ slave = spi_setup_slave(CONFIG_M41T94_SPI_BUS,
+ CONFIG_M41T94_SPI_CS, 1000000,
+ SPI_MODE_3);
+ if (!slave)
+ return -1;
+ }
+ spi_claim_bus(slave);
+
+ /* clear halt update bit */
+ ret = spi_w8r8(slave, M41T94_REG_HT);
+ if (ret < 0)
+ return ret;
+ if (ret & M41T94_BIT_HALT) {
+ buf[0] = 0x80 | M41T94_REG_HT;
+ buf[1] = ret & ~M41T94_BIT_HALT;
+ spi_xfer(slave, 16, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
+ }
+
+ /* clear stop bit */
+ ret = spi_w8r8(slave, M41T94_REG_SECONDS);
+ if (ret < 0)
+ return ret;
+ if (ret & M41T94_BIT_STOP) {
+ buf[0] = 0x80 | M41T94_REG_SECONDS;
+ buf[1] = ret & ~M41T94_BIT_STOP;
+ spi_xfer(slave, 16, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
+ }
+
+ tm->tm_sec = bcd2bin(spi_w8r8(slave, M41T94_REG_SECONDS));
+ tm->tm_min = bcd2bin(spi_w8r8(slave, M41T94_REG_MINUTES));
+ hour = spi_w8r8(slave, M41T94_REG_HOURS);
+ tm->tm_hour = bcd2bin(hour & 0x3f);
+ tm->tm_wday = bcd2bin(spi_w8r8(slave, M41T94_REG_WDAY)) - 1;
+ tm->tm_mday = bcd2bin(spi_w8r8(slave, M41T94_REG_DAY));
+ tm->tm_mon = bcd2bin(spi_w8r8(slave, M41T94_REG_MONTH)) - 1;
+ tm->tm_year = bcd2bin(spi_w8r8(slave, M41T94_REG_YEAR));
+ if ((hour & M41T94_BIT_CB) || !(hour & M41T94_BIT_CEB))
+ tm->tm_year += 100;
+
+ spi_release_bus(slave);
+ return 0;
+}
+
+void rtc_reset(void)
+{
+ /*
+ * Could not be tested as the reset pin is not wired on
+ * the sbc35-ag20 board
+ */
+ return 0;
+}
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
udelay(2500);
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
/* ------------------------------------------------------------------------- */
int rtc_get (struct rtc_time *tmp)
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin(uchar c);
#define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70
#define RTC_SECONDS 0x00
}
#endif
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
# error Board specific rtc access functions should be supplied
#endif
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
/* ------------------------------------------------------------------------- */
void *nvram_read(void *dest, const short src, size_t count)
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin(uchar c);
/* ------------------------------------------------------------------------- */
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif
#define HOURS_24(n) bcd2bin((n) & 0x3F)
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
-
static int setup_done = 0;
static int
return;
}
-static unsigned int
-bcd2bin (unsigned char n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char
-bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
#endif
#include <common.h>
#include <command.h>
#include <config.h>
-#include <bcd.h>
#include <rtc.h>
#include <tws.h>
/* Read 52 bits into our buffer */
tws_read(buffer, 52);
- tm->tm_sec = BCD2BIN( buffer[0] & 0x7F);
- tm->tm_min = BCD2BIN( buffer[1] & 0x7F);
- tm->tm_hour = BCD2BIN( buffer[2] & 0x3F);
- tm->tm_wday = BCD2BIN( buffer[3] & 0x07);
- tm->tm_mday = BCD2BIN((buffer[3] & 0xF0) >> 4 | (buffer[4] & 0x0F) << 4);
- tm->tm_mon = BCD2BIN((buffer[4] & 0x30) >> 4 | (buffer[5] & 0x0F) << 4);
- tm->tm_year = BCD2BIN((buffer[5] & 0xF0) >> 4 | (buffer[6] & 0x0F) << 4) + 2000;
+ tm->tm_sec = bcd2bin( buffer[0] & 0x7F);
+ tm->tm_min = bcd2bin( buffer[1] & 0x7F);
+ tm->tm_hour = bcd2bin( buffer[2] & 0x3F);
+ tm->tm_wday = bcd2bin( buffer[3] & 0x07);
+ tm->tm_mday = bcd2bin((buffer[3] & 0xF0) >> 4 | (buffer[4] & 0x0F) << 4);
+ tm->tm_mon = bcd2bin((buffer[4] & 0x30) >> 4 | (buffer[5] & 0x0F) << 4);
+ tm->tm_year = bcd2bin((buffer[5] & 0xF0) >> 4 | (buffer[6] & 0x0F) << 4) + 2000;
tm->tm_yday = 0;
tm->tm_isdst = 0;
tm->tm_hour, tm->tm_min, tm->tm_sec);
memset(buffer, 0, 7);
- buffer[0] = BIN2BCD(tm->tm_sec);
- buffer[1] = BIN2BCD(tm->tm_min);
- buffer[2] = BIN2BCD(tm->tm_hour);
- buffer[3] = BIN2BCD(tm->tm_wday);
- tmp = BIN2BCD(tm->tm_mday);
+ buffer[0] = bin2bcd(tm->tm_sec);
+ buffer[1] = bin2bcd(tm->tm_min);
+ buffer[2] = bin2bcd(tm->tm_hour);
+ buffer[3] = bin2bcd(tm->tm_wday);
+ tmp = bin2bcd(tm->tm_mday);
buffer[3] |= (tmp & 0x0F) << 4;
buffer[4] = (tmp & 0xF0) >> 4;
- tmp = BIN2BCD(tm->tm_mon);
+ tmp = bin2bcd(tm->tm_mon);
buffer[4] |= (tmp & 0x0F) << 4;
buffer[5] = (tmp & 0xF0) >> 4;
- tmp = BIN2BCD(tm->tm_year % 100);
+ tmp = bin2bcd(tm->tm_year % 100);
buffer[5] |= (tmp & 0x0F) << 4;
buffer[6] = (tmp & 0xF0) >> 4;
#define rtc_read(reg) buf[((reg) + 1) & 0xf]
static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
/*
* Get the current time from the RTC
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
#endif /* CONFIG_RTC_RX8025 && CONFIG_CMD_DATE */
}
}
-static unsigned bcd2bin (uchar n)
-{
- return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
- return (((n / 10) << 4) | (n % 10));
-}
-
/* ------------------------------------------------------------------------- */
int rtc_get (struct rtc_time *tmp)
#include <command.h>
#include <asm/hardware.h>
#include <rtc.h>
-#include <bcd.h>
int rtc_get (struct rtc_time* tm)
{
RTCCON |= 1;
- tm->tm_year = BCD2BIN(BCDYEAR);
- tm->tm_mon = BCD2BIN(BCDMON);
- tm->tm_wday = BCD2BIN(BCDDATE);
- tm->tm_mday = BCD2BIN(BCDDAY);
- tm->tm_hour = BCD2BIN(BCDHOUR);
- tm->tm_min = BCD2BIN(BCDMIN);
- tm->tm_sec = BCD2BIN(BCDSEC);
+ tm->tm_year = bcd2bin(BCDYEAR);
+ tm->tm_mon = bcd2bin(BCDMON);
+ tm->tm_wday = bcd2bin(BCDDATE);
+ tm->tm_mday = bcd2bin(BCDDAY);
+ tm->tm_hour = bcd2bin(BCDHOUR);
+ tm->tm_min = bcd2bin(BCDMIN);
+ tm->tm_sec = bcd2bin(BCDSEC);
if (tm->tm_sec==0) {
/* we have to re-read the rtc data because of the "one second deviation" problem */
/* see RTC datasheet for more info about it */
- tm->tm_year = BCD2BIN(BCDYEAR);
- tm->tm_mon = BCD2BIN(BCDMON);
- tm->tm_mday = BCD2BIN(BCDDAY);
- tm->tm_wday = BCD2BIN(BCDDATE);
- tm->tm_hour = BCD2BIN(BCDHOUR);
- tm->tm_min = BCD2BIN(BCDMIN);
- tm->tm_sec = BCD2BIN(BCDSEC);
+ tm->tm_year = bcd2bin(BCDYEAR);
+ tm->tm_mon = bcd2bin(BCDMON);
+ tm->tm_mday = bcd2bin(BCDDAY);
+ tm->tm_wday = bcd2bin(BCDDATE);
+ tm->tm_hour = bcd2bin(BCDHOUR);
+ tm->tm_min = bcd2bin(BCDMIN);
+ tm->tm_sec = bcd2bin(BCDSEC);
}
RTCCON &= ~1;
tm->tm_year -= 2000;
RTCCON |= 1;
- BCDYEAR = BIN2BCD(tm->tm_year);
- BCDMON = BIN2BCD(tm->tm_mon);
- BCDDAY = BIN2BCD(tm->tm_mday);
- BCDDATE = BIN2BCD(tm->tm_wday);
- BCDHOUR = BIN2BCD(tm->tm_hour);
- BCDMIN = BIN2BCD(tm->tm_min);
- BCDSEC = BIN2BCD(tm->tm_sec);
+ BCDYEAR = bin2bcd(tm->tm_year);
+ BCDMON = bin2bcd(tm->tm_mon);
+ BCDDAY = bin2bcd(tm->tm_mday);
+ BCDDATE = bin2bcd(tm->tm_wday);
+ BCDHOUR = bin2bcd(tm->tm_hour);
+ BCDMIN = bin2bcd(tm->tm_min);
+ BCDSEC = bin2bcd(tm->tm_sec);
RTCCON &= 1;
return 0;
#include <command.h>
#include <rtc.h>
#include <i2c.h>
-#include <bcd.h>
#if defined(CONFIG_CMD_DATE)
buf[0], buf[1], buf[2], buf[3],
buf[4], buf[5], buf[6], buf[7]);
- tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
- tm->tm_min = BCD2BIN(buf[CCR_MIN]);
- tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
- tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
- tm->tm_mon = BCD2BIN(buf[CCR_MONTH]); /* mon is 0-11 */
- tm->tm_year = BCD2BIN(buf[CCR_YEAR])
- + (BCD2BIN(buf[CCR_Y2K]) * 100);
+ tm->tm_sec = bcd2bin(buf[CCR_SEC]);
+ tm->tm_min = bcd2bin(buf[CCR_MIN]);
+ tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
+ tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
+ tm->tm_mon = bcd2bin(buf[CCR_MONTH]); /* mon is 0-11 */
+ tm->tm_year = bcd2bin(buf[CCR_YEAR])
+ + (bcd2bin(buf[CCR_Y2K]) * 100);
tm->tm_wday = buf[CCR_WDAY];
debug("%s: tm is secs=%d, mins=%d, hours=%d, "
tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
tm->tm_hour, tm->tm_min, tm->tm_sec);
- buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
- buf[CCR_MIN] = BIN2BCD(tm->tm_min);
+ buf[CCR_SEC] = bin2bcd(tm->tm_sec);
+ buf[CCR_MIN] = bin2bcd(tm->tm_min);
/* set hour and 24hr bit */
- buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;
+ buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
- buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
+ buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
/* month, 1 - 12 */
- buf[CCR_MONTH] = BIN2BCD(tm->tm_mon);
+ buf[CCR_MONTH] = bin2bcd(tm->tm_mon);
/* year, since the rtc epoch*/
- buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
+ buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
buf[CCR_WDAY] = tm->tm_wday & 0x07;
- buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
+ buf[CCR_Y2K] = bin2bcd(tm->tm_year / 100);
/* this sequence is required to unlock the chip */
rtc_write(X1205_REG_SR, X1205_SR_WEL);
* at your option.
*/
-/* macros to translate to/from binary and binary-coded decimal (frequently
- * found in RTC chips).
+/* inline functions to translate to/from binary and binary-coded decimal
+ * (frequently found in RTC chips).
*/
#ifndef _BCD_H
#define _BCD_H
-#define BCD2BIN(val) (((val) & 0x0f) + ((val)>>4)*10)
-#define BIN2BCD(val) ((((val)/10)<<4) + (val)%10)
+#include <linux/types.h>
-/* backwards compat */
-#define BCD_TO_BIN(val) ((val)=BCD2BIN(val))
-#define BIN_TO_BCD(val) ((val)=BIN2BCD(val))
+static inline unsigned int bcd2bin(u8 val)
+{
+ return ((val) & 0x0f) + ((val) >> 4) * 10;
+}
+
+static inline u8 bin2bcd (unsigned int val)
+{
+ return (((val / 10) << 4) | (val % 10));
+}
#endif /* _BCD_H */
# define CONFIG_ENV_IS_IN_FLASH 1
#endif
#define CONFIG_ENV_OVERWRITE 1
-#undef CONFIG_ENV_IS_EMBEDDED
/*-----------------------------------------------------------------------
* FLASH organization
* Environment is embedded in u-boot in the second sector of the flash
*/
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
#ifdef NORFLASH_PS32BIT
# define CONFIG_ENV_OFFSET (0x8000)
# define CONFIG_ENV_SIZE 0x4000
#define CONFIG_ENV_OFFSET 0x4000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
#else
#define CONFIG_ENV_ADDR 0xffe04000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_OFFSET 0x4000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
#else
#define CONFIG_ENV_ADDR 0xffe04000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_OFFSET 0x4000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
/*-----------------------------------------------------------------------
* Cache Configuration
#define CONFIG_ENV_OFFSET 0x4000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
/*-----------------------------------------------------------------------
* Cache Configuration
# define CONFIG_ENV_SECT_SIZE 0x8000
#endif
#undef CONFIG_ENV_OVERWRITE
-#undef CONFIG_ENV_IS_EMBEDDED
/* FLASH organization */
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
# define CONFIG_ENV_IS_IN_FLASH 1
#endif
#undef CONFIG_ENV_OVERWRITE
-#undef CONFIG_ENV_IS_EMBEDDED
/*-----------------------------------------------------------------------
* FLASH organization
#define CONFIG_ENV_OFFSET 0x2000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
/*-----------------------------------------------------------------------
* Cache Configuration
#define CONFIG_ENV_OFFSET 0x2000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
/*-----------------------------------------------------------------------
* Cache Configuration
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR 0xFFF30000 /* Offset of Environment Sector */
#define CONFIG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
-#define CONFIG_ENV_IS_EMBEDDED 1 /* short-cut compile-time test */
#define CONFIG_ENV_OVERWRITE 1 /* Allow modifying the environment */
/*
#define CONFIG_ENV_OFFSET 0x4000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_IS_EMBEDDED 1
#else
#define CONFIG_ENV_ADDR 0xffe04000
#define CONFIG_ENV_SECT_SIZE 0x2000
--- /dev/null
+/*
+ * (C) Copyright 2003-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2006
+ * Eric Schumann, Phytec Messatechnik GmbH
+ *
+ * (C) Copyright 2009
+ * Jon Smirl <jonsmirl@gmail.com>
+ *
+ * (C) Copyright 2009
+ * Eric Millbrandt, DEKA Research and Development Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_BOARDINFO "galaxy5200"
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
+#define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 4 /* console is on PSC4 -> */
+ /* define gps port conf. */
+ /* register later on to */
+ /* enable UART function! */
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_FAT
+
+#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
+
+#if (TEXT_BASE == 0xFE000000) /* Boot low */
+#define CONFIG_SYS_LOWBOOT 1
+#endif
+/* RAMBOOT will be defined automatically in memory section */
+
+#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:256k(ubootl)," \
+ "1792k(kernel),13312k(jffs2),256k(uboot)ro,256k(oftree),-(space)"
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow stopping of boot process */
+ /* even with bootdelay=0 */
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Welcome to U-Boot"\
+ "echo"
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
+#define CONFIG_SYS_XLB_PIPELINING 1
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
+#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+
+/*
+ * EEPROM CAT24WC32 configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010100x */
+#define CONFIG_SYS_I2C_FACT_ADDR 0x52 /* EEPROM CAT24WC32 */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
+#define CONFIG_SYS_EEPROM_SIZE 4096
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 15
+
+/*
+ * RTC configuration
+ */
+#define RTC
+#define CONFIG_RTC_DS3231 1
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+
+/*
+ * Flash configuration
+ */
+
+#define CONFIG_SYS_FLASH_BASE 0xfe000000
+/*
+ * The flash size is autoconfigured, but cpu/mpc5xxx/cpu_init.c needs this
+ * variable defined
+ */
+#define CONFIG_SYS_FLASH_SIZE 0x02000000
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+
+#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
+#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max num of sects on one chip */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
+ /* (= chip selects) */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+
+/*
+ * Use hardware protection. This seems required, as the BDI uses hardware
+ * protection. Without this, U-Boot can't work with this sectors as its
+ * protection is software only by default.
+ */
+#define CONFIG_SYS_FLASH_PROTECTION 1
+
+/*
+ * Environment settings
+ */
+
+#define CONFIG_ENV_IS_IN_EEPROM 1
+#define CONFIG_ENV_OFFSET 0x00 /* environment starts at the */
+ /* beginning of the EEPROM */
+#define CONFIG_ENV_SIZE CONFIG_SYS_EEPROM_SIZE
+
+#define CONFIG_ENV_OVERWRITE 1
+
+/*
+ * SDRAM configuration
+ */
+#define SDRAM_DDR 1
+#define SDRAM_MODE 0x018D0000
+#define SDRAM_EMODE 0x40090000
+#define SDRAM_CONTROL 0x71500F00
+#define SDRAM_CONFIG1 0x73711930
+#define SDRAM_CONFIG2 0x47770000
+
+/*
+ * Memory map
+ */
+#define CONFIG_SYS_MBAR 0xF0000000 /* MBAR has to be switched by other */
+ /* bootloader or debugger config */
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
+
+/* Use SRAM until RAM will be available */
+#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
+
+/* End of used area in SPRAM */
+#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
+
+/* Size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
+ CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
+# define CONFIG_SYS_RAMBOOT 1
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
+#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/* Chip Select configuration for NAND flash */
+#define CONFIG_SYS_CS1_START 0x20000000
+#define CONFIG_SYS_CS1_SIZE 0x90000
+#define CONFIG_SYS_CS1_CFG 0x0002d900
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC 1
+#define CONFIG_MPC5xxx_FEC_MII100
+#define CONFIG_PHY_ADDR 0x01
+#define CONFIG_NO_AUTOLOAD 1
+
+/*
+ * GPIO configuration
+ *
+ * GPS port configuration
+ *
+ * [29:31] = 01x
+ * AC97 on PSC1
+ * PSC1_0 -> AC97 SDATA out
+ * PSC1_1 -> AC97 SDTA in
+ * PSC1_2 -> AC97 SYNC out
+ * PSC1_3 -> AC97 bitclock out
+ * PSC1_4 -> AC97 reset out
+ *
+ * [28] = Reserved
+ *
+ * [25:27] = 110
+ * SPI on PSC2
+ * PSC2_0 -> MOSI
+ * PSC2_1 -> MISO
+ * PSC2_2 -> n/a
+ * PSC2_3 -> CLK
+ * PSC2_4 -> SS
+ *
+ * [24] = Reserved
+ *
+ * [20:23] = 0001
+ * USB on PSC3
+ * PSC3_0 -> USB_OE OE out
+ * PSC3_1 -> USB_TXN Tx- out
+ * PSC3_2 -> USB_TXP Tx+ out
+ * PSC3_3 -> USB_TXD
+ * PSC3_4 -> USB_RXP Rx+ in
+ * PSC3_5 -> USB_RXN Rx- in
+ * PSC3_6 -> USB_PWR PortPower out
+ * PSC3_7 -> USB_SPEED speed out
+ * PSC3_8 -> USB_SUSPEND suspend
+ * PSC3_9 -> USB_OVRCURNT overcurrent in
+ *
+ * [18:19] = 10
+ * Two UARTs
+ *
+ * [17] = 0
+ * USB differential mode
+ *
+ * [16] = 1
+ * PCI disabled
+ *
+ * [12:15] = 0101
+ * Ethernet 100Mbit with MD
+ * ETH_0 -> ETH Txen
+ * ETH_1 -> ETH TxD0
+ * ETH_2 -> ETH TxD1
+ * ETH_3 -> ETH TxD2
+ * ETH_4 -> ETH TxD3
+ * ETH_5 -> ETH Txerr
+ * ETH_6 -> ETH MDC
+ * ETH_7 -> ETH MDIO
+ * ETH_8 -> ETH RxDv
+ * ETH_9 -> ETH RxCLK
+ * ETH_10 -> ETH Collision
+ * ETH_11 -> ETH TxD
+ * ETH_12 -> ETH RxD0
+ * ETH_13 -> ETH RxD1
+ * ETH_14 -> ETH RxD2
+ * ETH_15 -> ETH RxD3
+ * ETH_16 -> ETH Rxerr
+ * ETH_17 -> ETH CRS
+ *
+ * [9:11] = 111
+ * SPI on PSC6
+ * PSC6_0 -> MISO
+ * PSC6_1 -> SS#
+ * PSC6_2 -> MOSI
+ * PSC6_3 -> CLK
+ *
+ * [8] = 0
+ * IrDA/USB 48MHz clock generated internally
+ *
+ * [6:7] = 01
+ * ATA chip selects on csb_4/5
+ * CSB_4 -> ATA_CS0 out
+ * CSB_5 -> ATA_CS1 out
+ *
+ * [5] = 1
+ * PSC3_4 is used as CS6
+ *
+ * [4] = 1
+ * PSC3_5 is used as CS7
+ *
+ * [2:3] = 00
+ * No Alternatives
+ *
+ * [1] = 0
+ * gpio_wkup_7 is GPIO
+ *
+ * [0] = 0
+ * gpio_wkup_6 is GPIO
+ *
+ */
+#define CONFIG_SYS_GPS_PORT_CONFIG 0x0d75a162
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+
+#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+ /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+
+#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
+
+#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
+#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CONFIG_DISPLAY_BOARDINFO 1
+
+#define CONFIG_SYS_HUSH_PARSER 1
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+#define CONFIG_CRC32_VERIFY 1
+
+#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
+ CONFIG_BOOTP_DNS | \
+ CONFIG_BOOTP_DNS2 | \
+ CONFIG_BOOTP_SEND_HOSTNAME )
+
+/*
+ * Various low-level settings
+ */
+#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
+#define CONFIG_SYS_HID0_FINAL HID0_ICE
+
+/* no burst access on the LPB */
+#define CONFIG_SYS_CS_BURST 0x00000000
+/* one deadcycle for the 33MHz statemachine */
+#define CONFIG_SYS_CS_DEADCYCLE 0x33333331
+
+#define CONFIG_SYS_BOOTCS_CFG 0x0002d900
+#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
+
+#define CONFIG_SYS_RESET_ADDRESS 0xff000000
+
+/*
+ * USB settings
+ */
+#define CONFIG_USB_CLOCK 0x0001bbbb
+/* USB is on PSC3 */
+#define CONFIG_PSC3_USB
+#define CONFIG_USB_CONFIG 0x00000100
+#define CONFIG_USB_OHCI
+#define CONFIG_USB_STORAGE
+
+/*
+ * IDE/ATA stuff Supports IDE harddisk
+ */
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CONFIG_IDE_RESET 1 /* reset for ide supported */
+#define CONFIG_IDE_PREINIT
+#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
+#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
+#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
+/* Offset for data I/O */
+#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
+/* Offset for normal register accesses */
+#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
+/* Offset for alternate registers */
+#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
+/* Interval between registers */
+#define CONFIG_SYS_ATA_STRIDE 4
+#define CONFIG_ATAPI 1
+
+/* we enable IDE and FAT support, so we also need partition support */
+#define CONFIG_DOS_PARTITION 1
+
+/*
+ * Open Firmware flat tree
+ */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+#define OF_CPU "PowerPC,5200@0"
+#define OF_TBCLK CONFIG_SYS_MPC5XXX_CLKIN
+#define OF_SOC "soc5200@f0000000"
+#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2600"
+
+#endif /* __CONFIG_H */
#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment */
#define CONFIG_ENV_ADDR 0xFFFFE000 /* Address of Environment Sector */
#define CONFIG_ENV_SECT_SIZE 0x2000 /* use the top-most 8k boot sector */
-#define CONFIG_ENV_IS_EMBEDDED 1 /* short-cut compile-time test */
#else
/* Final version: environment in EEPROM */
#define CONFIG_ENV_IS_IN_EEPROM 1
# if defined(CONFIG_ENV_ADDR_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND)
# define CONFIG_SYS_REDUNDAND_ENVIRONMENT 1
# endif
+# ifdef CONFIG_ENV_IS_EMBEDDED
+# error "do not define CONFIG_ENV_IS_EMBEDDED in your board config"
+# error "it is calculated automatically for you"
+# endif
#endif /* CONFIG_ENV_IS_IN_FLASH */
#if defined(CONFIG_ENV_IS_IN_NAND)
# ifdef CONFIG_ENV_OFFSET_REDUND
# define CONFIG_SYS_REDUNDAND_ENVIRONMENT
# endif
-# ifdef CONFIG_ENV_IS_EMBEDDED
-# define ENV_IS_EMBEDDED 1
-# endif
#endif /* CONFIG_ENV_IS_IN_NAND */
#if defined(CONFIG_ENV_IS_IN_MG_DISK)
# ifndef CONFIG_ENV_SIZE
# error "Need to define CONFIG_ENV_SIZE when using CONFIG_ENV_IS_IN_MG_DISK"
# endif
-# ifdef CONFIG_ENV_IS_EMBEDDED
-# error "CONFIG_ENV_IS_EMBEDDED not supported when using CONFIG_ENV_IS_IN_MG_DISK"
-# endif
#endif /* CONFIG_ENV_IS_IN_MG_DISK */
+/* Embedded env is only supported for some flash types */
+#ifdef CONFIG_ENV_IS_EMBEDDED
+# if !defined(CONFIG_ENV_IS_IN_FLASH) && \
+ !defined(CONFIG_ENV_IS_IN_NAND) && \
+ !defined(CONFIG_ENV_IS_IN_ONENAND)
+# error "CONFIG_ENV_IS_EMBEDDED not supported for your flash type"
+# endif
+#endif
+
+/*
+ * For the flash types where embedded env is supported, but it cannot be
+ * calculated automatically (i.e. NAND), take the board opt-in.
+ */
+#if defined(CONFIG_ENV_IS_EMBEDDED) && !defined(ENV_IS_EMBEDDED)
+# define ENV_IS_EMBEDDED 1
+#endif
+
+/* The build system likes to know if the env is embedded */
+#ifdef DO_DEPS_ONLY
+# ifdef ENV_IS_EMBEDDED
+# define CONFIG_ENV_IS_EMBEDDED
+# endif
+#endif
+
#include "compiler.h"
#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define RTC_VALID RTC_REG_D
# define RTC_VRT 0x80 /* valid RAM and time */
/**********************************************************************/
-
-/* example: !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)
- * determines if the following two #defines are needed
- */
-#ifndef BCD_TO_BIN
-#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
-#endif
-
-#ifndef BIN_TO_BCD
-#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10)
-#endif
-
#endif /* _MC146818RTC_H */
#ifndef _RTC_H_
#define _RTC_H_
+/* bcd<->bin functions are needed by almost all the RTC drivers, let's include
+ * it there instead of in evey single driver */
+
+#include <bcd.h>
+
/*
* The struct used to pass data from the generic interface code to
* the hardware dependend low-level code ande vice versa. Identical
projects / karo-tx-uboot.git / commitdiff