siemens:cosmetic, dxr2: rename dxr2 to draco

The actual board name is draco and dxr2 is the target name.
In the future we'll have different targets based on draco board.
All changes are purely non-functional and basically rename dxr2
to draco.

One style fix in board.c that existed already before.

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Reviewed-by: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

diff --git a/board/siemens/dxr2/Makefile b/board/siemens/draco/Makefile
similarity index 100%
rename from board/siemens/dxr2/Makefile
rename to board/siemens/draco/Makefile

diff --git a/board/siemens/dxr2/board.c b/board/siemens/draco/board.c
similarity index 77%
rename from board/siemens/dxr2/board.c
rename to board/siemens/draco/board.c
index e9f157a9ea321e8a287042c35eeeb90999fcd114..9be2e344f8da37188cfcf12230016b0b91a3883e 100644 (file)
--- a/board/siemens/dxr2/board.c
+++ b/board/siemens/draco/board.c
@@ -1,5 +1,5 @@
 /*
- * Board functions for TI AM335X based dxr2 board
+ * Board functions for TI AM335X based draco board
  * (C) Copyright 2013 Siemens Schweiz AG
  * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
  *
@@ -37,7 +37,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_SPL_BUILD
-static struct dxr2_baseboard_id __attribute__((section(".data"))) settings;
+static struct draco_baseboard_id __attribute__((section(".data"))) settings;
 
 #if DDR_PLL_FREQ == 303
 /* Default@303MHz-i0 */
@@ -138,11 +138,10 @@ static int read_eeprom(void)
                set_default_ddr3_timings();
        }
 
-       if (MAGIC_CHIP == settings.chip.magic) {
+       if (MAGIC_CHIP == settings.chip.magic)
                print_chip_data();
-       } else {
+       else
                printf("Warning: No chip data in eeprom\n");
-       }
 
        print_ddr3_timings();
 #endif
@@ -152,48 +151,48 @@ static int read_eeprom(void)
 #ifdef CONFIG_SPL_BUILD
 static void board_init_ddr(void)
 {
-struct emif_regs dxr2_ddr3_emif_reg_data = {
+struct emif_regs draco_ddr3_emif_reg_data = {
        .zq_config = 0x50074BE4,
 };
 
-struct ddr_data dxr2_ddr3_data = {
+struct ddr_data draco_ddr3_data = {
 };
 
-struct cmd_control dxr2_ddr3_cmd_ctrl_data = {
+struct cmd_control draco_ddr3_cmd_ctrl_data = {
 };
 
-struct ctrl_ioregs dxr2_ddr3_ioregs = {
+struct ctrl_ioregs draco_ddr3_ioregs = {
 };
 
        /* pass values from eeprom */
-       dxr2_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;
-       dxr2_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2;
-       dxr2_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3;
-       dxr2_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 =
+       draco_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;
+       draco_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2;
+       draco_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3;
+       draco_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 =
                settings.ddr3.emif_ddr_phy_ctlr_1;
-       dxr2_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;
-       dxr2_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;
-
-       dxr2_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;
-       dxr2_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0;
-       dxr2_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0;
-       dxr2_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0;
-
-       dxr2_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio;
-       dxr2_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout;
-       dxr2_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio;
-       dxr2_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout;
-       dxr2_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio;
-       dxr2_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout;
-
-       dxr2_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val,
-       dxr2_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val,
-       dxr2_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val,
-       dxr2_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val,
-       dxr2_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val,
-
-       config_ddr(DDR_PLL_FREQ, &dxr2_ddr3_ioregs, &dxr2_ddr3_data,
-                  &dxr2_ddr3_cmd_ctrl_data, &dxr2_ddr3_emif_reg_data, 0);
+       draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;
+       draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;
+
+       draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;
+       draco_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0;
+       draco_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0;
+       draco_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0;
+
+       draco_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio;
+       draco_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout;
+       draco_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio;
+       draco_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout;
+       draco_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio;
+       draco_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout;
+
+       draco_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val,
+       draco_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val,
+       draco_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val,
+       draco_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val,
+       draco_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val,
+
+       config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data,
+                  &draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0);
 }
 
 static void spl_siemens_board_init(void)

diff --git a/board/siemens/dxr2/board.h b/board/siemens/draco/board.h
similarity index 98%
rename from board/siemens/dxr2/board.h
rename to board/siemens/draco/board.h
index a59ffb01092b78e28e9ffbde35002322899b7275..ff8ab764c51c62cfb5b65b530430cc87406ddd73 100644 (file)
--- a/board/siemens/dxr2/board.h
+++ b/board/siemens/draco/board.h
@@ -50,7 +50,7 @@ struct chip_data {
        char shwver[7];
 };
 
-struct dxr2_baseboard_id {
+struct draco_baseboard_id {
        struct ddr3_data ddr3;
        struct chip_data chip;
 };

diff --git a/board/siemens/dxr2/mux.c b/board/siemens/draco/mux.c
similarity index 99%
rename from board/siemens/dxr2/mux.c
rename to board/siemens/draco/mux.c
index f2314b5d3e533cf521f09a2d540aab19a7a39cc5..eaa3c70798ea8e60ecc1c86c87a5d1bc650eb33a 100644 (file)
--- a/board/siemens/dxr2/mux.c
+++ b/board/siemens/draco/mux.c
@@ -1,5 +1,5 @@
 /*
- * pinmux setup for siemens dxr2 board
+ * pinmux setup for siemens draco board
  *
  * (C) Copyright 2013 Siemens Schweiz AG
  * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.

diff --git a/boards.cfg b/boards.cfg
index 2eadd0d9720e6785daf7ddd9eb8919938efbaeaa..170c3650e42022d404af23ebf34be85741a9be50 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -260,7 +260,7 @@ Active  arm         armv7          am33xx      compulab        cm_t335
 Active  arm         armv7          am33xx      isee            igep0033            am335x_igep0033                      -                                                                                                                                 Enric Balletbo i Serra <eballetbo@iseebcn.com>
 Active  arm         armv7          am33xx      phytec          pcm051              pcm051_rev1                          pcm051:REV1                                                                                                                       Lars Poeschel <poeschel@lemonage.de>
 Active  arm         armv7          am33xx      phytec          pcm051              pcm051_rev3                          pcm051:REV3                                                                                                                       Lars Poeschel <poeschel@lemonage.de>
-Active  arm         armv7          am33xx      siemens         dxr2                dxr2                                 -                                                                                                                                 Roger Meier <r.meier@siemens.com>
+Active  arm         armv7          am33xx      siemens         draco               dxr2                                 -                                                                                                                                 Roger Meier <r.meier@siemens.com>
 Active  arm         armv7          am33xx      siemens         pxm2                pxm2                                 -                                                                                                                                 Roger Meier <r.meier@siemens.com>
 Active  arm         armv7          am33xx      siemens         rut                 rut                                  -                                                                                                                                 Roger Meier <r.meier@siemens.com>
 Active  arm         armv7          am33xx      silica          pengwyn             pengwyn                              -                                                                                                                                 Lothar Felten <lothar.felten@gmail.com>