powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.h

Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 4e665d399442f1c2537c29231c367ccc127d6845..b1d219b7aac1f5ba073105832b37dab057fd7ff8 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2060,8 +2060,17 @@ typedef struct ccsr_sec {
 #define CONFIG_SYS_MPC85xx_LBC_OFFSET          0x5000
 #define CONFIG_SYS_MPC85xx_DDR2_OFFSET         0x6000
 #define CONFIG_SYS_MPC85xx_ESPI_OFFSET         0x7000
+#define CONFIG_SYS_MPC85xx_PCI1_OFFSET         0x8000
 #define CONFIG_SYS_MPC85xx_PCIX_OFFSET         0x8000
+#define CONFIG_SYS_MPC85xx_PCI2_OFFSET         0x9000
 #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET                0x9000
+#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET         0xa000
+#define CONFIG_SYS_MPC85xx_PCIE2_OFFSET         0x9000
+#if defined(CONFIG_MPC8572) || defined(CONFIG_P2020)
+#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET         0x8000
+#else
+#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET         0xb000
+#endif
 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET         0xF000
 #define CONFIG_SYS_MPC85xx_SATA1_OFFSET                0x18000
 #define CONFIG_SYS_MPC85xx_SATA2_OFFSET                0x19000
@@ -2138,6 +2147,17 @@ typedef struct ccsr_sec {
 #define CONFIG_SYS_FSL_SEC_ADDR \
        (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
 
+#define CONFIG_SYS_PCI1_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCI1_OFFSET)
+#define CONFIG_SYS_PCI2_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCI2_OFFSET)
+#define CONFIG_SYS_PCIE1_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE1_OFFSET)
+#define CONFIG_SYS_PCIE2_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE2_OFFSET)
+#define CONFIG_SYS_PCIE3_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
+
 #define TSEC_BASE_ADDR         (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
 #define MDIO_BASE_ADDR         (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
 

diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index 49a86fd4ccfd54cd2c99fe12892ef1ff76ddffbf..c133033bcc2b34d98a5c6b10d91002f1f5bc141f 100644 (file)
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -91,9 +91,6 @@
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
 #define PCI_SPEED              33333000        /* CPLD currenlty does not have PCI setup info */
-#define CONFIG_SYS_PCI1_ADDR   (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR   (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR  (CONFIG_SYS_CCSRBAR+0xa000)
 
 /* DDR Setup */
 #define CONFIG_FSL_DDR2

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index a014ad094164162c30e338dbe6afb3a95cce9299..24a75c601180e5d1c82624bd4dfda9cc0669f488 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -125,11 +125,6 @@
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default */
 #endif
 
-#define CONFIG_SYS_PCI1_ADDR           (CONFIG_SYS_CCSRBAR + 0x8000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR + 0xa000)
-#define CONFIG_SYS_PCIE2_ADDR          (CONFIG_SYS_CCSRBAR + 0x9000)
-#define CONFIG_SYS_PCIE3_ADDR          (CONFIG_SYS_CCSRBAR + 0xb000)
-
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR2

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index faba353119ef72ff9ce202cedf258ddf217e5a5b..96fd0241cac97ea16627f567003bf46031e23186 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -79,11 +79,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
-#define CONFIG_SYS_PCI1_ADDR           (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
-#define CONFIG_SYS_PCIE2_ADDR          (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE3_ADDR          (CONFIG_SYS_CCSRBAR+0xb000)
-
 /* DDR Setup */
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index fdd3597f790052365805ae4cba9d9e566ad24547..23594a74cb4c6d08a1a1053f48412949bafc6033 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -80,10 +80,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
-#define CONFIG_SYS_PCI1_ADDR   (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR   (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR  (CONFIG_SYS_CCSRBAR+0xa000)
-
 /* DDR Setup */
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 0cc2d474284149e8aada3771c19cd6646db33038..bc6c5c7b46182aea2ca5b59ebaf216d8f9f65e8b 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -75,9 +75,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
-#define CONFIG_SYS_PCI1_ADDR           (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
-
 /* DDR Setup */
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index bb7bb47d65d11ae95d83b03eaf2661c5d9ef456f..92c2b49c1f58b298fc0301da9319891cbf3bc739 100644 (file)
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -103,9 +103,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default */
 #endif
 
-#define CONFIG_SYS_PCI1_ADDR           (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
-
 /* DDR Setup */
 #define CONFIG_FSL_DDR3
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 57c2f2f23637cf1fafdb6b25e192dbda1e4755da..51e5d06db93cb727e07d34893fca7e1164921f6e 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -89,10 +89,6 @@
 #endif
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
-#define CONFIG_SYS_PCIE3_ADDR          (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE2_ADDR          (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
-
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR2

diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index b42b5d09f14d0938bdadb4090d67e667f38efcdb..d31b5505e94c5da16acb3e4913c91117287b0fd9 100644 (file)
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -60,10 +60,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS                0xfffe00000ull
 #define CONFIG_SYS_IMMR                        CONFIG_SYS_CCSRBAR
 
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR + 0x9000) /* pci0 */
-#define CONFIG_SYS_PCIE2_ADDR          (CONFIG_SYS_CCSRBAR + 0xa000) /* pci1 */
-#define CONFIG_SYS_PCIE3_ADDR          (CONFIG_SYS_CCSRBAR + 0xb000) /* pci2 */
-
 /* DDR Setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_VERY_BIG_RAM

diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 3cebbab53c55858a9115323331679192ffe430ca..fca3cddf110e144b90d25890f91b93b431fc4695 100644 (file)
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -129,9 +129,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default */
 #endif
 
-#define CONFIG_SYS_PCIE2_ADDR          (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
-
 /* DDR Setup */
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE

diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 569da4f645127f493346d2c612bbbd54b8819c41..bf2acbf4c4716dea41561f528eea343d54b682a1 100644 (file)
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -90,10 +90,6 @@
 #endif
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
-#define CONFIG_SYS_PCIE3_ADDR          (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE2_ADDR          (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR+0xa000)
-
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR3                1

diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 90abe14f24914fe47c203f1ef4d44af0a1fb1e05..d8f2602e59a3b6f2fdef04aafdfa3e97dd6255f0 100644 (file)
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -137,10 +137,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR    */
 
-#define CONFIG_SYS_PCI1_ADDR           (CONFIG_SYS_CCSRBAR + 0x8000)
-#define CONFIG_SYS_PCI2_ADDR           (CONFIG_SYS_CCSRBAR + 0x9000)
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR + 0xa000)
-
 /*
  * DDR Setup
  */

diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h
index df5ef784892518436d21ec9f09065e2ff4c960b9..83aeffd29fdfb4722f3631c7d36d301bbb0c0c19 100644 (file)
--- a/include/configs/XPEDITE5200.h
+++ b/include/configs/XPEDITE5200.h
@@ -81,7 +81,6 @@
 #define CONFIG_SYS_CCSRBAR             0xef000000      /* relocated CCSRBAR */
 #define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR   (CONFIG_SYS_CCSRBAR + 0x8000)
 
 /*
  * Diagnostics

diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h
index 1d6091caf67f641da19094c70735492b64a3ce8a..fc4a986039a59242fd277dd52739839de3464fc4 100644 (file)
--- a/include/configs/XPEDITE5370.h
+++ b/include/configs/XPEDITE5370.h
@@ -99,8 +99,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR             0xef000000      /* relocated CCSRBAR */
 #define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCIE1_ADDR          (CONFIG_SYS_CCSRBAR + 0xa000)
-#define CONFIG_SYS_PCIE2_ADDR          (CONFIG_SYS_CCSRBAR + 0x9000)
 
 /*
  * Diagnostics

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 3f4056e82b46963b09af6ac126f56cc8b941f85d..c8b8d0d80dabf4a9c675e7f0028660d1af2e6c44 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -109,10 +109,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 
-#define CONFIG_SYS_PCI1_ADDR   (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR   (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR  (CONFIG_SYS_CCSRBAR+0xa000)
-
 /* DDR Setup */
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE