2 * armboot - Startup Code for ARM925 CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1510 from ARM920 code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm-offsets.h>
38 *************************************************************************
40 * Jump vector table as in table 3.1 in [1]
42 *************************************************************************
48 ldr pc, _undefined_instruction
49 ldr pc, _software_interrupt
50 ldr pc, _prefetch_abort
56 _undefined_instruction: .word undefined_instruction
57 _software_interrupt: .word software_interrupt
58 _prefetch_abort: .word prefetch_abort
59 _data_abort: .word data_abort
60 _not_used: .word not_used
64 .balignl 16,0xdeadbeef
68 *************************************************************************
70 * Startup Code (reset vector)
72 * do important init only if we don't start from memory!
73 * setup Memory and board specific bits prior to relocation.
74 * relocate armboot to ram
77 *************************************************************************
82 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
83 .word CONFIG_SPL_TEXT_BASE
85 .word CONFIG_SYS_TEXT_BASE
89 * These are defined in the board-specific linker script.
90 * Subtracting _start from them lets the linker put their
91 * relative position in the executable instead of leaving
96 .word __bss_start - _start
100 .word __bss_end - _start
106 #ifdef CONFIG_USE_IRQ
107 /* IRQ stack memory (calculated at run-time) */
108 .globl IRQ_STACK_START
112 /* IRQ stack memory (calculated at run-time) */
113 .globl FIQ_STACK_START
118 /* IRQ stack memory (calculated at run-time) + 8 bytes */
119 .globl IRQ_STACK_START_IN
124 * the actual reset code
129 * set the cpu to SVC32 mode
139 mov r1, #0x81 /* Set ARM925T configuration. */
140 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
143 * turn off the watchdog, unlock/diable sequence
152 * mask all IRQs by setting all bits in the INTMR - default
155 ldr r0, =REG_IHL1_MIR
157 ldr r0, =REG_IHL2_MIR
161 * wait for dpll to lock
172 * we do sys-critical inits only at reboot,
173 * not when booting from ram!
175 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
181 /*------------------------------------------------------------------------------*/
183 .globl c_runtime_cpu_setup
189 *************************************************************************
191 * CPU_init_critical registers
193 * setup important registers
194 * setup memory timing
196 *************************************************************************
202 * flush v4 I/D caches
205 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
206 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
209 * disable MMU stuff and caches
211 mrc p15, 0, r0, c1, c0, 0
212 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
213 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
214 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
215 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
216 mcr p15, 0, r0, c1, c0, 0
219 * Go setup Memory and board specific bits prior to relocation.
221 mov ip, lr /* perserve link reg across call */
222 bl lowlevel_init /* go setup pll,mux,memory */
223 mov lr, ip /* restore link */
224 mov pc, lr /* back to my caller */
226 *************************************************************************
230 *************************************************************************
236 #define S_FRAME_SIZE 72
258 #define MODE_SVC 0x13
262 * use bad_save_user_regs for abort/prefetch/undef/swi ...
263 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
266 .macro bad_save_user_regs
267 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
268 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
270 ldr r2, IRQ_STACK_START_IN
271 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
272 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
276 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
277 mov r0, sp @ save current stack into r0 (param register)
280 .macro irq_save_user_regs
281 sub sp, sp, #S_FRAME_SIZE
282 stmia sp, {r0 - r12} @ Calling r0-r12
283 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
284 stmdb r8, {sp, lr}^ @ Calling SP, LR
285 str lr, [r8, #0] @ Save calling PC
287 str r6, [r8, #4] @ Save CPSR
288 str r0, [r8, #8] @ Save OLD_R0
292 .macro irq_restore_user_regs
293 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
295 ldr lr, [sp, #S_PC] @ Get PC
296 add sp, sp, #S_FRAME_SIZE
297 subs pc, lr, #4 @ return & move spsr_svc into cpsr
301 ldr r13, IRQ_STACK_START_IN
303 str lr, [r13] @ save caller lr in position 0 of saved stack
304 mrs lr, spsr @ get the spsr
305 str lr, [r13, #4] @ save spsr in position 1 of saved stack
307 mov r13, #MODE_SVC @ prepare SVC-Mode
309 msr spsr, r13 @ switch modes, make sure moves will execute
310 mov lr, pc @ capture return pc
311 movs pc, lr @ jump to next instruction & switch modes.
314 .macro get_irq_stack @ setup IRQ stack
315 ldr sp, IRQ_STACK_START
318 .macro get_fiq_stack @ setup FIQ stack
319 ldr sp, FIQ_STACK_START
326 undefined_instruction:
329 bl do_undefined_instruction
335 bl do_software_interrupt
355 #ifdef CONFIG_USE_IRQ
362 irq_restore_user_regs
367 /* someone ought to write a more effiction fiq_save_user_regs */
370 irq_restore_user_regs
391 ldr r1, rstctl1 /* get clkm1 reset ctl */
392 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
393 strh r3, [r1] /* force reset */