arch/arm/dts/ls1021a-twr.dts

   1 /*
   2  * Freescale ls1021a TWR board device tree source
   3  *
   4  * Copyright 2013-2015 Freescale Semiconductor, Inc.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 /dts-v1/;
  10 #include "ls1021a.dtsi"
  11
  12 / {
  13         model = "LS1021A TWR Board";
  14
  15         aliases {
  16                 enet2_rgmii_phy = &rgmii_phy1;
  17                 enet0_sgmii_phy = &sgmii_phy2;
  18                 enet1_sgmii_phy = &sgmii_phy0;
  19         };
  20 };
  21
  22 &dspi1 {
  23         bus-num = <0>;
  24         status = "okay";
  25
  26         dspiflash: s25fl064k@0 {
  27                 #address-cells = <1>;
  28                 #size-cells = <1>;
  29                 compatible = "spansion,s25fl064k";
  30                 spi-max-frequency = <16000000>;
  31                 spi-cpol;
  32                 spi-cpha;
  33                 reg = <0>;
  34         };
  35 };
  36
  37 &i2c0 {
  38         status = "okay";
  39 };
  40
  41 &i2c1 {
  42         status = "okay";
  43 };
  44
  45 &ifc {
  46         #address-cells = <2>;
  47         #size-cells = <1>;
  48         /* NOR Flash on board */
  49         ranges = <0x0 0x0 0x0 0x60000000 0x08000000>;
  50         status = "okay";
  51
  52         nor@0,0 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 compatible = "cfi-flash";
  56                 reg = <0x0 0x0 0x8000000>;
  57                 bank-width = <2>;
  58                 device-width = <1>;
  59         };
  60 };
  61
  62 &lpuart0 {
  63         status = "okay";
  64 };
  65
  66 &mdio0 {
  67         sgmii_phy0: ethernet-phy@0 {
  68                 reg = <0x0>;
  69         };
  70         rgmii_phy1: ethernet-phy@1 {
  71                 reg = <0x1>;
  72         };
  73         sgmii_phy2: ethernet-phy@2 {
  74                 reg = <0x2>;
  75         };
  76         tbi1: tbi-phy@1f {
  77                 reg = <0x1f>;
  78                 device_type = "tbi-phy";
  79         };
  80 };
  81
  82 &uart0 {
  83         status = "okay";
  84 };
  85
  86 &uart1 {
  87         status = "okay";
  88 };