arch/blackfin/include/asm/dma.h

   1 /*
   2  * dma.h - Blackfin DMA defines/structures/etc...
   3  *
   4  * Copyright 2004-2008 Analog Devices Inc.
   5  * Licensed under the GPL-2 or later.
   6  */
   7
   8 #ifndef _BLACKFIN_DMA_H_
   9 #define _BLACKFIN_DMA_H_
  10
  11 #include <linux/types.h>
  12 #ifdef __ADSPBF60x__
  13 #include <asm/mach-common/bits/dde.h>
  14 #else
  15 #include <asm/mach-common/bits/dma.h>
  16 #endif
  17
  18 struct dmasg_large {
  19         void *next_desc_addr;
  20         u32 start_addr;
  21         u16 cfg;
  22         u16 x_count;
  23         s16 x_modify;
  24         u16 y_count;
  25         s16 y_modify;
  26 } __attribute__((packed));
  27
  28 struct dmasg {
  29         u32 start_addr;
  30         u16 cfg;
  31         u16 x_count;
  32         s16 x_modify;
  33         u16 y_count;
  34         s16 y_modify;
  35 } __attribute__((packed));
  36
  37 struct dma_register {
  38 #ifdef __ADSPBF60x__
  39         void *next_desc_ptr;    /* DMA Next Descriptor Pointer register */
  40         u32 start_addr;         /* DMA Start address  register */
  41         u32 config;             /* DMA Configuration register */
  42
  43         u32 x_count;            /* DMA x_count register */
  44         s32 x_modify;           /* DMA x_modify register */
  45         u32 y_count;            /* DMA y_count register */
  46         s32 y_modify;           /* DMA y_modify register */
  47         u32 __pad0[2];
  48
  49         void *curr_desc_ptr;    /* DMA Curr Descriptor Pointer register */
  50         void *prev_desc_ptr;    /* DMA Prev Descriptor Pointer register */
  51         void *curr_addr;        /* DMA Current Address Pointer register */
  52         u32 status;             /* DMA irq status register */
  53         u32 curr_x_count;       /* DMA Current x-count register */
  54         u32 curr_y_count;       /* DMA Current y-count register */
  55         u32 __pad1[2];
  56
  57         u32 bw_limit;           /* DMA Bandwidth Limit Count */
  58         u32 curr_bw_limit;      /* DMA curr Bandwidth Limit Count */
  59         u32 bw_monitor;         /* DMA Bandwidth Monitor Count */
  60         u32 curr_bw_monitor;    /* DMA curr Bandwidth Monitor Count */
  61 #else
  62         void *next_desc_ptr;    /* DMA Next Descriptor Pointer register */
  63         u32 start_addr;         /* DMA Start address  register */
  64
  65         u16 config;             /* DMA Configuration register */
  66         u16 dummy1;             /* DMA Configuration register */
  67
  68         u32 reserved;
  69
  70         u16 x_count;            /* DMA x_count register */
  71         u16 dummy2;
  72
  73         s16 x_modify;           /* DMA x_modify register */
  74         u16 dummy3;
  75
  76         u16 y_count;            /* DMA y_count register */
  77         u16 dummy4;
  78
  79         s16 y_modify;           /* DMA y_modify register */
  80         u16 dummy5;
  81
  82         void *curr_desc_ptr;    /* DMA Current Descriptor Pointer register */
  83
  84         u32 curr_addr_ptr;      /* DMA Current Address Pointer register */
  85
  86         u16 status;             /* DMA irq status register */
  87         u16 dummy6;
  88
  89         u16 peripheral_map;     /* DMA peripheral map register */
  90         u16 dummy7;
  91
  92         u16 curr_x_count;       /* DMA Current x-count register */
  93         u16 dummy8;
  94
  95         u32 reserved2;
  96
  97         u16 curr_y_count;       /* DMA Current y-count register */
  98         u16 dummy9;
  99
 100         u32 reserved3;
 101 #endif
 102 };
 103
 104 #endif