arch/powerpc/cpu/mpc8xxx/ddr/interactive.c

   1 /*
   2  * Copyright 2010-2012 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /*
   8  * Generic driver for Freescale DDR/DDR2/DDR3 memory controller.
   9  * Based on code from spd_sdram.c
  10  * Author: James Yang [at freescale.com]
  11  *         York Sun [at freescale.com]
  12  */
  13
  14 #include <common.h>
  15 #include <linux/ctype.h>
  16 #include <asm/types.h>
  17
  18 #include <asm/fsl_ddr_sdram.h>
  19 #include "ddr.h"
  20
  21 /* Option parameter Structures */
  22 struct options_string {
  23         const char *option_name;
  24         size_t offset;
  25         unsigned int size;
  26         const char printhex;
  27 };
  28
  29 static unsigned int picos_to_mhz(unsigned int picos)
  30 {
  31         return 1000000 / picos;
  32 }
  33
  34 static void print_option_table(const struct options_string *table,
  35                          int table_size,
  36                          const void *base)
  37 {
  38         unsigned int i;
  39         unsigned int *ptr;
  40         unsigned long long *ptr_l;
  41
  42         for (i = 0; i < table_size; i++) {
  43                 switch (table[i].size) {
  44                 case 4:
  45                         ptr = (unsigned int *) (base + table[i].offset);
  46                         if (table[i].printhex) {
  47                                 printf("%s = 0x%08X\n",
  48                                         table[i].option_name, *ptr);
  49                         } else {
  50                                 printf("%s = %u\n",
  51                                         table[i].option_name, *ptr);
  52                         }
  53                         break;
  54                 case 8:
  55                         ptr_l = (unsigned long long *) (base + table[i].offset);
  56                         printf("%s = %llu\n",
  57                                 table[i].option_name, *ptr_l);
  58                         break;
  59                 default:
  60                         printf("Unrecognized size!\n");
  61                         break;
  62                 }
  63         }
  64 }
  65
  66 static int handle_option_table(const struct options_string *table,
  67                          int table_size,
  68                          void *base,
  69                          const char *opt,
  70                          const char *val)
  71 {
  72         unsigned int i;
  73         unsigned int value, *ptr;
  74         unsigned long long value_l, *ptr_l;
  75
  76         for (i = 0; i < table_size; i++) {
  77                 if (strcmp(table[i].option_name, opt) != 0)
  78                         continue;
  79                 switch (table[i].size) {
  80                 case 4:
  81                         value = simple_strtoul(val, NULL, 0);
  82                         ptr = base + table[i].offset;
  83                         *ptr = value;
  84                         break;
  85                 case 8:
  86                         value_l = simple_strtoull(val, NULL, 0);
  87                         ptr_l = base + table[i].offset;
  88                         *ptr_l = value_l;
  89                         break;
  90                 default:
  91                         printf("Unrecognized size!\n");
  92                         break;
  93                 }
  94                 return 1;
  95         }
  96
  97         return 0;
  98 }
  99
 100 static void fsl_ddr_generic_edit(void *pdata,
 101                            void *pend,
 102                            unsigned int element_size,
 103                            unsigned int element_num,
 104                            unsigned int value)
 105 {
 106         char *pcdata = (char *)pdata;           /* BIG ENDIAN ONLY */
 107
 108         pcdata += element_num * element_size;
 109         if ((pcdata + element_size) > (char *) pend) {
 110                 printf("trying to write past end of data\n");
 111                 return;
 112         }
 113
 114         switch (element_size) {
 115         case 1:
 116                 __raw_writeb(value, pcdata);
 117                 break;
 118         case 2:
 119                 __raw_writew(value, pcdata);
 120                 break;
 121         case 4:
 122                 __raw_writel(value, pcdata);
 123                 break;
 124         default:
 125                 printf("unexpected element size %u\n", element_size);
 126                 break;
 127         }
 128 }
 129
 130 static void fsl_ddr_spd_edit(fsl_ddr_info_t *pinfo,
 131                        unsigned int ctrl_num,
 132                        unsigned int dimm_num,
 133                        unsigned int element_num,
 134                        unsigned int value)
 135 {
 136         generic_spd_eeprom_t *pspd;
 137
 138         pspd = &(pinfo->spd_installed_dimms[ctrl_num][dimm_num]);
 139         fsl_ddr_generic_edit(pspd, pspd + 1, 1, element_num, value);
 140 }
 141
 142 #define COMMON_TIMING(x) {#x, offsetof(common_timing_params_t, x), \
 143         sizeof((common_timing_params_t *)0)->x, 0}
 144
 145 static void lowest_common_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
 146                                         unsigned int ctrl_num,
 147                                         const char *optname_str,
 148                                         const char *value_str)
 149 {
 150         common_timing_params_t *p = &pinfo->common_timing_params[ctrl_num];
 151
 152         static const struct options_string options[] = {
 153                 COMMON_TIMING(tCKmin_X_ps),
 154                 COMMON_TIMING(tCKmax_ps),
 155                 COMMON_TIMING(tCKmax_max_ps),
 156                 COMMON_TIMING(tRCD_ps),
 157                 COMMON_TIMING(tRP_ps),
 158                 COMMON_TIMING(tRAS_ps),
 159                 COMMON_TIMING(tWR_ps),
 160                 COMMON_TIMING(tWTR_ps),
 161                 COMMON_TIMING(tRFC_ps),
 162                 COMMON_TIMING(tRRD_ps),
 163                 COMMON_TIMING(tRC_ps),
 164                 COMMON_TIMING(refresh_rate_ps),
 165                 COMMON_TIMING(tIS_ps),
 166                 COMMON_TIMING(tIH_ps),
 167                 COMMON_TIMING(tDS_ps),
 168                 COMMON_TIMING(tDH_ps),
 169                 COMMON_TIMING(tRTP_ps),
 170                 COMMON_TIMING(tDQSQ_max_ps),
 171                 COMMON_TIMING(tQHS_ps),
 172                 COMMON_TIMING(ndimms_present),
 173                 COMMON_TIMING(lowest_common_SPD_caslat),
 174                 COMMON_TIMING(highest_common_derated_caslat),
 175                 COMMON_TIMING(additive_latency),
 176                 COMMON_TIMING(all_DIMMs_burst_lengths_bitmask),
 177                 COMMON_TIMING(all_DIMMs_registered),
 178                 COMMON_TIMING(all_DIMMs_unbuffered),
 179                 COMMON_TIMING(all_DIMMs_ECC_capable),
 180                 COMMON_TIMING(total_mem),
 181                 COMMON_TIMING(base_address),
 182         };
 183         static const unsigned int n_opts = ARRAY_SIZE(options);
 184
 185         if (handle_option_table(options, n_opts, p, optname_str, value_str))
 186                 return;
 187
 188         printf("Error: couldn't find option string %s\n", optname_str);
 189 }
 190
 191 #define DIMM_PARM(x) {#x, offsetof(dimm_params_t, x), \
 192         sizeof((dimm_params_t *)0)->x, 0}
 193
 194 static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
 195                                    unsigned int ctrl_num,
 196                                    unsigned int dimm_num,
 197                                    const char *optname_str,
 198                                    const char *value_str)
 199 {
 200         dimm_params_t *p = &(pinfo->dimm_params[ctrl_num][dimm_num]);
 201
 202         static const struct options_string options[] = {
 203                 DIMM_PARM(n_ranks),
 204                 DIMM_PARM(data_width),
 205                 DIMM_PARM(primary_sdram_width),
 206                 DIMM_PARM(ec_sdram_width),
 207                 DIMM_PARM(registered_dimm),
 208
 209                 DIMM_PARM(n_row_addr),
 210                 DIMM_PARM(n_col_addr),
 211                 DIMM_PARM(edc_config),
 212                 DIMM_PARM(n_banks_per_sdram_device),
 213                 DIMM_PARM(burst_lengths_bitmask),
 214                 DIMM_PARM(row_density),
 215
 216                 DIMM_PARM(tCKmin_X_ps),
 217                 DIMM_PARM(tCKmin_X_minus_1_ps),
 218                 DIMM_PARM(tCKmin_X_minus_2_ps),
 219                 DIMM_PARM(tCKmax_ps),
 220
 221                 DIMM_PARM(caslat_X),
 222                 DIMM_PARM(caslat_X_minus_1),
 223                 DIMM_PARM(caslat_X_minus_2),
 224
 225                 DIMM_PARM(caslat_lowest_derated),
 226
 227                 DIMM_PARM(tRCD_ps),
 228                 DIMM_PARM(tRP_ps),
 229                 DIMM_PARM(tRAS_ps),
 230                 DIMM_PARM(tWR_ps),
 231                 DIMM_PARM(tWTR_ps),
 232                 DIMM_PARM(tRFC_ps),
 233                 DIMM_PARM(tRRD_ps),
 234                 DIMM_PARM(tRC_ps),
 235                 DIMM_PARM(refresh_rate_ps),
 236
 237                 DIMM_PARM(tIS_ps),
 238                 DIMM_PARM(tIH_ps),
 239                 DIMM_PARM(tDS_ps),
 240                 DIMM_PARM(tDH_ps),
 241                 DIMM_PARM(tRTP_ps),
 242                 DIMM_PARM(tDQSQ_max_ps),
 243                 DIMM_PARM(tQHS_ps),
 244
 245                 DIMM_PARM(rank_density),
 246                 DIMM_PARM(capacity),
 247                 DIMM_PARM(base_address),
 248         };
 249
 250         static const unsigned int n_opts = ARRAY_SIZE(options);
 251
 252         if (handle_option_table(options, n_opts, p, optname_str, value_str))
 253                 return;
 254
 255         printf("couldn't find option string %s\n", optname_str);
 256 }
 257
 258 static void print_dimm_parameters(const dimm_params_t *pdimm)
 259 {
 260         static const struct options_string options[] = {
 261                 DIMM_PARM(n_ranks),
 262                 DIMM_PARM(data_width),
 263                 DIMM_PARM(primary_sdram_width),
 264                 DIMM_PARM(ec_sdram_width),
 265                 DIMM_PARM(registered_dimm),
 266
 267                 DIMM_PARM(n_row_addr),
 268                 DIMM_PARM(n_col_addr),
 269                 DIMM_PARM(edc_config),
 270                 DIMM_PARM(n_banks_per_sdram_device),
 271
 272                 DIMM_PARM(tCKmin_X_ps),
 273                 DIMM_PARM(tCKmin_X_minus_1_ps),
 274                 DIMM_PARM(tCKmin_X_minus_2_ps),
 275                 DIMM_PARM(tCKmax_ps),
 276
 277                 DIMM_PARM(caslat_X),
 278                 DIMM_PARM(tAA_ps),
 279                 DIMM_PARM(caslat_X_minus_1),
 280                 DIMM_PARM(caslat_X_minus_2),
 281                 DIMM_PARM(caslat_lowest_derated),
 282
 283                 DIMM_PARM(tRCD_ps),
 284                 DIMM_PARM(tRP_ps),
 285                 DIMM_PARM(tRAS_ps),
 286                 DIMM_PARM(tWR_ps),
 287                 DIMM_PARM(tWTR_ps),
 288                 DIMM_PARM(tRFC_ps),
 289                 DIMM_PARM(tRRD_ps),
 290                 DIMM_PARM(tRC_ps),
 291                 DIMM_PARM(refresh_rate_ps),
 292
 293                 DIMM_PARM(tIS_ps),
 294                 DIMM_PARM(tIH_ps),
 295                 DIMM_PARM(tDS_ps),
 296                 DIMM_PARM(tDH_ps),
 297                 DIMM_PARM(tRTP_ps),
 298                 DIMM_PARM(tDQSQ_max_ps),
 299                 DIMM_PARM(tQHS_ps),
 300         };
 301         static const unsigned int n_opts = ARRAY_SIZE(options);
 302
 303         if (pdimm->n_ranks == 0) {
 304                 printf("DIMM not present\n");
 305                 return;
 306         }
 307         printf("DIMM organization parameters:\n");
 308         printf("module part name = %s\n", pdimm->mpart);
 309         printf("rank_density = %llu bytes (%llu megabytes)\n",
 310                pdimm->rank_density, pdimm->rank_density / 0x100000);
 311         printf("capacity = %llu bytes (%llu megabytes)\n",
 312                pdimm->capacity, pdimm->capacity / 0x100000);
 313         printf("burst_lengths_bitmask = %02X\n",
 314                pdimm->burst_lengths_bitmask);
 315         printf("base_addresss = %llu (%08llX %08llX)\n",
 316                pdimm->base_address,
 317                (pdimm->base_address >> 32),
 318                pdimm->base_address & 0xFFFFFFFF);
 319         print_option_table(options, n_opts, pdimm);
 320 }
 321
 322 static void print_lowest_common_dimm_parameters(
 323                 const common_timing_params_t *plcd_dimm_params)
 324 {
 325         static const struct options_string options[] = {
 326                 COMMON_TIMING(tCKmax_max_ps),
 327                 COMMON_TIMING(tRCD_ps),
 328                 COMMON_TIMING(tRP_ps),
 329                 COMMON_TIMING(tRAS_ps),
 330                 COMMON_TIMING(tWR_ps),
 331                 COMMON_TIMING(tWTR_ps),
 332                 COMMON_TIMING(tRFC_ps),
 333                 COMMON_TIMING(tRRD_ps),
 334                 COMMON_TIMING(tRC_ps),
 335                 COMMON_TIMING(refresh_rate_ps),
 336                 COMMON_TIMING(tIS_ps),
 337                 COMMON_TIMING(tDS_ps),
 338                 COMMON_TIMING(tDH_ps),
 339                 COMMON_TIMING(tRTP_ps),
 340                 COMMON_TIMING(tDQSQ_max_ps),
 341                 COMMON_TIMING(tQHS_ps),
 342                 COMMON_TIMING(lowest_common_SPD_caslat),
 343                 COMMON_TIMING(highest_common_derated_caslat),
 344                 COMMON_TIMING(additive_latency),
 345                 COMMON_TIMING(ndimms_present),
 346                 COMMON_TIMING(all_DIMMs_registered),
 347                 COMMON_TIMING(all_DIMMs_unbuffered),
 348                 COMMON_TIMING(all_DIMMs_ECC_capable),
 349         };
 350         static const unsigned int n_opts = ARRAY_SIZE(options);
 351
 352         /* Clock frequencies */
 353         printf("tCKmin_X_ps = %u (%u MHz)\n",
 354                plcd_dimm_params->tCKmin_X_ps,
 355                picos_to_mhz(plcd_dimm_params->tCKmin_X_ps));
 356         printf("tCKmax_ps = %u (%u MHz)\n",
 357                plcd_dimm_params->tCKmax_ps,
 358                picos_to_mhz(plcd_dimm_params->tCKmax_ps));
 359         printf("all_DIMMs_burst_lengths_bitmask = %02X\n",
 360                plcd_dimm_params->all_DIMMs_burst_lengths_bitmask);
 361
 362         print_option_table(options, n_opts, plcd_dimm_params);
 363
 364         printf("total_mem = %llu (%llu megabytes)\n",
 365                plcd_dimm_params->total_mem,
 366                plcd_dimm_params->total_mem / 0x100000);
 367         printf("base_address = %llu (%llu megabytes)\n",
 368                plcd_dimm_params->base_address,
 369                plcd_dimm_params->base_address / 0x100000);
 370 }
 371
 372 #define CTRL_OPTIONS(x) {#x, offsetof(memctl_options_t, x), \
 373         sizeof((memctl_options_t *)0)->x, 0}
 374 #define CTRL_OPTIONS_CS(x, y) {"cs" #x "_" #y, \
 375         offsetof(memctl_options_t, cs_local_opts[x].y), \
 376         sizeof((memctl_options_t *)0)->cs_local_opts[x].y, 0}
 377
 378 static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,
 379                            unsigned int ctl_num,
 380                            const char *optname_str,
 381                            const char *value_str)
 382 {
 383         memctl_options_t *p = &(pinfo->memctl_opts[ctl_num]);
 384         /*
 385          * This array all on the stack and *computed* each time this
 386          * function is rung.
 387          */
 388         static const struct options_string options[] = {
 389                 CTRL_OPTIONS_CS(0, odt_rd_cfg),
 390                 CTRL_OPTIONS_CS(0, odt_wr_cfg),
 391 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 392                 CTRL_OPTIONS_CS(1, odt_rd_cfg),
 393                 CTRL_OPTIONS_CS(1, odt_wr_cfg),
 394 #endif
 395 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 396                 CTRL_OPTIONS_CS(2, odt_rd_cfg),
 397                 CTRL_OPTIONS_CS(2, odt_wr_cfg),
 398 #endif
 399 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 400                 CTRL_OPTIONS_CS(3, odt_rd_cfg),
 401                 CTRL_OPTIONS_CS(3, odt_wr_cfg),
 402 #endif
 403 #if defined(CONFIG_FSL_DDR3)
 404                 CTRL_OPTIONS_CS(0, odt_rtt_norm),
 405                 CTRL_OPTIONS_CS(0, odt_rtt_wr),
 406 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 407                 CTRL_OPTIONS_CS(1, odt_rtt_norm),
 408                 CTRL_OPTIONS_CS(1, odt_rtt_wr),
 409 #endif
 410 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 411                 CTRL_OPTIONS_CS(2, odt_rtt_norm),
 412                 CTRL_OPTIONS_CS(2, odt_rtt_wr),
 413 #endif
 414 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 415                 CTRL_OPTIONS_CS(3, odt_rtt_norm),
 416                 CTRL_OPTIONS_CS(3, odt_rtt_wr),
 417 #endif
 418 #endif
 419                 CTRL_OPTIONS(memctl_interleaving),
 420                 CTRL_OPTIONS(memctl_interleaving_mode),
 421                 CTRL_OPTIONS(ba_intlv_ctl),
 422                 CTRL_OPTIONS(ECC_mode),
 423                 CTRL_OPTIONS(ECC_init_using_memctl),
 424                 CTRL_OPTIONS(DQS_config),
 425                 CTRL_OPTIONS(self_refresh_in_sleep),
 426                 CTRL_OPTIONS(dynamic_power),
 427                 CTRL_OPTIONS(data_bus_width),
 428                 CTRL_OPTIONS(burst_length),
 429                 CTRL_OPTIONS(cas_latency_override),
 430                 CTRL_OPTIONS(cas_latency_override_value),
 431                 CTRL_OPTIONS(use_derated_caslat),
 432                 CTRL_OPTIONS(additive_latency_override),
 433                 CTRL_OPTIONS(additive_latency_override_value),
 434                 CTRL_OPTIONS(clk_adjust),
 435                 CTRL_OPTIONS(cpo_override),
 436                 CTRL_OPTIONS(write_data_delay),
 437                 CTRL_OPTIONS(half_strength_driver_enable),
 438
 439                 /*
 440                  * These can probably be changed to 2T_EN and 3T_EN
 441                  * (using a leading numerical character) without problem
 442                  */
 443                 CTRL_OPTIONS(twoT_en),
 444                 CTRL_OPTIONS(threeT_en),
 445                 CTRL_OPTIONS(ap_en),
 446                 CTRL_OPTIONS(bstopre),
 447                 CTRL_OPTIONS(wrlvl_override),
 448                 CTRL_OPTIONS(wrlvl_sample),
 449                 CTRL_OPTIONS(wrlvl_start),
 450                 CTRL_OPTIONS(rcw_override),
 451                 CTRL_OPTIONS(rcw_1),
 452                 CTRL_OPTIONS(rcw_2),
 453                 CTRL_OPTIONS(ddr_cdr1),
 454                 CTRL_OPTIONS(ddr_cdr2),
 455                 CTRL_OPTIONS(tCKE_clock_pulse_width_ps),
 456                 CTRL_OPTIONS(tFAW_window_four_activates_ps),
 457                 CTRL_OPTIONS(trwt_override),
 458                 CTRL_OPTIONS(trwt),
 459         };
 460
 461         static const unsigned int n_opts = ARRAY_SIZE(options);
 462
 463         if (handle_option_table(options, n_opts, p,
 464                                         optname_str, value_str))
 465                 return;
 466
 467         printf("couldn't find option string %s\n", optname_str);
 468 }
 469
 470 #define CFG_REGS(x) {#x, offsetof(fsl_ddr_cfg_regs_t, x), \
 471         sizeof((fsl_ddr_cfg_regs_t *)0)->x, 1}
 472 #define CFG_REGS_CS(x, y) {"cs" #x "_" #y, \
 473         offsetof(fsl_ddr_cfg_regs_t, cs[x].y), \
 474         sizeof((fsl_ddr_cfg_regs_t *)0)->cs[x].y, 1}
 475
 476 static void print_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr)
 477 {
 478         unsigned int i;
 479         static const struct options_string options[] = {
 480                 CFG_REGS_CS(0, bnds),
 481                 CFG_REGS_CS(0, config),
 482                 CFG_REGS_CS(0, config_2),
 483 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 484                 CFG_REGS_CS(1, bnds),
 485                 CFG_REGS_CS(1, config),
 486                 CFG_REGS_CS(1, config_2),
 487 #endif
 488 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 489                 CFG_REGS_CS(2, bnds),
 490                 CFG_REGS_CS(2, config),
 491                 CFG_REGS_CS(2, config_2),
 492 #endif
 493 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 494                 CFG_REGS_CS(3, bnds),
 495                 CFG_REGS_CS(3, config),
 496                 CFG_REGS_CS(3, config_2),
 497 #endif
 498                 CFG_REGS(timing_cfg_3),
 499                 CFG_REGS(timing_cfg_0),
 500                 CFG_REGS(timing_cfg_1),
 501                 CFG_REGS(timing_cfg_2),
 502                 CFG_REGS(ddr_sdram_cfg),
 503                 CFG_REGS(ddr_sdram_cfg_2),
 504                 CFG_REGS(ddr_sdram_mode),
 505                 CFG_REGS(ddr_sdram_mode_2),
 506                 CFG_REGS(ddr_sdram_mode_3),
 507                 CFG_REGS(ddr_sdram_mode_4),
 508                 CFG_REGS(ddr_sdram_mode_5),
 509                 CFG_REGS(ddr_sdram_mode_6),
 510                 CFG_REGS(ddr_sdram_mode_7),
 511                 CFG_REGS(ddr_sdram_mode_8),
 512                 CFG_REGS(ddr_sdram_interval),
 513                 CFG_REGS(ddr_data_init),
 514                 CFG_REGS(ddr_sdram_clk_cntl),
 515                 CFG_REGS(ddr_init_addr),
 516                 CFG_REGS(ddr_init_ext_addr),
 517                 CFG_REGS(timing_cfg_4),
 518                 CFG_REGS(timing_cfg_5),
 519                 CFG_REGS(ddr_zq_cntl),
 520                 CFG_REGS(ddr_wrlvl_cntl),
 521                 CFG_REGS(ddr_wrlvl_cntl_2),
 522                 CFG_REGS(ddr_wrlvl_cntl_3),
 523                 CFG_REGS(ddr_sr_cntr),
 524                 CFG_REGS(ddr_sdram_rcw_1),
 525                 CFG_REGS(ddr_sdram_rcw_2),
 526                 CFG_REGS(ddr_cdr1),
 527                 CFG_REGS(ddr_cdr2),
 528                 CFG_REGS(err_disable),
 529                 CFG_REGS(err_int_en),
 530                 CFG_REGS(ddr_eor),
 531         };
 532         static const unsigned int n_opts = ARRAY_SIZE(options);
 533
 534         print_option_table(options, n_opts, ddr);
 535
 536         for (i = 0; i < 32; i++)
 537                 printf("debug_%02d = 0x%08X\n", i+1, ddr->debug[i]);
 538 }
 539
 540 static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo,
 541                         unsigned int ctrl_num,
 542                         const char *regname,
 543                         const char *value_str)
 544 {
 545         unsigned int i;
 546         fsl_ddr_cfg_regs_t *ddr;
 547         char buf[20];
 548         static const struct options_string options[] = {
 549                 CFG_REGS_CS(0, bnds),
 550                 CFG_REGS_CS(0, config),
 551                 CFG_REGS_CS(0, config_2),
 552 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 553                 CFG_REGS_CS(1, bnds),
 554                 CFG_REGS_CS(1, config),
 555                 CFG_REGS_CS(1, config_2),
 556 #endif
 557 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 558                 CFG_REGS_CS(2, bnds),
 559                 CFG_REGS_CS(2, config),
 560                 CFG_REGS_CS(2, config_2),
 561 #endif
 562 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 3)
 563                 CFG_REGS_CS(3, bnds),
 564                 CFG_REGS_CS(3, config),
 565                 CFG_REGS_CS(3, config_2),
 566 #endif
 567                 CFG_REGS(timing_cfg_3),
 568                 CFG_REGS(timing_cfg_0),
 569                 CFG_REGS(timing_cfg_1),
 570                 CFG_REGS(timing_cfg_2),
 571                 CFG_REGS(ddr_sdram_cfg),
 572                 CFG_REGS(ddr_sdram_cfg_2),
 573                 CFG_REGS(ddr_sdram_mode),
 574                 CFG_REGS(ddr_sdram_mode_2),
 575                 CFG_REGS(ddr_sdram_mode_3),
 576                 CFG_REGS(ddr_sdram_mode_4),
 577                 CFG_REGS(ddr_sdram_mode_5),
 578                 CFG_REGS(ddr_sdram_mode_6),
 579                 CFG_REGS(ddr_sdram_mode_7),
 580                 CFG_REGS(ddr_sdram_mode_8),
 581                 CFG_REGS(ddr_sdram_interval),
 582                 CFG_REGS(ddr_data_init),
 583                 CFG_REGS(ddr_sdram_clk_cntl),
 584                 CFG_REGS(ddr_init_addr),
 585                 CFG_REGS(ddr_init_ext_addr),
 586                 CFG_REGS(timing_cfg_4),
 587                 CFG_REGS(timing_cfg_5),
 588                 CFG_REGS(ddr_zq_cntl),
 589                 CFG_REGS(ddr_wrlvl_cntl),
 590                 CFG_REGS(ddr_wrlvl_cntl_2),
 591                 CFG_REGS(ddr_wrlvl_cntl_3),
 592                 CFG_REGS(ddr_sr_cntr),
 593                 CFG_REGS(ddr_sdram_rcw_1),
 594                 CFG_REGS(ddr_sdram_rcw_2),
 595                 CFG_REGS(ddr_cdr1),
 596                 CFG_REGS(ddr_cdr2),
 597                 CFG_REGS(err_disable),
 598                 CFG_REGS(err_int_en),
 599                 CFG_REGS(ddr_sdram_rcw_2),
 600                 CFG_REGS(ddr_sdram_rcw_2),
 601                 CFG_REGS(ddr_eor),
 602         };
 603         static const unsigned int n_opts = ARRAY_SIZE(options);
 604
 605         debug("fsl_ddr_regs_edit: ctrl_num = %u, "
 606                 "regname = %s, value = %s\n",
 607                 ctrl_num, regname, value_str);
 608         if (ctrl_num > CONFIG_NUM_DDR_CONTROLLERS)
 609                 return;
 610
 611         ddr = &(pinfo->fsl_ddr_config_reg[ctrl_num]);
 612
 613         if (handle_option_table(options, n_opts, ddr, regname, value_str))
 614                 return;
 615
 616         for (i = 0; i < 32; i++) {
 617                 unsigned int value = simple_strtoul(value_str, NULL, 0);
 618                 sprintf(buf, "debug_%u", i + 1);
 619                 if (strcmp(buf, regname) == 0) {
 620                         ddr->debug[i] = value;
 621                         return;
 622                 }
 623         }
 624         printf("Error: couldn't find register string %s\n", regname);
 625 }
 626
 627 #define CTRL_OPTIONS_HEX(x) {#x, offsetof(memctl_options_t, x), \
 628         sizeof((memctl_options_t *)0)->x, 1}
 629
 630 static void print_memctl_options(const memctl_options_t *popts)
 631 {
 632         static const struct options_string options[] = {
 633                 CTRL_OPTIONS_CS(0, odt_rd_cfg),
 634                 CTRL_OPTIONS_CS(0, odt_wr_cfg),
 635 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 636                 CTRL_OPTIONS_CS(1, odt_rd_cfg),
 637                 CTRL_OPTIONS_CS(1, odt_wr_cfg),
 638 #endif
 639 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 640                 CTRL_OPTIONS_CS(2, odt_rd_cfg),
 641                 CTRL_OPTIONS_CS(2, odt_wr_cfg),
 642 #endif
 643 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 3)
 644                 CTRL_OPTIONS_CS(3, odt_rd_cfg),
 645                 CTRL_OPTIONS_CS(3, odt_wr_cfg),
 646 #endif
 647 #if defined(CONFIG_FSL_DDR3)
 648                 CTRL_OPTIONS_CS(0, odt_rtt_norm),
 649                 CTRL_OPTIONS_CS(0, odt_rtt_wr),
 650 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 651                 CTRL_OPTIONS_CS(1, odt_rtt_norm),
 652                 CTRL_OPTIONS_CS(1, odt_rtt_wr),
 653 #endif
 654 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 655                 CTRL_OPTIONS_CS(2, odt_rtt_norm),
 656                 CTRL_OPTIONS_CS(2, odt_rtt_wr),
 657 #endif
 658 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 3)
 659                 CTRL_OPTIONS_CS(3, odt_rtt_norm),
 660                 CTRL_OPTIONS_CS(3, odt_rtt_wr),
 661 #endif
 662 #endif
 663                 CTRL_OPTIONS(memctl_interleaving),
 664                 CTRL_OPTIONS(memctl_interleaving_mode),
 665                 CTRL_OPTIONS_HEX(ba_intlv_ctl),
 666                 CTRL_OPTIONS(ECC_mode),
 667                 CTRL_OPTIONS(ECC_init_using_memctl),
 668                 CTRL_OPTIONS(DQS_config),
 669                 CTRL_OPTIONS(self_refresh_in_sleep),
 670                 CTRL_OPTIONS(dynamic_power),
 671                 CTRL_OPTIONS(data_bus_width),
 672                 CTRL_OPTIONS(burst_length),
 673                 CTRL_OPTIONS(cas_latency_override),
 674                 CTRL_OPTIONS(cas_latency_override_value),
 675                 CTRL_OPTIONS(use_derated_caslat),
 676                 CTRL_OPTIONS(additive_latency_override),
 677                 CTRL_OPTIONS(additive_latency_override_value),
 678                 CTRL_OPTIONS(clk_adjust),
 679                 CTRL_OPTIONS(cpo_override),
 680                 CTRL_OPTIONS(write_data_delay),
 681                 CTRL_OPTIONS(half_strength_driver_enable),
 682                 /*
 683                  * These can probably be changed to 2T_EN and 3T_EN
 684                  * (using a leading numerical character) without problem
 685                  */
 686                 CTRL_OPTIONS(twoT_en),
 687                 CTRL_OPTIONS(threeT_en),
 688                 CTRL_OPTIONS(registered_dimm_en),
 689                 CTRL_OPTIONS(ap_en),
 690                 CTRL_OPTIONS(bstopre),
 691                 CTRL_OPTIONS(wrlvl_override),
 692                 CTRL_OPTIONS(wrlvl_sample),
 693                 CTRL_OPTIONS(wrlvl_start),
 694                 CTRL_OPTIONS(rcw_override),
 695                 CTRL_OPTIONS(rcw_1),
 696                 CTRL_OPTIONS(rcw_2),
 697                 CTRL_OPTIONS_HEX(ddr_cdr1),
 698                 CTRL_OPTIONS_HEX(ddr_cdr2),
 699                 CTRL_OPTIONS(tCKE_clock_pulse_width_ps),
 700                 CTRL_OPTIONS(tFAW_window_four_activates_ps),
 701                 CTRL_OPTIONS(trwt_override),
 702                 CTRL_OPTIONS(trwt),
 703         };
 704         static const unsigned int n_opts = ARRAY_SIZE(options);
 705
 706         print_option_table(options, n_opts, popts);
 707 }
 708
 709 #ifdef CONFIG_FSL_DDR1
 710 void ddr1_spd_dump(const ddr1_spd_eeprom_t *spd)
 711 {
 712         unsigned int i;
 713
 714         printf("%-3d    : %02x %s\n", 0, spd->info_size,
 715                " spd->info_size,   *  0 # bytes written into serial memory *");
 716         printf("%-3d    : %02x %s\n", 1, spd->chip_size,
 717                " spd->chip_size,   *  1 Total # bytes of SPD memory device *");
 718         printf("%-3d    : %02x %s\n", 2, spd->mem_type,
 719                " spd->mem_type,    *  2 Fundamental memory type *");
 720         printf("%-3d    : %02x %s\n", 3, spd->nrow_addr,
 721                " spd->nrow_addr,   *  3 # of Row Addresses on this assembly *");
 722         printf("%-3d    : %02x %s\n", 4, spd->ncol_addr,
 723                " spd->ncol_addr,   *  4 # of Column Addrs on this assembly *");
 724         printf("%-3d    : %02x %s\n", 5, spd->nrows,
 725                " spd->nrows        *  5 # of DIMM Banks *");
 726         printf("%-3d    : %02x %s\n", 6, spd->dataw_lsb,
 727                " spd->dataw_lsb,   *  6 Data Width lsb of this assembly *");
 728         printf("%-3d    : %02x %s\n", 7, spd->dataw_msb,
 729                " spd->dataw_msb,   *  7 Data Width msb of this assembly *");
 730         printf("%-3d    : %02x %s\n", 8, spd->voltage,
 731                " spd->voltage,     *  8 Voltage intf std of this assembly *");
 732         printf("%-3d    : %02x %s\n", 9, spd->clk_cycle,
 733                " spd->clk_cycle,   *  9 SDRAM Cycle time at CL=X *");
 734         printf("%-3d    : %02x %s\n", 10, spd->clk_access,
 735                " spd->clk_access,  * 10 SDRAM Access from Clock at CL=X *");
 736         printf("%-3d    : %02x %s\n", 11, spd->config,
 737                " spd->config,      * 11 DIMM Configuration type *");
 738         printf("%-3d    : %02x %s\n", 12, spd->refresh,
 739                " spd->refresh,     * 12 Refresh Rate/Type *");
 740         printf("%-3d    : %02x %s\n", 13, spd->primw,
 741                " spd->primw,       * 13 Primary SDRAM Width *");
 742         printf("%-3d    : %02x %s\n", 14, spd->ecw,
 743                " spd->ecw,         * 14 Error Checking SDRAM width *");
 744         printf("%-3d    : %02x %s\n", 15, spd->min_delay,
 745                " spd->min_delay,   * 15 Back to Back Random Access *");
 746         printf("%-3d    : %02x %s\n", 16, spd->burstl,
 747                " spd->burstl,      * 16 Burst Lengths Supported *");
 748         printf("%-3d    : %02x %s\n", 17, spd->nbanks,
 749                " spd->nbanks,      * 17 # of Banks on Each SDRAM Device *");
 750         printf("%-3d    : %02x %s\n", 18, spd->cas_lat,
 751                " spd->cas_lat,     * 18 CAS# Latencies Supported *");
 752         printf("%-3d    : %02x %s\n", 19, spd->cs_lat,
 753                " spd->cs_lat,      * 19 Chip Select Latency *");
 754         printf("%-3d    : %02x %s\n", 20, spd->write_lat,
 755                " spd->write_lat,   * 20 Write Latency/Recovery *");
 756         printf("%-3d    : %02x %s\n", 21, spd->mod_attr,
 757                " spd->mod_attr,    * 21 SDRAM Module Attributes *");
 758         printf("%-3d    : %02x %s\n", 22, spd->dev_attr,
 759                " spd->dev_attr,    * 22 SDRAM Device Attributes *");
 760         printf("%-3d    : %02x %s\n", 23, spd->clk_cycle2,
 761                " spd->clk_cycle2,  * 23 Min SDRAM Cycle time at CL=X-1 *");
 762         printf("%-3d    : %02x %s\n", 24, spd->clk_access2,
 763                " spd->clk_access2, * 24 SDRAM Access from Clock at CL=X-1 *");
 764         printf("%-3d    : %02x %s\n", 25, spd->clk_cycle3,
 765                " spd->clk_cycle3,  * 25 Min SDRAM Cycle time at CL=X-2 *");
 766         printf("%-3d    : %02x %s\n", 26, spd->clk_access3,
 767                " spd->clk_access3, * 26 Max Access from Clock at CL=X-2 *");
 768         printf("%-3d    : %02x %s\n", 27, spd->trp,
 769                " spd->trp,         * 27 Min Row Precharge Time (tRP)*");
 770         printf("%-3d    : %02x %s\n", 28, spd->trrd,
 771                " spd->trrd,        * 28 Min Row Active to Row Active (tRRD) *");
 772         printf("%-3d    : %02x %s\n", 29, spd->trcd,
 773                " spd->trcd,        * 29 Min RAS to CAS Delay (tRCD) *");
 774         printf("%-3d    : %02x %s\n", 30, spd->tras,
 775                " spd->tras,        * 30 Minimum RAS Pulse Width (tRAS) *");
 776         printf("%-3d    : %02x %s\n", 31, spd->bank_dens,
 777                " spd->bank_dens,   * 31 Density of each bank on module *");
 778         printf("%-3d    : %02x %s\n", 32, spd->ca_setup,
 779                " spd->ca_setup,    * 32 Cmd + Addr signal input setup time *");
 780         printf("%-3d    : %02x %s\n", 33, spd->ca_hold,
 781                " spd->ca_hold,     * 33 Cmd and Addr signal input hold time *");
 782         printf("%-3d    : %02x %s\n", 34, spd->data_setup,
 783                " spd->data_setup,  * 34 Data signal input setup time *");
 784         printf("%-3d    : %02x %s\n", 35, spd->data_hold,
 785                " spd->data_hold,   * 35 Data signal input hold time *");
 786         printf("%-3d    : %02x %s\n", 36, spd->res_36_40[0],
 787                " spd->res_36_40[0], * 36 Reserved / tWR *");
 788         printf("%-3d    : %02x %s\n", 37, spd->res_36_40[1],
 789                " spd->res_36_40[1], * 37 Reserved / tWTR *");
 790         printf("%-3d    : %02x %s\n", 38, spd->res_36_40[2],
 791                " spd->res_36_40[2], * 38 Reserved / tRTP *");
 792         printf("%-3d    : %02x %s\n", 39, spd->res_36_40[3],
 793                " spd->res_36_40[3], * 39 Reserved / mem_probe *");
 794         printf("%-3d    : %02x %s\n", 40, spd->res_36_40[4],
 795                " spd->res_36_40[4], * 40 Reserved / trc,trfc extensions *");
 796         printf("%-3d    : %02x %s\n", 41, spd->trc,
 797                " spd->trc,         * 41 Min Active to Auto refresh time tRC *");
 798         printf("%-3d    : %02x %s\n", 42, spd->trfc,
 799                " spd->trfc,        * 42 Min Auto to Active period tRFC *");
 800         printf("%-3d    : %02x %s\n", 43, spd->tckmax,
 801                " spd->tckmax,      * 43 Max device cycle time tCKmax *");
 802         printf("%-3d    : %02x %s\n", 44, spd->tdqsq,
 803                " spd->tdqsq,       * 44 Max DQS to DQ skew *");
 804         printf("%-3d    : %02x %s\n", 45, spd->tqhs,
 805                " spd->tqhs,        * 45 Max Read DataHold skew tQHS *");
 806         printf("%-3d    : %02x %s\n", 46, spd->res_46,
 807                " spd->res_46,  * 46 Reserved/ PLL Relock time *");
 808         printf("%-3d    : %02x %s\n", 47, spd->dimm_height,
 809                " spd->dimm_height  * 47 SDRAM DIMM Height *");
 810
 811         printf("%-3d-%3d: ",  48, 61);
 812
 813         for (i = 0; i < 14; i++)
 814                 printf("%02x", spd->res_48_61[i]);
 815
 816         printf(" * 48-61 IDD in SPD and Reserved space *\n");
 817
 818         printf("%-3d    : %02x %s\n", 62, spd->spd_rev,
 819                " spd->spd_rev,     * 62 SPD Data Revision Code *");
 820         printf("%-3d    : %02x %s\n", 63, spd->cksum,
 821                " spd->cksum,       * 63 Checksum for bytes 0-62 *");
 822         printf("%-3d-%3d: ",  64, 71);
 823
 824         for (i = 0; i < 8; i++)
 825                 printf("%02x", spd->mid[i]);
 826
 827         printf("* 64 Mfr's JEDEC ID code per JEP-108E *\n");
 828         printf("%-3d    : %02x %s\n", 72, spd->mloc,
 829                " spd->mloc,        * 72 Manufacturing Location *");
 830
 831         printf("%-3d-%3d: >>",  73, 90);
 832
 833         for (i = 0; i < 18; i++)
 834                 printf("%c", spd->mpart[i]);
 835
 836         printf("<<* 73 Manufacturer's Part Number *\n");
 837
 838         printf("%-3d-%3d: %02x %02x %s\n", 91, 92, spd->rev[0], spd->rev[1],
 839                "* 91 Revision Code *");
 840         printf("%-3d-%3d: %02x %02x %s\n", 93, 94, spd->mdate[0], spd->mdate[1],
 841                "* 93 Manufacturing Date *");
 842         printf("%-3d-%3d: ", 95, 98);
 843
 844         for (i = 0; i < 4; i++)
 845                 printf("%02x", spd->sernum[i]);
 846
 847         printf("* 95 Assembly Serial Number *\n");
 848
 849         printf("%-3d-%3d: ", 99, 127);
 850
 851         for (i = 0; i < 27; i++)
 852                 printf("%02x", spd->mspec[i]);
 853
 854         printf("* 99 Manufacturer Specific Data *\n");
 855 }
 856 #endif
 857
 858 #ifdef CONFIG_FSL_DDR2
 859 void ddr2_spd_dump(const ddr2_spd_eeprom_t *spd)
 860 {
 861         unsigned int i;
 862
 863         printf("%-3d    : %02x %s\n", 0, spd->info_size,
 864                " spd->info_size,   *  0 # bytes written into serial memory *");
 865         printf("%-3d    : %02x %s\n", 1, spd->chip_size,
 866                " spd->chip_size,   *  1 Total # bytes of SPD memory device *");
 867         printf("%-3d    : %02x %s\n", 2, spd->mem_type,
 868                " spd->mem_type,    *  2 Fundamental memory type *");
 869         printf("%-3d    : %02x %s\n", 3, spd->nrow_addr,
 870                " spd->nrow_addr,   *  3 # of Row Addresses on this assembly *");
 871         printf("%-3d    : %02x %s\n", 4, spd->ncol_addr,
 872                " spd->ncol_addr,   *  4 # of Column Addrs on this assembly *");
 873         printf("%-3d    : %02x %s\n", 5, spd->mod_ranks,
 874                " spd->mod_ranks    *  5 # of Module Rows on this assembly *");
 875         printf("%-3d    : %02x %s\n", 6, spd->dataw,
 876                " spd->dataw,       *  6 Data Width of this assembly *");
 877         printf("%-3d    : %02x %s\n", 7, spd->res_7,
 878                " spd->res_7,       *  7 Reserved *");
 879         printf("%-3d    : %02x %s\n", 8, spd->voltage,
 880                " spd->voltage,     *  8 Voltage intf std of this assembly *");
 881         printf("%-3d    : %02x %s\n", 9, spd->clk_cycle,
 882                " spd->clk_cycle,   *  9 SDRAM Cycle time at CL=X *");
 883         printf("%-3d    : %02x %s\n", 10, spd->clk_access,
 884                " spd->clk_access,  * 10 SDRAM Access from Clock at CL=X *");
 885         printf("%-3d    : %02x %s\n", 11, spd->config,
 886                " spd->config,      * 11 DIMM Configuration type *");
 887         printf("%-3d    : %02x %s\n", 12, spd->refresh,
 888                " spd->refresh,     * 12 Refresh Rate/Type *");
 889         printf("%-3d    : %02x %s\n", 13, spd->primw,
 890                " spd->primw,       * 13 Primary SDRAM Width *");
 891         printf("%-3d    : %02x %s\n", 14, spd->ecw,
 892                " spd->ecw,         * 14 Error Checking SDRAM width *");
 893         printf("%-3d    : %02x %s\n", 15, spd->res_15,
 894                " spd->res_15,      * 15 Reserved *");
 895         printf("%-3d    : %02x %s\n", 16, spd->burstl,
 896                " spd->burstl,      * 16 Burst Lengths Supported *");
 897         printf("%-3d    : %02x %s\n", 17, spd->nbanks,
 898                " spd->nbanks,      * 17 # of Banks on Each SDRAM Device *");
 899         printf("%-3d    : %02x %s\n", 18, spd->cas_lat,
 900                " spd->cas_lat,     * 18 CAS# Latencies Supported *");
 901         printf("%-3d    : %02x %s\n", 19, spd->mech_char,
 902                " spd->mech_char,   * 19 Mechanical Characteristics *");
 903         printf("%-3d    : %02x %s\n", 20, spd->dimm_type,
 904                " spd->dimm_type,   * 20 DIMM type *");
 905         printf("%-3d    : %02x %s\n", 21, spd->mod_attr,
 906                " spd->mod_attr,    * 21 SDRAM Module Attributes *");
 907         printf("%-3d    : %02x %s\n", 22, spd->dev_attr,
 908                " spd->dev_attr,    * 22 SDRAM Device Attributes *");
 909         printf("%-3d    : %02x %s\n", 23, spd->clk_cycle2,
 910                " spd->clk_cycle2,  * 23 Min SDRAM Cycle time at CL=X-1 *");
 911         printf("%-3d    : %02x %s\n", 24, spd->clk_access2,
 912                " spd->clk_access2, * 24 SDRAM Access from Clock at CL=X-1 *");
 913         printf("%-3d    : %02x %s\n", 25, spd->clk_cycle3,
 914                " spd->clk_cycle3,  * 25 Min SDRAM Cycle time at CL=X-2 *");
 915         printf("%-3d    : %02x %s\n", 26, spd->clk_access3,
 916                " spd->clk_access3, * 26 Max Access from Clock at CL=X-2 *");
 917         printf("%-3d    : %02x %s\n", 27, spd->trp,
 918                " spd->trp,         * 27 Min Row Precharge Time (tRP)*");
 919         printf("%-3d    : %02x %s\n", 28, spd->trrd,
 920                " spd->trrd,        * 28 Min Row Active to Row Active (tRRD) *");
 921         printf("%-3d    : %02x %s\n", 29, spd->trcd,
 922                " spd->trcd,        * 29 Min RAS to CAS Delay (tRCD) *");
 923         printf("%-3d    : %02x %s\n", 30, spd->tras,
 924                " spd->tras,        * 30 Minimum RAS Pulse Width (tRAS) *");
 925         printf("%-3d    : %02x %s\n", 31, spd->rank_dens,
 926                " spd->rank_dens,   * 31 Density of each rank on module *");
 927         printf("%-3d    : %02x %s\n", 32, spd->ca_setup,
 928                " spd->ca_setup,    * 32 Cmd + Addr signal input setup time *");
 929         printf("%-3d    : %02x %s\n", 33, spd->ca_hold,
 930                " spd->ca_hold,     * 33 Cmd and Addr signal input hold time *");
 931         printf("%-3d    : %02x %s\n", 34, spd->data_setup,
 932                " spd->data_setup,  * 34 Data signal input setup time *");
 933         printf("%-3d    : %02x %s\n", 35, spd->data_hold,
 934                " spd->data_hold,   * 35 Data signal input hold time *");
 935         printf("%-3d    : %02x %s\n", 36, spd->twr,
 936                " spd->twr,         * 36 Write Recovery time tWR *");
 937         printf("%-3d    : %02x %s\n", 37, spd->twtr,
 938                " spd->twtr,        * 37 Int write to read delay tWTR *");
 939         printf("%-3d    : %02x %s\n", 38, spd->trtp,
 940                " spd->trtp,        * 38 Int read to precharge delay tRTP *");
 941         printf("%-3d    : %02x %s\n", 39, spd->mem_probe,
 942                " spd->mem_probe,   * 39 Mem analysis probe characteristics *");
 943         printf("%-3d    : %02x %s\n", 40, spd->trctrfc_ext,
 944                " spd->trctrfc_ext, * 40 Extensions to trc and trfc *");
 945         printf("%-3d    : %02x %s\n", 41, spd->trc,
 946                " spd->trc,         * 41 Min Active to Auto refresh time tRC *");
 947         printf("%-3d    : %02x %s\n", 42, spd->trfc,
 948                " spd->trfc,        * 42 Min Auto to Active period tRFC *");
 949         printf("%-3d    : %02x %s\n", 43, spd->tckmax,
 950                " spd->tckmax,      * 43 Max device cycle time tCKmax *");
 951         printf("%-3d    : %02x %s\n", 44, spd->tdqsq,
 952                " spd->tdqsq,       * 44 Max DQS to DQ skew *");
 953         printf("%-3d    : %02x %s\n", 45, spd->tqhs,
 954                " spd->tqhs,        * 45 Max Read DataHold skew tQHS *");
 955         printf("%-3d    : %02x %s\n", 46, spd->pll_relock,
 956                " spd->pll_relock,  * 46 PLL Relock time *");
 957         printf("%-3d    : %02x %s\n", 47, spd->Tcasemax,
 958                " spd->Tcasemax,    * 47 Tcasemax *");
 959         printf("%-3d    : %02x %s\n", 48, spd->psiTAdram,
 960                " spd->psiTAdram,   * 48 Thermal Resistance of DRAM Package "
 961                "from Top (Case) to Ambient (Psi T-A DRAM) *");
 962         printf("%-3d    : %02x %s\n", 49, spd->dt0_mode,
 963                " spd->dt0_mode,    * 49 DRAM Case Temperature Rise from "
 964                "Ambient due to Activate-Precharge/Mode Bits "
 965                "(DT0/Mode Bits) *)");
 966         printf("%-3d    : %02x %s\n", 50, spd->dt2n_dt2q,
 967                " spd->dt2n_dt2q,   * 50 DRAM Case Temperature Rise from "
 968                "Ambient due to Precharge/Quiet Standby "
 969                "(DT2N/DT2Q) *");
 970         printf("%-3d    : %02x %s\n", 51, spd->dt2p,
 971                " spd->dt2p,        * 51 DRAM Case Temperature Rise from "
 972                "Ambient due to Precharge Power-Down (DT2P) *");
 973         printf("%-3d    : %02x %s\n", 52, spd->dt3n,
 974                " spd->dt3n,        * 52 DRAM Case Temperature Rise from "
 975                "Ambient due to Active Standby (DT3N) *");
 976         printf("%-3d    : %02x %s\n", 53, spd->dt3pfast,
 977                " spd->dt3pfast,    * 53 DRAM Case Temperature Rise from "
 978                "Ambient due to Active Power-Down with Fast PDN Exit "
 979                "(DT3Pfast) *");
 980         printf("%-3d    : %02x %s\n", 54, spd->dt3pslow,
 981                " spd->dt3pslow,    * 54 DRAM Case Temperature Rise from "
 982                "Ambient due to Active Power-Down with Slow PDN Exit "
 983                "(DT3Pslow) *");
 984         printf("%-3d    : %02x %s\n", 55, spd->dt4r_dt4r4w,
 985                " spd->dt4r_dt4r4w, * 55 DRAM Case Temperature Rise from "
 986                "Ambient due to Page Open Burst Read/DT4R4W Mode Bit "
 987                "(DT4R/DT4R4W Mode Bit) *");
 988         printf("%-3d    : %02x %s\n", 56, spd->dt5b,
 989                " spd->dt5b,        * 56 DRAM Case Temperature Rise from "
 990                "Ambient due to Burst Refresh (DT5B) *");
 991         printf("%-3d    : %02x %s\n", 57, spd->dt7,
 992                " spd->dt7,         * 57 DRAM Case Temperature Rise from "
 993                "Ambient due to Bank Interleave Reads with "
 994                "Auto-Precharge (DT7) *");
 995         printf("%-3d    : %02x %s\n", 58, spd->psiTApll,
 996                " spd->psiTApll,    * 58 Thermal Resistance of PLL Package form"
 997                " Top (Case) to Ambient (Psi T-A PLL) *");
 998         printf("%-3d    : %02x %s\n", 59, spd->psiTAreg,
 999                " spd->psiTAreg,    * 59 Thermal Reisitance of Register Package"
1000                " from Top (Case) to Ambient (Psi T-A Register) *");
1001         printf("%-3d    : %02x %s\n", 60, spd->dtpllactive,
1002                " spd->dtpllactive, * 60 PLL Case Temperature Rise from "
1003                "Ambient due to PLL Active (DT PLL Active) *");
1004         printf("%-3d    : %02x %s\n", 61, spd->dtregact,
1005                " spd->dtregact,    "
1006                "* 61 Register Case Temperature Rise from Ambient due to "
1007                "Register Active/Mode Bit (DT Register Active/Mode Bit) *");
1008         printf("%-3d    : %02x %s\n", 62, spd->spd_rev,
1009                " spd->spd_rev,     * 62 SPD Data Revision Code *");
1010         printf("%-3d    : %02x %s\n", 63, spd->cksum,
1011                " spd->cksum,       * 63 Checksum for bytes 0-62 *");
1012
1013         printf("%-3d-%3d: ",  64, 71);
1014
1015         for (i = 0; i < 8; i++)
1016                 printf("%02x", spd->mid[i]);
1017
1018         printf("* 64 Mfr's JEDEC ID code per JEP-108E *\n");
1019
1020         printf("%-3d    : %02x %s\n", 72, spd->mloc,
1021                " spd->mloc,        * 72 Manufacturing Location *");
1022
1023         printf("%-3d-%3d: >>",  73, 90);
1024         for (i = 0; i < 18; i++)
1025                 printf("%c", spd->mpart[i]);
1026
1027
1028         printf("<<* 73 Manufacturer's Part Number *\n");
1029
1030         printf("%-3d-%3d: %02x %02x %s\n", 91, 92, spd->rev[0], spd->rev[1],
1031                "* 91 Revision Code *");
1032         printf("%-3d-%3d: %02x %02x %s\n", 93, 94, spd->mdate[0], spd->mdate[1],
1033                "* 93 Manufacturing Date *");
1034         printf("%-3d-%3d: ", 95, 98);
1035
1036         for (i = 0; i < 4; i++)
1037                 printf("%02x", spd->sernum[i]);
1038
1039         printf("* 95 Assembly Serial Number *\n");
1040
1041         printf("%-3d-%3d: ", 99, 127);
1042         for (i = 0; i < 27; i++)
1043                 printf("%02x", spd->mspec[i]);
1044
1045
1046         printf("* 99 Manufacturer Specific Data *\n");
1047 }
1048 #endif
1049
1050 #ifdef CONFIG_FSL_DDR3
1051 void ddr3_spd_dump(const ddr3_spd_eeprom_t *spd)
1052 {
1053         unsigned int i;
1054
1055         /* General Section: Bytes 0-59 */
1056
1057 #define PRINT_NXS(x, y, z...) printf("%-3d    : %02x " z "\n", x, (u8)y);
1058 #define PRINT_NNXXS(n0, n1, x0, x1, s) \
1059         printf("%-3d-%3d: %02x %02x " s "\n", n0, n1, x0, x1);
1060
1061         PRINT_NXS(0, spd->info_size_crc,
1062                 "info_size_crc  bytes written into serial memory, "
1063                 "CRC coverage");
1064         PRINT_NXS(1, spd->spd_rev,
1065                 "spd_rev        SPD Revision");
1066         PRINT_NXS(2, spd->mem_type,
1067                 "mem_type       Key Byte / DRAM Device Type");
1068         PRINT_NXS(3, spd->module_type,
1069                 "module_type    Key Byte / Module Type");
1070         PRINT_NXS(4, spd->density_banks,
1071                 "density_banks  SDRAM Density and Banks");
1072         PRINT_NXS(5, spd->addressing,
1073                 "addressing     SDRAM Addressing");
1074         PRINT_NXS(6, spd->module_vdd,
1075                 "module_vdd     Module Nominal Voltage, VDD");
1076         PRINT_NXS(7, spd->organization,
1077                 "organization   Module Organization");
1078         PRINT_NXS(8, spd->bus_width,
1079                 "bus_width      Module Memory Bus Width");
1080         PRINT_NXS(9, spd->ftb_div,
1081                 "ftb_div        Fine Timebase (FTB) Dividend / Divisor");
1082         PRINT_NXS(10, spd->mtb_dividend,
1083                 "mtb_dividend   Medium Timebase (MTB) Dividend");
1084         PRINT_NXS(11, spd->mtb_divisor,
1085                 "mtb_divisor    Medium Timebase (MTB) Divisor");
1086         PRINT_NXS(12, spd->tCK_min,
1087                 "tCK_min        SDRAM Minimum Cycle Time");
1088         PRINT_NXS(13, spd->res_13,
1089                 "res_13         Reserved");
1090         PRINT_NXS(14, spd->caslat_lsb,
1091                 "caslat_lsb     CAS Latencies Supported, LSB");
1092         PRINT_NXS(15, spd->caslat_msb,
1093                 "caslat_msb     CAS Latencies Supported, MSB");
1094         PRINT_NXS(16, spd->tAA_min,
1095                 "tAA_min        Min CAS Latency Time");
1096         PRINT_NXS(17, spd->tWR_min,
1097                 "tWR_min        Min Write REcovery Time");
1098         PRINT_NXS(18, spd->tRCD_min,
1099                 "tRCD_min       Min RAS# to CAS# Delay Time");
1100         PRINT_NXS(19, spd->tRRD_min,
1101                 "tRRD_min       Min Row Active to Row Active Delay Time");
1102         PRINT_NXS(20, spd->tRP_min,
1103                 "tRP_min        Min Row Precharge Delay Time");
1104         PRINT_NXS(21, spd->tRAS_tRC_ext,
1105                 "tRAS_tRC_ext   Upper Nibbles for tRAS and tRC");
1106         PRINT_NXS(22, spd->tRAS_min_lsb,
1107                 "tRAS_min_lsb   Min Active to Precharge Delay Time, LSB");
1108         PRINT_NXS(23, spd->tRC_min_lsb,
1109                 "tRC_min_lsb    Min Active to Active/Refresh Delay Time, LSB");
1110         PRINT_NXS(24, spd->tRFC_min_lsb,
1111                 "tRFC_min_lsb   Min Refresh Recovery Delay Time LSB");
1112         PRINT_NXS(25, spd->tRFC_min_msb,
1113                 "tRFC_min_msb   Min Refresh Recovery Delay Time MSB");
1114         PRINT_NXS(26, spd->tWTR_min,
1115                 "tWTR_min       Min Internal Write to Read Command Delay Time");
1116         PRINT_NXS(27, spd->tRTP_min,
1117                 "tRTP_min "
1118                 "Min Internal Read to Precharge Command Delay Time");
1119         PRINT_NXS(28, spd->tFAW_msb,
1120                 "tFAW_msb       Upper Nibble for tFAW");
1121         PRINT_NXS(29, spd->tFAW_min,
1122                 "tFAW_min       Min Four Activate Window Delay Time");
1123         PRINT_NXS(30, spd->opt_features,
1124                 "opt_features   SDRAM Optional Features");
1125         PRINT_NXS(31, spd->therm_ref_opt,
1126                 "therm_ref_opt  SDRAM Thermal and Refresh Opts");
1127         PRINT_NXS(32, spd->therm_sensor,
1128                 "therm_sensor  SDRAM Thermal Sensor");
1129         PRINT_NXS(33, spd->device_type,
1130                 "device_type  SDRAM Device Type");
1131         PRINT_NXS(34, spd->fine_tCK_min,
1132                 "fine_tCK_min  Fine offset for tCKmin");
1133         PRINT_NXS(35, spd->fine_tAA_min,
1134                 "fine_tAA_min  Fine offset for tAAmin");
1135         PRINT_NXS(36, spd->fine_tRCD_min,
1136                 "fine_tRCD_min Fine offset for tRCDmin");
1137         PRINT_NXS(37, spd->fine_tRP_min,
1138                 "fine_tRP_min  Fine offset for tRPmin");
1139         PRINT_NXS(38, spd->fine_tRC_min,
1140                 "fine_tRC_min  Fine offset for tRCmin");
1141
1142         printf("%-3d-%3d: ",  39, 59);  /* Reserved, General Section */
1143
1144         for (i = 39; i <= 59; i++)
1145                 printf("%02x ", spd->res_39_59[i - 39]);
1146
1147         puts("\n");
1148
1149         switch (spd->module_type) {
1150         case 0x02:  /* UDIMM */
1151         case 0x03:  /* SO-DIMM */
1152         case 0x04:  /* Micro-DIMM */
1153         case 0x06:  /* Mini-UDIMM */
1154                 PRINT_NXS(60, spd->mod_section.unbuffered.mod_height,
1155                         "mod_height    (Unbuffered) Module Nominal Height");
1156                 PRINT_NXS(61, spd->mod_section.unbuffered.mod_thickness,
1157                         "mod_thickness (Unbuffered) Module Maximum Thickness");
1158                 PRINT_NXS(62, spd->mod_section.unbuffered.ref_raw_card,
1159                         "ref_raw_card  (Unbuffered) Reference Raw Card Used");
1160                 PRINT_NXS(63, spd->mod_section.unbuffered.addr_mapping,
1161                         "addr_mapping  (Unbuffered) Address mapping from "
1162                         "Edge Connector to DRAM");
1163                 break;
1164         case 0x01:  /* RDIMM */
1165         case 0x05:  /* Mini-RDIMM */
1166                 PRINT_NXS(60, spd->mod_section.registered.mod_height,
1167                         "mod_height    (Registered) Module Nominal Height");
1168                 PRINT_NXS(61, spd->mod_section.registered.mod_thickness,
1169                         "mod_thickness (Registered) Module Maximum Thickness");
1170                 PRINT_NXS(62, spd->mod_section.registered.ref_raw_card,
1171                         "ref_raw_card  (Registered) Reference Raw Card Used");
1172                 PRINT_NXS(63, spd->mod_section.registered.modu_attr,
1173                         "modu_attr     (Registered) DIMM Module Attributes");
1174                 PRINT_NXS(64, spd->mod_section.registered.thermal,
1175                         "thermal       (Registered) Thermal Heat "
1176                         "Spreader Solution");
1177                 PRINT_NXS(65, spd->mod_section.registered.reg_id_lo,
1178                         "reg_id_lo     (Registered) Register Manufacturer ID "
1179                         "Code, LSB");
1180                 PRINT_NXS(66, spd->mod_section.registered.reg_id_hi,
1181                         "reg_id_hi     (Registered) Register Manufacturer ID "
1182                         "Code, MSB");
1183                 PRINT_NXS(67, spd->mod_section.registered.reg_rev,
1184                         "reg_rev       (Registered) Register "
1185                         "Revision Number");
1186                 PRINT_NXS(68, spd->mod_section.registered.reg_type,
1187                         "reg_type      (Registered) Register Type");
1188                 for (i = 69; i <= 76; i++) {
1189                         printf("%-3d    : %02x rcw[%d]\n", i,
1190                                 spd->mod_section.registered.rcw[i-69], i-69);
1191                 }
1192                 break;
1193         default:
1194                 /* Module-specific Section, Unsupported Module Type */
1195                 printf("%-3d-%3d: ", 60, 116);
1196
1197                 for (i = 60; i <= 116; i++)
1198                         printf("%02x", spd->mod_section.uc[i - 60]);
1199
1200                 break;
1201         }
1202
1203         /* Unique Module ID: Bytes 117-125 */
1204         PRINT_NXS(117, spd->mmid_lsb, "Module MfgID Code LSB - JEP-106");
1205         PRINT_NXS(118, spd->mmid_msb, "Module MfgID Code MSB - JEP-106");
1206         PRINT_NXS(119, spd->mloc,     "Mfg Location");
1207         PRINT_NNXXS(120, 121, spd->mdate[0], spd->mdate[1], "Mfg Date");
1208
1209         printf("%-3d-%3d: ", 122, 125);
1210
1211         for (i = 122; i <= 125; i++)
1212                 printf("%02x ", spd->sernum[i - 122]);
1213         printf("   Module Serial Number\n");
1214
1215         /* CRC: Bytes 126-127 */
1216         PRINT_NNXXS(126, 127, spd->crc[0], spd->crc[1], "  SPD CRC");
1217
1218         /* Other Manufacturer Fields and User Space: Bytes 128-255 */
1219         printf("%-3d-%3d: ", 128, 145);
1220         for (i = 128; i <= 145; i++)
1221                 printf("%02x ", spd->mpart[i - 128]);
1222         printf("   Mfg's Module Part Number\n");
1223
1224         PRINT_NNXXS(146, 147, spd->mrev[0], spd->mrev[1],
1225                 "Module Revision code");
1226
1227         PRINT_NXS(148, spd->dmid_lsb, "DRAM MfgID Code LSB - JEP-106");
1228         PRINT_NXS(149, spd->dmid_msb, "DRAM MfgID Code MSB - JEP-106");
1229
1230         printf("%-3d-%3d: ", 150, 175);
1231         for (i = 150; i <= 175; i++)
1232                 printf("%02x ", spd->msd[i - 150]);
1233         printf("   Mfg's Specific Data\n");
1234
1235         printf("%-3d-%3d: ", 176, 255);
1236         for (i = 176; i <= 255; i++)
1237                 printf("%02x", spd->cust[i - 176]);
1238         printf("   Mfg's Specific Data\n");
1239
1240 }
1241 #endif
1242
1243 static inline void generic_spd_dump(const generic_spd_eeprom_t *spd)
1244 {
1245 #if defined(CONFIG_FSL_DDR1)
1246         ddr1_spd_dump(spd);
1247 #elif defined(CONFIG_FSL_DDR2)
1248         ddr2_spd_dump(spd);
1249 #elif defined(CONFIG_FSL_DDR3)
1250         ddr3_spd_dump(spd);
1251 #endif
1252 }
1253
1254 static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
1255                         unsigned int ctrl_mask,
1256                         unsigned int dimm_mask,
1257                         unsigned int do_mask)
1258 {
1259         unsigned int i, j, retval;
1260
1261         /* STEP 1:  DIMM SPD data */
1262         if (do_mask & STEP_GET_SPD) {
1263                 for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
1264                         if (!(ctrl_mask & (1 << i)))
1265                                 continue;
1266
1267                         for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
1268                                 if (!(dimm_mask & (1 << j)))
1269                                         continue;
1270
1271                                 printf("SPD info:  Controller=%u "
1272                                                 "DIMM=%u\n", i, j);
1273                                 generic_spd_dump(
1274                                         &(pinfo->spd_installed_dimms[i][j]));
1275                                 printf("\n");
1276                         }
1277                         printf("\n");
1278                 }
1279                 printf("\n");
1280         }
1281
1282         /* STEP 2:  DIMM Parameters */
1283         if (do_mask & STEP_COMPUTE_DIMM_PARMS) {
1284                 for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
1285                         if (!(ctrl_mask & (1 << i)))
1286                                 continue;
1287                         for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
1288                                 if (!(dimm_mask & (1 << j)))
1289                                         continue;
1290                                 printf("DIMM parameters:  Controller=%u "
1291                                                 "DIMM=%u\n", i, j);
1292                                 print_dimm_parameters(
1293                                         &(pinfo->dimm_params[i][j]));
1294                                 printf("\n");
1295                         }
1296                         printf("\n");
1297                 }
1298                 printf("\n");
1299         }
1300
1301         /* STEP 3:  Common Parameters */
1302         if (do_mask & STEP_COMPUTE_COMMON_PARMS) {
1303                 for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
1304                         if (!(ctrl_mask & (1 << i)))
1305                                 continue;
1306                         printf("\"lowest common\" DIMM parameters:  "
1307                                         "Controller=%u\n", i);
1308                         print_lowest_common_dimm_parameters(
1309                                 &pinfo->common_timing_params[i]);
1310                         printf("\n");
1311                 }
1312                 printf("\n");
1313         }
1314
1315         /* STEP 4:  User Configuration Options */
1316         if (do_mask & STEP_GATHER_OPTS) {
1317                 for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
1318                         if (!(ctrl_mask & (1 << i)))
1319                                 continue;
1320                         printf("User Config Options: Controller=%u\n", i);
1321                         print_memctl_options(&pinfo->memctl_opts[i]);
1322                         printf("\n");
1323                 }
1324                 printf("\n");
1325         }
1326
1327         /* STEP 5:  Address assignment */
1328         if (do_mask & STEP_ASSIGN_ADDRESSES) {
1329                 for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
1330                         if (!(ctrl_mask & (1 << i)))
1331                                 continue;
1332                         for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
1333                                 printf("Address Assignment: Controller=%u "
1334                                                 "DIMM=%u\n", i, j);
1335                                 printf("Don't have this functionality yet\n");
1336                         }
1337                         printf("\n");
1338                 }
1339                 printf("\n");
1340         }
1341
1342         /* STEP 6:  computed controller register values */
1343         if (do_mask & STEP_COMPUTE_REGS) {
1344                 for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
1345                         if (!(ctrl_mask & (1 << i)))
1346                                 continue;
1347                         printf("Computed Register Values: Controller=%u\n", i);
1348                         print_fsl_memctl_config_regs(
1349                                 &pinfo->fsl_ddr_config_reg[i]);
1350                         retval = check_fsl_memctl_config_regs(
1351                                 &pinfo->fsl_ddr_config_reg[i]);
1352                         if (retval) {
1353                                 printf("check_fsl_memctl_config_regs "
1354                                         "result = %u\n", retval);
1355                         }
1356                         printf("\n");
1357                 }
1358                 printf("\n");
1359         }
1360 }
1361
1362 struct data_strings {
1363         const char *data_name;
1364         unsigned int step_mask;
1365         unsigned int dimm_number_required;
1366 };
1367
1368 #define DATA_OPTIONS(name, step, dimm) {#name, step, dimm}
1369
1370 static unsigned int fsl_ddr_parse_interactive_cmd(
1371         char **argv,
1372         int argc,
1373         unsigned int *pstep_mask,
1374         unsigned int *pctlr_mask,
1375         unsigned int *pdimm_mask,
1376         unsigned int *pdimm_number_required
1377          ) {
1378
1379         static const struct data_strings options[] = {
1380                 DATA_OPTIONS(spd, STEP_GET_SPD, 1),
1381                 DATA_OPTIONS(dimmparms, STEP_COMPUTE_DIMM_PARMS, 1),
1382                 DATA_OPTIONS(commonparms, STEP_COMPUTE_COMMON_PARMS, 0),
1383                 DATA_OPTIONS(opts, STEP_GATHER_OPTS, 0),
1384                 DATA_OPTIONS(addresses, STEP_ASSIGN_ADDRESSES, 0),
1385                 DATA_OPTIONS(regs, STEP_COMPUTE_REGS, 0),
1386         };
1387         static const unsigned int n_opts = ARRAY_SIZE(options);
1388
1389         unsigned int i, j;
1390         unsigned int error = 0;
1391
1392         for (i = 1; i < argc; i++) {
1393                 unsigned int matched = 0;
1394
1395                 for (j = 0; j < n_opts; j++) {
1396                         if (strcmp(options[j].data_name, argv[i]) != 0)
1397                                 continue;
1398                         *pstep_mask |= options[j].step_mask;
1399                         *pdimm_number_required =
1400                                 options[j].dimm_number_required;
1401                         matched = 1;
1402                         break;
1403                 }
1404
1405                 if (matched)
1406                         continue;
1407
1408                 if (argv[i][0] == 'c') {
1409                         char c = argv[i][1];
1410                         if (isdigit(c))
1411                                 *pctlr_mask |= 1 << (c - '0');
1412                         continue;
1413                 }
1414
1415                 if (argv[i][0] == 'd') {
1416                         char c = argv[i][1];
1417                         if (isdigit(c))
1418                                 *pdimm_mask |= 1 << (c - '0');
1419                         continue;
1420                 }
1421
1422                 printf("unknown arg %s\n", argv[i]);
1423                 *pstep_mask = 0;
1424                 error = 1;
1425                 break;
1426         }
1427
1428         return error;
1429 }
1430
1431 int fsl_ddr_interactive_env_var_exists(void)
1432 {
1433         char buffer[CONFIG_SYS_CBSIZE];
1434
1435         if (getenv_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
1436                 return 1;
1437
1438         return 0;
1439 }
1440
1441 unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set)
1442 {
1443         unsigned long long ddrsize;
1444         const char *prompt = "FSL DDR>";
1445         char buffer[CONFIG_SYS_CBSIZE];
1446         char buffer2[CONFIG_SYS_CBSIZE];
1447         char *p = NULL;
1448         char *argv[CONFIG_SYS_MAXARGS + 1];     /* NULL terminated */
1449         int argc;
1450         unsigned int next_step = STEP_GET_SPD;
1451         const char *usage = {
1452                 "commands:\n"
1453                 "print      print SPD and intermediate computed data\n"
1454                 "reset      reboot machine\n"
1455                 "recompute  reload SPD and options to default and recompute regs\n"
1456                 "edit       modify spd, parameter, or option\n"
1457                 "compute    recompute registers from current next_step to end\n"
1458                 "copy       copy parameters\n"
1459                 "next_step  shows current next_step\n"
1460                 "help       this message\n"
1461                 "go         program the memory controller and continue with u-boot\n"
1462         };
1463
1464         if (var_is_set) {
1465                 if (getenv_f("ddr_interactive", buffer2, CONFIG_SYS_CBSIZE) > 0) {
1466                         p = buffer2;
1467                 } else {
1468                         var_is_set = 0;
1469                 }
1470         }
1471
1472         /*
1473          * The strategy for next_step is that it points to the next
1474          * step in the computation process that needs to be done.
1475          */
1476         while (1) {
1477                 if (var_is_set) {
1478                         char *pend = strchr(p, ';');
1479                         if (pend) {
1480                                 /* found command separator, copy sub-command */
1481                                 *pend = '\0';
1482                                 strcpy(buffer, p);
1483                                 p = pend + 1;
1484                         } else {
1485                                 /* separator not found, copy whole string */
1486                                 strcpy(buffer, p);
1487                                 p = NULL;
1488                                 var_is_set = 0;
1489                         }
1490                 } else {
1491                         /*
1492                          * No need to worry for buffer overflow here in
1493                          * this function;  readline() maxes out at CFG_CBSIZE
1494                          */
1495                         readline_into_buffer(prompt, buffer, 0);
1496                 }
1497                 argc = parse_line(buffer, argv);
1498                 if (argc == 0)
1499                         continue;
1500
1501
1502                 if (strcmp(argv[0], "help") == 0) {
1503                         puts(usage);
1504                         continue;
1505                 }
1506
1507                 if (strcmp(argv[0], "next_step") == 0) {
1508                         printf("next_step = 0x%02X (%s)\n",
1509                                next_step,
1510                                step_to_string(next_step));
1511                         continue;
1512                 }
1513
1514                 if (strcmp(argv[0], "copy") == 0) {
1515                         unsigned int error = 0;
1516                         unsigned int step_mask = 0;
1517                         unsigned int src_ctlr_mask = 0;
1518                         unsigned int src_dimm_mask = 0;
1519                         unsigned int dimm_number_required = 0;
1520                         unsigned int src_ctlr_num = 0;
1521                         unsigned int src_dimm_num = 0;
1522                         unsigned int dst_ctlr_num = -1;
1523                         unsigned int dst_dimm_num = -1;
1524                         unsigned int i, num_dest_parms;
1525
1526                         if (argc == 1) {
1527                                 printf("copy <src c#> <src d#> <spd|dimmparms|commonparms|opts|addresses|regs> <dst c#> <dst d#>\n");
1528                                 continue;
1529                         }
1530
1531                         error = fsl_ddr_parse_interactive_cmd(
1532                                 argv, argc,
1533                                 &step_mask,
1534                                 &src_ctlr_mask,
1535                                 &src_dimm_mask,
1536                                 &dimm_number_required
1537                         );
1538
1539                         /* XXX: only dimm_number_required and step_mask will
1540                            be used by this function.  Parse the controller and
1541                            DIMM number separately because it is easier.  */
1542
1543                         if (error)
1544                                 continue;
1545
1546                         /* parse source destination controller / DIMM */
1547
1548                         num_dest_parms = dimm_number_required ? 2 : 1;
1549
1550                         for (i = 0; i < argc; i++) {
1551                                 if (argv[i][0] == 'c') {
1552                                         char c = argv[i][1];
1553                                         if (isdigit(c)) {
1554                                                 src_ctlr_num = (c - '0');
1555                                                 break;
1556                                         }
1557                                 }
1558                         }
1559
1560                         for (i = 0; i < argc; i++) {
1561                                 if (argv[i][0] == 'd') {
1562                                         char c = argv[i][1];
1563                                         if (isdigit(c)) {
1564                                                 src_dimm_num = (c - '0');
1565                                                 break;
1566                                         }
1567                                 }
1568                         }
1569
1570                         /* parse destination controller / DIMM */
1571
1572                         for (i = argc - 1; i >= argc - num_dest_parms; i--) {
1573                                 if (argv[i][0] == 'c') {
1574                                         char c = argv[i][1];
1575                                         if (isdigit(c)) {
1576                                                 dst_ctlr_num = (c - '0');
1577                                                 break;
1578                                         }
1579                                 }
1580                         }
1581
1582                         for (i = argc - 1; i >= argc - num_dest_parms; i--) {
1583                                 if (argv[i][0] == 'd') {
1584                                         char c = argv[i][1];
1585                                         if (isdigit(c)) {
1586                                                 dst_dimm_num = (c - '0');
1587                                                 break;
1588                                         }
1589                                 }
1590                         }
1591
1592                         /* TODO: validate inputs */
1593
1594                         debug("src_ctlr_num = %u, src_dimm_num = %u, dst_ctlr_num = %u, dst_dimm_num = %u, step_mask = %x\n",
1595                                 src_ctlr_num, src_dimm_num, dst_ctlr_num, dst_dimm_num, step_mask);
1596
1597
1598                         switch (step_mask) {
1599
1600                         case STEP_GET_SPD:
1601                                 memcpy(&(pinfo->spd_installed_dimms[dst_ctlr_num][dst_dimm_num]),
1602                                         &(pinfo->spd_installed_dimms[src_ctlr_num][src_dimm_num]),
1603                                         sizeof(pinfo->spd_installed_dimms[0][0]));
1604                                 break;
1605
1606                         case STEP_COMPUTE_DIMM_PARMS:
1607                                 memcpy(&(pinfo->dimm_params[dst_ctlr_num][dst_dimm_num]),
1608                                         &(pinfo->dimm_params[src_ctlr_num][src_dimm_num]),
1609                                         sizeof(pinfo->dimm_params[0][0]));
1610                                 break;
1611
1612                         case STEP_COMPUTE_COMMON_PARMS:
1613                                 memcpy(&(pinfo->common_timing_params[dst_ctlr_num]),
1614                                         &(pinfo->common_timing_params[src_ctlr_num]),
1615                                         sizeof(pinfo->common_timing_params[0]));
1616                                 break;
1617
1618                         case STEP_GATHER_OPTS:
1619                                 memcpy(&(pinfo->memctl_opts[dst_ctlr_num]),
1620                                         &(pinfo->memctl_opts[src_ctlr_num]),
1621                                         sizeof(pinfo->memctl_opts[0]));
1622                                 break;
1623
1624                         /* someday be able to have addresses to copy addresses... */
1625
1626                         case STEP_COMPUTE_REGS:
1627                                 memcpy(&(pinfo->fsl_ddr_config_reg[dst_ctlr_num]),
1628                                         &(pinfo->fsl_ddr_config_reg[src_ctlr_num]),
1629                                         sizeof(pinfo->memctl_opts[0]));
1630                                 break;
1631
1632                         default:
1633                                 printf("unexpected step_mask value\n");
1634                         }
1635
1636                         continue;
1637
1638                 }
1639
1640                 if (strcmp(argv[0], "edit") == 0) {
1641                         unsigned int error = 0;
1642                         unsigned int step_mask = 0;
1643                         unsigned int ctlr_mask = 0;
1644                         unsigned int dimm_mask = 0;
1645                         char *p_element = NULL;
1646                         char *p_value = NULL;
1647                         unsigned int dimm_number_required = 0;
1648                         unsigned int ctrl_num;
1649                         unsigned int dimm_num;
1650
1651                         if (argc == 1) {
1652                                 /* Only the element and value must be last */
1653                                 printf("edit <c#> <d#> "
1654                                         "<spd|dimmparms|commonparms|opts|"
1655                                         "addresses|regs> <element> <value>\n");
1656                                 printf("for spd, specify byte number for "
1657                                         "element\n");
1658                                 continue;
1659                         }
1660
1661                         error = fsl_ddr_parse_interactive_cmd(
1662                                 argv, argc - 2,
1663                                 &step_mask,
1664                                 &ctlr_mask,
1665                                 &dimm_mask,
1666                                 &dimm_number_required
1667                         );
1668
1669                         if (error)
1670                                 continue;
1671
1672
1673                         /* Check arguments */
1674
1675                         /* ERROR: If no steps were found */
1676                         if (step_mask == 0) {
1677                                 printf("Error: No valid steps were specified "
1678                                                 "in argument.\n");
1679                                 continue;
1680                         }
1681
1682                         /* ERROR: If multiple steps were found */
1683                         if (step_mask & (step_mask - 1)) {
1684                                 printf("Error: Multiple steps specified in "
1685                                                 "argument.\n");
1686                                 continue;
1687                         }
1688
1689                         /* ERROR: Controller not specified */
1690                         if (ctlr_mask == 0) {
1691                                 printf("Error: controller number not "
1692                                         "specified or no element and "
1693                                         "value specified\n");
1694                                 continue;
1695                         }
1696
1697                         if (ctlr_mask & (ctlr_mask - 1)) {
1698                                 printf("Error: multiple controllers "
1699                                                 "specified, %X\n", ctlr_mask);
1700                                 continue;
1701                         }
1702
1703                         /* ERROR: DIMM number not specified */
1704                         if (dimm_number_required && dimm_mask == 0) {
1705                                 printf("Error: DIMM number number not "
1706                                         "specified or no element and "
1707                                         "value specified\n");
1708                                 continue;
1709                         }
1710
1711                         if (dimm_mask & (dimm_mask - 1)) {
1712                                 printf("Error: multipled DIMMs specified\n");
1713                                 continue;
1714                         }
1715
1716                         p_element = argv[argc - 2];
1717                         p_value = argv[argc - 1];
1718
1719                         ctrl_num = __ilog2(ctlr_mask);
1720                         dimm_num = __ilog2(dimm_mask);
1721
1722                         switch (step_mask) {
1723                         case STEP_GET_SPD:
1724                                 {
1725                                         unsigned int element_num;
1726                                         unsigned int value;
1727
1728                                         element_num = simple_strtoul(p_element,
1729                                                                      NULL, 0);
1730                                         value = simple_strtoul(p_value,
1731                                                                NULL, 0);
1732                                         fsl_ddr_spd_edit(pinfo,
1733                                                                ctrl_num,
1734                                                                dimm_num,
1735                                                                element_num,
1736                                                                value);
1737                                         next_step = STEP_COMPUTE_DIMM_PARMS;
1738                                 }
1739                                 break;
1740
1741                         case STEP_COMPUTE_DIMM_PARMS:
1742                                 fsl_ddr_dimm_parameters_edit(
1743                                                  pinfo, ctrl_num, dimm_num,
1744                                                  p_element, p_value);
1745                                 next_step = STEP_COMPUTE_COMMON_PARMS;
1746                                 break;
1747
1748                         case STEP_COMPUTE_COMMON_PARMS:
1749                                 lowest_common_dimm_parameters_edit(pinfo,
1750                                                 ctrl_num, p_element, p_value);
1751                                 next_step = STEP_GATHER_OPTS;
1752                                 break;
1753
1754                         case STEP_GATHER_OPTS:
1755                                 fsl_ddr_options_edit(pinfo, ctrl_num,
1756                                                            p_element, p_value);
1757                                 next_step = STEP_ASSIGN_ADDRESSES;
1758                                 break;
1759
1760                         case STEP_ASSIGN_ADDRESSES:
1761                                 printf("editing of address assignment "
1762                                                 "not yet implemented\n");
1763                                 break;
1764
1765                         case STEP_COMPUTE_REGS:
1766                                 {
1767                                         fsl_ddr_regs_edit(pinfo,
1768                                                                 ctrl_num,
1769                                                                 p_element,
1770                                                                 p_value);
1771                                         next_step = STEP_PROGRAM_REGS;
1772                                 }
1773                                 break;
1774
1775                         default:
1776                                 printf("programming error\n");
1777                                 while (1)
1778                                         ;
1779                                 break;
1780                         }
1781                         continue;
1782                 }
1783
1784                 if (strcmp(argv[0], "reset") == 0) {
1785                         /*
1786                          * Reboot machine.
1787                          * Args don't seem to matter because this
1788                          * doesn't return
1789                          */
1790                         do_reset(NULL, 0, 0, NULL);
1791                         printf("Reset didn't work\n");
1792                 }
1793
1794                 if (strcmp(argv[0], "recompute") == 0) {
1795                         /*
1796                          * Recalculate everything, starting with
1797                          * loading SPD EEPROM from DIMMs
1798                          */
1799                         next_step = STEP_GET_SPD;
1800                         ddrsize = fsl_ddr_compute(pinfo, next_step, 0);
1801                         continue;
1802                 }
1803
1804                 if (strcmp(argv[0], "compute") == 0) {
1805                         /*
1806                          * Compute rest of steps starting at
1807                          * the current next_step/
1808                          */
1809                         ddrsize = fsl_ddr_compute(pinfo, next_step, 0);
1810                         continue;
1811                 }
1812
1813                 if (strcmp(argv[0], "print") == 0) {
1814                         unsigned int error = 0;
1815                         unsigned int step_mask = 0;
1816                         unsigned int ctlr_mask = 0;
1817                         unsigned int dimm_mask = 0;
1818                         unsigned int dimm_number_required = 0;
1819
1820                         if (argc == 1) {
1821                                 printf("print [c<n>] [d<n>] [spd] [dimmparms] "
1822                                   "[commonparms] [opts] [addresses] [regs]\n");
1823                                 continue;
1824                         }
1825
1826                         error = fsl_ddr_parse_interactive_cmd(
1827                                 argv, argc,
1828                                 &step_mask,
1829                                 &ctlr_mask,
1830                                 &dimm_mask,
1831                                 &dimm_number_required
1832                         );
1833
1834                         if (error)
1835                                 continue;
1836
1837                         /* If no particular controller was found, print all */
1838                         if (ctlr_mask == 0)
1839                                 ctlr_mask = 0xFF;
1840
1841                         /* If no particular dimm was found, print all dimms. */
1842                         if (dimm_mask == 0)
1843                                 dimm_mask = 0xFF;
1844
1845                         /* If no steps were found, print all steps. */
1846                         if (step_mask == 0)
1847                                 step_mask = STEP_ALL;
1848
1849                         fsl_ddr_printinfo(pinfo, ctlr_mask,
1850                                                 dimm_mask, step_mask);
1851                         continue;
1852                 }
1853
1854                 if (strcmp(argv[0], "go") == 0) {
1855                         if (next_step)
1856                                 ddrsize = fsl_ddr_compute(pinfo, next_step, 0);
1857                         break;
1858                 }
1859
1860                 printf("unknown command %s\n", argv[0]);
1861         }
1862
1863         debug("end of memory = %llu\n", (u64)ddrsize);
1864
1865         return ddrsize;
1866 }