board/calao/usb_a9263/usb_a9263.c

   1 /*
   2  * (C) Copyright 2007-2013
   3  * Stelian Pop <stelian.pop@leadtechdesign.com>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
   6  * Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <asm/arch/at91sam9_smc.h>
  13 #include <asm/arch/at91_common.h>
  14 #include <asm/arch/at91_matrix.h>
  15 #include <asm/arch/at91_pmc.h>
  16 #include <asm/arch/gpio.h>
  17 #include <asm-generic/gpio.h>
  18 #include <asm/io.h>
  19 #include <net.h>
  20 #include <netdev.h>
  21 #include <dataflash.h>
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 #ifdef CONFIG_HAS_DATAFLASH
  26 AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
  27
  28 struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
  29         {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},       /* Logical adress, CS */
  30 };
  31
  32 /*define the area offsets*/
  33 dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
  34         {0x00000000, 0x00001FFF, FLAG_PROTECT_SET, 0, "Bootstrap"},
  35         {0x00002000, 0x00003FFF, FLAG_PROTECT_CLEAR, 0, "Environment"},
  36         {0x00004000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"},
  37 };
  38 #endif
  39
  40 #ifdef CONFIG_CMD_NAND
  41 static void usb_a9263_nand_hw_init(void)
  42 {
  43         unsigned long csa;
  44         at91_smc_t *smc = (at91_smc_t *)ATMEL_BASE_SMC0;
  45         at91_matrix_t *matrix = (at91_matrix_t *)ATMEL_BASE_MATRIX;
  46         at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
  47
  48         /* Enable CS3 */
  49         csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
  50         writel(csa, &matrix->csa[0]);
  51
  52         /* Configure SMC CS3 for NAND/SmartMedia */
  53         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  54                AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  55                &smc->cs[3].setup);
  56
  57         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  58                AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  59                &smc->cs[3].pulse);
  60
  61         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  62                &smc->cs[3].cycle);
  63
  64         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  65                AT91_SMC_MODE_EXNW_DISABLE |
  66                AT91_SMC_MODE_DBW_8 |
  67                AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);
  68
  69         writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE, &pmc->pcer);
  70
  71         /* Configure RDY/BSY */
  72         gpio_request(CONFIG_SYS_NAND_READY_PIN, "NAND ready/busy");
  73         gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
  74
  75         /* Enable NandFlash */
  76         gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "NAND enable");
  77         gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  78 }
  79 #endif
  80
  81 #ifdef CONFIG_MACB
  82 static void usb_a9263_macb_hw_init(void)
  83 {
  84         at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
  85
  86         /* Enable clock */
  87         writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
  88
  89         /*
  90          * Disable pull-up on:
  91          *  RXDV (PC25) => PHY normal mode (not Test mode)
  92          *  ERX0 (PE25) => PHY ADDR0
  93          *  ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
  94          *
  95          * PHY has internal weak pull-up/pull-down
  96          */
  97         gpio_request(GPIO_PIN_PC(25), "PHY mode");
  98         gpio_direction_input(GPIO_PIN_PC(25));
  99
 100         gpio_request(GPIO_PIN_PE(25), "PHY ADDR0");
 101         gpio_direction_input(GPIO_PIN_PE(25));
 102
 103         gpio_request(GPIO_PIN_PE(26), "PHY ADDR1");
 104         gpio_direction_input(GPIO_PIN_PE(26));
 105
 106         at91_phy_reset();
 107
 108         /* It will set proper pinmux for ports PC25, PE25-26 */
 109         at91_macb_hw_init();
 110 }
 111 #endif
 112
 113 int board_init(void)
 114 {
 115         /* adress of boot parameters */
 116         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 117
 118 #ifdef CONFIG_CMD_NAND
 119         usb_a9263_nand_hw_init();
 120 #endif
 121 #ifdef CONFIG_HAS_DATAFLASH
 122         at91_spi0_hw_init(1 << 0);
 123 #endif
 124 #ifdef CONFIG_MACB
 125         usb_a9263_macb_hw_init();
 126 #endif
 127 #ifdef CONFIG_USB_OHCI_NEW
 128         at91_uhp_hw_init();
 129 #endif
 130         return 0;
 131 }
 132
 133 int dram_init(void)
 134 {
 135         gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
 136                                     CONFIG_SYS_SDRAM_SIZE);
 137         return 0;
 138 }
 139
 140 int board_eth_init(bd_t *bis)
 141 {
 142         int rc = 0;
 143
 144 #ifdef CONFIG_MACB
 145         rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x0001);
 146 #endif
 147         return rc;
 148 }