drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <asm/processor.h>
  49 #include <asm/byteorder.h>
  50 #include <environment.h>
  51 #ifdef  CFG_FLASH_CFI_DRIVER
  52
  53 /*
  54  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  55  * The width of the port and the width of the chips are determined at initialization.
  56  * These widths are used to calculate the address for access CFI data structures.
  57  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  58  *
  59  * References
  60  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  61  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  62  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  63  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  64  *
  65  * TODO
  66  *
  67  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  68  * Table (ALT) to determine if protection is available
  69  *
  70  * Add support for other command sets Use the PRI and ALT to determine command set
  71  * Verify erase and program timeouts.
  72  */
  73
  74 #ifndef CFG_FLASH_BANKS_LIST
  75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  76 #endif
  77
  78 #define FLASH_CMD_CFI                   0x98
  79 #define FLASH_CMD_READ_ID               0x90
  80 #define FLASH_CMD_RESET                 0xff
  81 #define FLASH_CMD_BLOCK_ERASE           0x20
  82 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  83 #define FLASH_CMD_WRITE                 0x40
  84 #define FLASH_CMD_PROTECT               0x60
  85 #define FLASH_CMD_PROTECT_SET           0x01
  86 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  87 #define FLASH_CMD_CLEAR_STATUS          0x50
  88 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  90
  91 #define FLASH_STATUS_DONE               0x80
  92 #define FLASH_STATUS_ESS                0x40
  93 #define FLASH_STATUS_ECLBS              0x20
  94 #define FLASH_STATUS_PSLBS              0x10
  95 #define FLASH_STATUS_VPENS              0x08
  96 #define FLASH_STATUS_PSS                0x04
  97 #define FLASH_STATUS_DPS                0x02
  98 #define FLASH_STATUS_R                  0x01
  99 #define FLASH_STATUS_PROTECT            0x01
 100
 101 #define AMD_CMD_RESET                   0xF0
 102 #define AMD_CMD_WRITE                   0xA0
 103 #define AMD_CMD_ERASE_START             0x80
 104 #define AMD_CMD_ERASE_SECTOR            0x30
 105 #define AMD_CMD_UNLOCK_START            0xAA
 106 #define AMD_CMD_UNLOCK_ACK              0x55
 107
 108 #define AMD_STATUS_TOGGLE               0x40
 109 #define AMD_STATUS_ERROR                0x20
 110 #define AMD_ADDR_ERASE_START            0x555
 111 #define AMD_ADDR_START                  0x555
 112 #define AMD_ADDR_ACK                    0x2AA
 113
 114 #define FLASH_OFFSET_CFI                0x55
 115 #define FLASH_OFFSET_CFI_RESP           0x10
 116 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 117 #define FLASH_OFFSET_WTOUT              0x1F
 118 #define FLASH_OFFSET_WBTOUT             0x20
 119 #define FLASH_OFFSET_ETOUT              0x21
 120 #define FLASH_OFFSET_CETOUT             0x22
 121 #define FLASH_OFFSET_WMAX_TOUT          0x23
 122 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 123 #define FLASH_OFFSET_EMAX_TOUT          0x25
 124 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 125 #define FLASH_OFFSET_SIZE               0x27
 126 #define FLASH_OFFSET_INTERFACE          0x28
 127 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 128 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 129 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 130 #define FLASH_OFFSET_PROTECT            0x02
 131 #define FLASH_OFFSET_USER_PROTECTION    0x85
 132 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 133
 134
 135 #define FLASH_MAN_CFI                   0x01000000
 136
 137 #define CFI_CMDSET_NONE             0
 138 #define CFI_CMDSET_INTEL_EXTENDED   1
 139 #define CFI_CMDSET_AMD_STANDARD     2
 140 #define CFI_CMDSET_INTEL_STANDARD   3
 141 #define CFI_CMDSET_AMD_EXTENDED     4
 142 #define CFI_CMDSET_MITSU_STANDARD   256
 143 #define CFI_CMDSET_MITSU_EXTENDED   257
 144 #define CFI_CMDSET_SST              258
 145
 146
 147 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 148 # undef  FLASH_CMD_RESET
 149 # define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
 150 #endif
 151
 152
 153 typedef union {
 154         unsigned char c;
 155         unsigned short w;
 156         unsigned long l;
 157         unsigned long long ll;
 158 } cfiword_t;
 159
 160 typedef union {
 161         volatile unsigned char *cp;
 162         volatile unsigned short *wp;
 163         volatile unsigned long *lp;
 164         volatile unsigned long long *llp;
 165 } cfiptr_t;
 166
 167 #define NUM_ERASE_REGIONS 4
 168
 169 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 170 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 171 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 172 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 173 #else
 174 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 175 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 176 #endif
 177
 178
 179 /*-----------------------------------------------------------------------
 180  * Functions
 181  */
 182
 183 typedef unsigned long flash_sect_t;
 184
 185 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 186 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 187 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 188 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 189 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 190 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 191 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 192 static int flash_detect_cfi (flash_info_t * info);
 193 ulong flash_get_size (ulong base, int banknum);
 194 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 195 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 196                                     ulong tout, char *prompt);
 197 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 198 static flash_info_t *flash_get_info(ulong base);
 199 #endif
 200 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 201 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 202 #endif
 203
 204 /*-----------------------------------------------------------------------
 205  * create an address based on the offset and the port width
 206  */
 207 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 208 {
 209         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 210 }
 211
 212 #ifdef DEBUG
 213 /*-----------------------------------------------------------------------
 214  * Debug support
 215  */
 216 void print_longlong (char *str, unsigned long long data)
 217 {
 218         int i;
 219         char *cp;
 220
 221         cp = (unsigned char *) &data;
 222         for (i = 0; i < 8; i++)
 223                 sprintf (&str[i * 2], "%2.2x", *cp++);
 224 }
 225 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 226 {
 227         cfiptr_t cptr;
 228         int x, y;
 229
 230         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 231                 cptr.cp =
 232                         flash_make_addr (info, sect,
 233                                          x + FLASH_OFFSET_CFI_RESP);
 234                 debug ("%p : ", cptr.cp);
 235                 for (y = 0; y < 16; y++) {
 236                         debug ("%2.2x ", cptr.cp[y]);
 237                 }
 238                 debug (" ");
 239                 for (y = 0; y < 16; y++) {
 240                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 241                                 debug ("%c", cptr.cp[y]);
 242                         } else {
 243                                 debug (".");
 244                         }
 245                 }
 246                 debug ("\n");
 247         }
 248 }
 249 #endif
 250
 251
 252 /*-----------------------------------------------------------------------
 253  * read a character at a port width address
 254  */
 255 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 256 {
 257         uchar *cp;
 258
 259         cp = flash_make_addr (info, 0, offset);
 260 #if defined(__LITTLE_ENDIAN)
 261         return (cp[0]);
 262 #else
 263         return (cp[info->portwidth - 1]);
 264 #endif
 265 }
 266
 267 /*-----------------------------------------------------------------------
 268  * read a short word by swapping for ppc format.
 269  */
 270 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 271 {
 272         uchar *addr;
 273         ushort retval;
 274
 275 #ifdef DEBUG
 276         int x;
 277 #endif
 278         addr = flash_make_addr (info, sect, offset);
 279
 280 #ifdef DEBUG
 281         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 282                info->portwidth);
 283         for (x = 0; x < 2 * info->portwidth; x++) {
 284                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 285         }
 286 #endif
 287 #if defined(__LITTLE_ENDIAN)
 288         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 289 #else
 290         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 291                   addr[info->portwidth - 1]);
 292 #endif
 293
 294         debug ("retval = 0x%x\n", retval);
 295         return retval;
 296 }
 297
 298 /*-----------------------------------------------------------------------
 299  * read a long word by picking the least significant byte of each maiximum
 300  * port size word. Swap for ppc format.
 301  */
 302 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 303 {
 304         uchar *addr;
 305         ulong retval;
 306
 307 #ifdef DEBUG
 308         int x;
 309 #endif
 310         addr = flash_make_addr (info, sect, offset);
 311
 312 #ifdef DEBUG
 313         debug ("long addr is at %p info->portwidth = %d\n", addr,
 314                info->portwidth);
 315         for (x = 0; x < 4 * info->portwidth; x++) {
 316                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 317         }
 318 #endif
 319 #if defined(__LITTLE_ENDIAN)
 320         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 321                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 322 #else
 323         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 324                 (addr[(info->portwidth) - 1] << 16) |
 325                 (addr[(4 * info->portwidth) - 1] << 8) |
 326                 addr[(3 * info->portwidth) - 1];
 327 #endif
 328         return retval;
 329 }
 330
 331 /*-----------------------------------------------------------------------
 332  */
 333 unsigned long flash_init (void)
 334 {
 335         unsigned long size = 0;
 336         int i;
 337
 338         /* Init: no FLASHes known */
 339         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 340                 flash_info[i].flash_id = FLASH_UNKNOWN;
 341                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 342                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 343                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 344                                 i, flash_info[i].size, flash_info[i].size << 20);
 345                 }
 346         }
 347
 348         /* Monitor protection ON by default */
 349 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 350         flash_protect (FLAG_PROTECT_SET,
 351                        CFG_MONITOR_BASE,
 352                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 353                        flash_get_info(CFG_MONITOR_BASE));
 354 #endif
 355
 356         /* Environment protection ON by default */
 357 #ifdef CFG_ENV_IS_IN_FLASH
 358         flash_protect (FLAG_PROTECT_SET,
 359                        CFG_ENV_ADDR,
 360                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 361                        flash_get_info(CFG_ENV_ADDR));
 362 #endif
 363
 364         /* Redundant environment protection ON by default */
 365 #ifdef CFG_ENV_ADDR_REDUND
 366         flash_protect (FLAG_PROTECT_SET,
 367                        CFG_ENV_ADDR_REDUND,
 368                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 369                        flash_get_info(CFG_ENV_ADDR_REDUND));
 370 #endif
 371         return (size);
 372 }
 373
 374 /*-----------------------------------------------------------------------
 375  */
 376 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 377 static flash_info_t *flash_get_info(ulong base)
 378 {
 379         int i;
 380         flash_info_t * info = 0;
 381
 382         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 383                 info = & flash_info[i];
 384                 if (info->size && info->start[0] <= base &&
 385                     base <= info->start[0] + info->size - 1)
 386                         break;
 387         }
 388
 389         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 390 }
 391 #endif
 392
 393 /*-----------------------------------------------------------------------
 394  */
 395 int flash_erase (flash_info_t * info, int s_first, int s_last)
 396 {
 397         int rcode = 0;
 398         int prot;
 399         flash_sect_t sect;
 400
 401         if (info->flash_id != FLASH_MAN_CFI) {
 402                 puts ("Can't erase unknown flash type - aborted\n");
 403                 return 1;
 404         }
 405         if ((s_first < 0) || (s_first > s_last)) {
 406                 puts ("- no sectors to erase\n");
 407                 return 1;
 408         }
 409
 410         prot = 0;
 411         for (sect = s_first; sect <= s_last; ++sect) {
 412                 if (info->protect[sect]) {
 413                         prot++;
 414                 }
 415         }
 416         if (prot) {
 417                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 418         } else {
 419                 putc ('\n');
 420         }
 421
 422
 423         for (sect = s_first; sect <= s_last; sect++) {
 424                 if (info->protect[sect] == 0) { /* not protected */
 425                         switch (info->vendor) {
 426                         case CFI_CMDSET_INTEL_STANDARD:
 427                         case CFI_CMDSET_INTEL_EXTENDED:
 428                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 429                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 430                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 431                                 break;
 432                         case CFI_CMDSET_AMD_STANDARD:
 433                         case CFI_CMDSET_AMD_EXTENDED:
 434                                 flash_unlock_seq (info, sect);
 435                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 436                                                         AMD_CMD_ERASE_START);
 437                                 flash_unlock_seq (info, sect);
 438                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 439                                 break;
 440                         default:
 441                                 debug ("Unkown flash vendor %d\n",
 442                                        info->vendor);
 443                                 break;
 444                         }
 445
 446                         if (flash_full_status_check
 447                             (info, sect, info->erase_blk_tout, "erase")) {
 448                                 rcode = 1;
 449                         } else
 450                                 putc ('.');
 451                 }
 452         }
 453         puts (" done\n");
 454         return rcode;
 455 }
 456
 457 /*-----------------------------------------------------------------------
 458  */
 459 void flash_print_info (flash_info_t * info)
 460 {
 461         int i;
 462
 463         if (info->flash_id != FLASH_MAN_CFI) {
 464                 puts ("missing or unknown FLASH type\n");
 465                 return;
 466         }
 467
 468         printf ("CFI conformant FLASH (%d x %d)",
 469                 (info->portwidth << 3), (info->chipwidth << 3));
 470         printf ("  Size: %ld MB in %d Sectors\n",
 471                 info->size >> 20, info->sector_count);
 472         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
 473                 info->erase_blk_tout,
 474                 info->write_tout,
 475                 info->buffer_write_tout,
 476                 info->buffer_size);
 477
 478         puts ("  Sector Start Addresses:");
 479         for (i = 0; i < info->sector_count; ++i) {
 480 #ifdef CFG_FLASH_EMPTY_INFO
 481                 int k;
 482                 int size;
 483                 int erased;
 484                 volatile unsigned long *flash;
 485
 486                 /*
 487                  * Check if whole sector is erased
 488                  */
 489                 if (i != (info->sector_count - 1))
 490                         size = info->start[i + 1] - info->start[i];
 491                 else
 492                         size = info->start[0] + info->size - info->start[i];
 493                 erased = 1;
 494                 flash = (volatile unsigned long *) info->start[i];
 495                 size = size >> 2;       /* divide by 4 for longword access */
 496                 for (k = 0; k < size; k++) {
 497                         if (*flash++ != 0xffffffff) {
 498                                 erased = 0;
 499                                 break;
 500                         }
 501                 }
 502
 503                 if ((i % 5) == 0)
 504                         printf ("\n");
 505                 /* print empty and read-only info */
 506                 printf (" %08lX%s%s",
 507                         info->start[i],
 508                         erased ? " E" : "  ",
 509                         info->protect[i] ? "RO " : "   ");
 510 #else   /* ! CFG_FLASH_EMPTY_INFO */
 511                 if ((i % 5) == 0)
 512                         printf ("\n   ");
 513                 printf (" %08lX%s",
 514                         info->start[i], info->protect[i] ? " (RO)" : "     ");
 515 #endif
 516         }
 517         putc ('\n');
 518         return;
 519 }
 520
 521 /*-----------------------------------------------------------------------
 522  * Copy memory to flash, returns:
 523  * 0 - OK
 524  * 1 - write timeout
 525  * 2 - Flash not erased
 526  */
 527 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 528 {
 529         ulong wp;
 530         ulong cp;
 531         int aln;
 532         cfiword_t cword;
 533         int i, rc;
 534
 535 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 536         int buffered_size;
 537 #endif
 538         /* get lower aligned address */
 539         /* get lower aligned address */
 540         wp = (addr & ~(info->portwidth - 1));
 541
 542         /* handle unaligned start */
 543         if ((aln = addr - wp) != 0) {
 544                 cword.l = 0;
 545                 cp = wp;
 546                 for (i = 0; i < aln; ++i, ++cp)
 547                         flash_add_byte (info, &cword, (*(uchar *) cp));
 548
 549                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 550                         flash_add_byte (info, &cword, *src++);
 551                         cnt--;
 552                         cp++;
 553                 }
 554                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 555                         flash_add_byte (info, &cword, (*(uchar *) cp));
 556                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 557                         return rc;
 558                 wp = cp;
 559         }
 560
 561         /* handle the aligned part */
 562 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 563         buffered_size = (info->portwidth / info->chipwidth);
 564         buffered_size *= info->buffer_size;
 565         while (cnt >= info->portwidth) {
 566                 i = buffered_size > cnt ? cnt : buffered_size;
 567                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 568                         return rc;
 569                 i -= i & (info->portwidth - 1);
 570                 wp += i;
 571                 src += i;
 572                 cnt -= i;
 573         }
 574 #else
 575         while (cnt >= info->portwidth) {
 576                 cword.l = 0;
 577                 for (i = 0; i < info->portwidth; i++) {
 578                         flash_add_byte (info, &cword, *src++);
 579                 }
 580                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 581                         return rc;
 582                 wp += info->portwidth;
 583                 cnt -= info->portwidth;
 584         }
 585 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 586         if (cnt == 0) {
 587                 return (0);
 588         }
 589
 590         /*
 591          * handle unaligned tail bytes
 592          */
 593         cword.l = 0;
 594         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 595                 flash_add_byte (info, &cword, *src++);
 596                 --cnt;
 597         }
 598         for (; i < info->portwidth; ++i, ++cp) {
 599                 flash_add_byte (info, &cword, (*(uchar *) cp));
 600         }
 601
 602         return flash_write_cfiword (info, wp, cword);
 603 }
 604
 605 /*-----------------------------------------------------------------------
 606  */
 607 #ifdef CFG_FLASH_PROTECTION
 608
 609 int flash_real_protect (flash_info_t * info, long sector, int prot)
 610 {
 611         int retcode = 0;
 612
 613         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 614         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 615         if (prot)
 616                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 617         else
 618                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 619
 620         if ((retcode =
 621              flash_full_status_check (info, sector, info->erase_blk_tout,
 622                                       prot ? "protect" : "unprotect")) == 0) {
 623
 624                 info->protect[sector] = prot;
 625                 /* Intel's unprotect unprotects all locking */
 626                 if (prot == 0) {
 627                         flash_sect_t i;
 628
 629                         for (i = 0; i < info->sector_count; i++) {
 630                                 if (info->protect[i])
 631                                         flash_real_protect (info, i, 1);
 632                         }
 633                 }
 634         }
 635         return retcode;
 636 }
 637
 638 /*-----------------------------------------------------------------------
 639  * flash_read_user_serial - read the OneTimeProgramming cells
 640  */
 641 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 642                              int len)
 643 {
 644         uchar *src;
 645         uchar *dst;
 646
 647         dst = buffer;
 648         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 649         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 650         memcpy (dst, src + offset, len);
 651         flash_write_cmd (info, 0, 0, info->cmd_reset);
 652 }
 653
 654 /*
 655  * flash_read_factory_serial - read the device Id from the protection area
 656  */
 657 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 658                                 int len)
 659 {
 660         uchar *src;
 661
 662         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 663         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 664         memcpy (buffer, src + offset, len);
 665         flash_write_cmd (info, 0, 0, info->cmd_reset);
 666 }
 667
 668 #endif /* CFG_FLASH_PROTECTION */
 669
 670 /*
 671  * flash_is_busy - check to see if the flash is busy
 672  * This routine checks the status of the chip and returns true if the chip is busy
 673  */
 674 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 675 {
 676         int retval;
 677
 678         switch (info->vendor) {
 679         case CFI_CMDSET_INTEL_STANDARD:
 680         case CFI_CMDSET_INTEL_EXTENDED:
 681                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 682                 break;
 683         case CFI_CMDSET_AMD_STANDARD:
 684         case CFI_CMDSET_AMD_EXTENDED:
 685                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 686                 break;
 687         default:
 688                 retval = 0;
 689         }
 690         debug ("flash_is_busy: %d\n", retval);
 691         return retval;
 692 }
 693
 694 /*-----------------------------------------------------------------------
 695  *  wait for XSR.7 to be set. Time out with an error if it does not.
 696  *  This routine does not set the flash to read-array mode.
 697  */
 698 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 699                                ulong tout, char *prompt)
 700 {
 701         ulong start;
 702
 703         /* Wait for command completion */
 704         start = get_timer (0);
 705         while (flash_is_busy (info, sector)) {
 706                 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
 707                         printf ("Flash %s timeout at address %lx data %lx\n",
 708                                 prompt, info->start[sector],
 709                                 flash_read_long (info, sector, 0));
 710                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 711                         return ERR_TIMOUT;
 712                 }
 713         }
 714         return ERR_OK;
 715 }
 716
 717 /*-----------------------------------------------------------------------
 718  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 719  * This routine sets the flash to read-array mode.
 720  */
 721 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 722                                     ulong tout, char *prompt)
 723 {
 724         int retcode;
 725
 726         retcode = flash_status_check (info, sector, tout, prompt);
 727         switch (info->vendor) {
 728         case CFI_CMDSET_INTEL_EXTENDED:
 729         case CFI_CMDSET_INTEL_STANDARD:
 730                 if ((retcode != ERR_OK)
 731                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 732                         retcode = ERR_INVAL;
 733                         printf ("Flash %s error at address %lx\n", prompt,
 734                                 info->start[sector]);
 735                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 736                                 puts ("Command Sequence Error.\n");
 737                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 738                                 puts ("Block Erase Error.\n");
 739                                 retcode = ERR_NOT_ERASED;
 740                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 741                                 puts ("Locking Error\n");
 742                         }
 743                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 744                                 puts ("Block locked.\n");
 745                                 retcode = ERR_PROTECTED;
 746                         }
 747                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 748                                 puts ("Vpp Low Error.\n");
 749                 }
 750                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 751                 break;
 752         default:
 753                 break;
 754         }
 755         return retcode;
 756 }
 757
 758 /*-----------------------------------------------------------------------
 759  */
 760 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 761 {
 762 #if defined(__LITTLE_ENDIAN)
 763         unsigned short  w;
 764         unsigned int    l;
 765         unsigned long long ll;
 766 #endif
 767
 768         switch (info->portwidth) {
 769         case FLASH_CFI_8BIT:
 770                 cword->c = c;
 771                 break;
 772         case FLASH_CFI_16BIT:
 773 #if defined(__LITTLE_ENDIAN)
 774                 w = c;
 775                 w <<= 8;
 776                 cword->w = (cword->w >> 8) | w;
 777 #else
 778                 cword->w = (cword->w << 8) | c;
 779 #endif
 780                 break;
 781         case FLASH_CFI_32BIT:
 782 #if defined(__LITTLE_ENDIAN)
 783                 l = c;
 784                 l <<= 24;
 785                 cword->l = (cword->l >> 8) | l;
 786 #else
 787                 cword->l = (cword->l << 8) | c;
 788 #endif
 789                 break;
 790         case FLASH_CFI_64BIT:
 791 #if defined(__LITTLE_ENDIAN)
 792                 ll = c;
 793                 ll <<= 56;
 794                 cword->ll = (cword->ll >> 8) | ll;
 795 #else
 796                 cword->ll = (cword->ll << 8) | c;
 797 #endif
 798                 break;
 799         }
 800 }
 801
 802
 803 /*-----------------------------------------------------------------------
 804  * make a proper sized command based on the port and chip widths
 805  */
 806 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 807 {
 808         int i;
 809         uchar *cp = (uchar *) cmdbuf;
 810
 811 #if defined(__LITTLE_ENDIAN)
 812         for (i = info->portwidth; i > 0; i--)
 813 #else
 814         for (i = 1; i <= info->portwidth; i++)
 815 #endif
 816                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 817 }
 818
 819 /*
 820  * Write a proper sized command to the correct address
 821  */
 822 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 823 {
 824
 825         volatile cfiptr_t addr;
 826         cfiword_t cword;
 827
 828         addr.cp = flash_make_addr (info, sect, offset);
 829         flash_make_cmd (info, cmd, &cword);
 830         switch (info->portwidth) {
 831         case FLASH_CFI_8BIT:
 832                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 833                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 834                 *addr.cp = cword.c;
 835                 break;
 836         case FLASH_CFI_16BIT:
 837                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 838                        cmd, cword.w,
 839                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 840                 *addr.wp = cword.w;
 841                 break;
 842         case FLASH_CFI_32BIT:
 843                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 844                        cmd, cword.l,
 845                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 846                 *addr.lp = cword.l;
 847                 break;
 848         case FLASH_CFI_64BIT:
 849 #ifdef DEBUG
 850                 {
 851                         char str[20];
 852
 853                         print_longlong (str, cword.ll);
 854
 855                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 856                                addr.llp, cmd, str,
 857                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 858                 }
 859 #endif
 860                 *addr.llp = cword.ll;
 861                 break;
 862         }
 863 }
 864
 865 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 866 {
 867         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 868         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 869 }
 870
 871 /*-----------------------------------------------------------------------
 872  */
 873 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 874 {
 875         cfiptr_t cptr;
 876         cfiword_t cword;
 877         int retval;
 878
 879         cptr.cp = flash_make_addr (info, sect, offset);
 880         flash_make_cmd (info, cmd, &cword);
 881
 882         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 883         switch (info->portwidth) {
 884         case FLASH_CFI_8BIT:
 885                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 886                 retval = (cptr.cp[0] == cword.c);
 887                 break;
 888         case FLASH_CFI_16BIT:
 889                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 890                 retval = (cptr.wp[0] == cword.w);
 891                 break;
 892         case FLASH_CFI_32BIT:
 893                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 894                 retval = (cptr.lp[0] == cword.l);
 895                 break;
 896         case FLASH_CFI_64BIT:
 897 #ifdef DEBUG
 898                 {
 899                         char str1[20];
 900                         char str2[20];
 901
 902                         print_longlong (str1, cptr.llp[0]);
 903                         print_longlong (str2, cword.ll);
 904                         debug ("is= %s %s\n", str1, str2);
 905                 }
 906 #endif
 907                 retval = (cptr.llp[0] == cword.ll);
 908                 break;
 909         default:
 910                 retval = 0;
 911                 break;
 912         }
 913         return retval;
 914 }
 915
 916 /*-----------------------------------------------------------------------
 917  */
 918 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 919 {
 920         cfiptr_t cptr;
 921         cfiword_t cword;
 922         int retval;
 923
 924         cptr.cp = flash_make_addr (info, sect, offset);
 925         flash_make_cmd (info, cmd, &cword);
 926         switch (info->portwidth) {
 927         case FLASH_CFI_8BIT:
 928                 retval = ((cptr.cp[0] & cword.c) == cword.c);
 929                 break;
 930         case FLASH_CFI_16BIT:
 931                 retval = ((cptr.wp[0] & cword.w) == cword.w);
 932                 break;
 933         case FLASH_CFI_32BIT:
 934                 retval = ((cptr.lp[0] & cword.l) == cword.l);
 935                 break;
 936         case FLASH_CFI_64BIT:
 937                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
 938                 break;
 939         default:
 940                 retval = 0;
 941                 break;
 942         }
 943         return retval;
 944 }
 945
 946 /*-----------------------------------------------------------------------
 947  */
 948 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 949 {
 950         cfiptr_t cptr;
 951         cfiword_t cword;
 952         int retval;
 953
 954         cptr.cp = flash_make_addr (info, sect, offset);
 955         flash_make_cmd (info, cmd, &cword);
 956         switch (info->portwidth) {
 957         case FLASH_CFI_8BIT:
 958                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
 959                 break;
 960         case FLASH_CFI_16BIT:
 961                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
 962                 break;
 963         case FLASH_CFI_32BIT:
 964                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
 965                 break;
 966         case FLASH_CFI_64BIT:
 967                 retval = ((cptr.llp[0] & cword.ll) !=
 968                           (cptr.llp[0] & cword.ll));
 969                 break;
 970         default:
 971                 retval = 0;
 972                 break;
 973         }
 974         return retval;
 975 }
 976
 977 /*-----------------------------------------------------------------------
 978  * detect if flash is compatible with the Common Flash Interface (CFI)
 979  * http://www.jedec.org/download/search/jesd68.pdf
 980  *
 981 */
 982 static int flash_detect_cfi (flash_info_t * info)
 983 {
 984         debug ("flash detect cfi\n");
 985
 986         for (info->portwidth = FLASH_CFI_8BIT;
 987              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
 988                 for (info->chipwidth = FLASH_CFI_BY8;
 989                      info->chipwidth <= info->portwidth;
 990                      info->chipwidth <<= 1) {
 991                         flash_write_cmd (info, 0, 0, info->cmd_reset);
 992                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
 993                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
 994                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
 995                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
 996                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
 997                                 debug ("device interface is %d\n",
 998                                        info->interface);
 999                                 debug ("found port %d chip %d ",
1000                                        info->portwidth, info->chipwidth);
1001                                 debug ("port %d bits chip %d bits\n",
1002                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1003                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1004                                 return 1;
1005                         }
1006                 }
1007         }
1008         debug ("not found\n");
1009         return 0;
1010 }
1011
1012 /*
1013  * The following code cannot be run from FLASH!
1014  *
1015  */
1016 ulong flash_get_size (ulong base, int banknum)
1017 {
1018         flash_info_t *info = &flash_info[banknum];
1019         int i, j;
1020         flash_sect_t sect_cnt;
1021         unsigned long sector;
1022         unsigned long tmp;
1023         int size_ratio;
1024         uchar num_erase_regions;
1025         int erase_region_size;
1026         int erase_region_count;
1027
1028         info->start[0] = base;
1029
1030         if (flash_detect_cfi (info)) {
1031                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1032 #ifdef DEBUG
1033                 flash_printqry (info, 0);
1034 #endif
1035                 switch (info->vendor) {
1036                 case CFI_CMDSET_INTEL_STANDARD:
1037                 case CFI_CMDSET_INTEL_EXTENDED:
1038                 default:
1039                         info->cmd_reset = FLASH_CMD_RESET;
1040                         break;
1041                 case CFI_CMDSET_AMD_STANDARD:
1042                 case CFI_CMDSET_AMD_EXTENDED:
1043                         info->cmd_reset = AMD_CMD_RESET;
1044                         break;
1045                 }
1046
1047                 debug ("manufacturer is %d\n", info->vendor);
1048                 size_ratio = info->portwidth / info->chipwidth;
1049                 /* if the chip is x8/x16 reduce the ratio by half */
1050                 if ((info->interface == FLASH_CFI_X8X16)
1051                     && (info->chipwidth == FLASH_CFI_BY8)) {
1052                         size_ratio >>= 1;
1053                 }
1054                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1055                 debug ("size_ratio %d port %d bits chip %d bits\n",
1056                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1057                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1058                 debug ("found %d erase regions\n", num_erase_regions);
1059                 sect_cnt = 0;
1060                 sector = base;
1061                 for (i = 0; i < num_erase_regions; i++) {
1062                         if (i > NUM_ERASE_REGIONS) {
1063                                 printf ("%d erase regions found, only %d used\n",
1064                                         num_erase_regions, NUM_ERASE_REGIONS);
1065                                 break;
1066                         }
1067                         tmp = flash_read_long (info, 0,
1068                                                FLASH_OFFSET_ERASE_REGIONS +
1069                                                i * 4);
1070                         erase_region_size =
1071                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1072                         tmp >>= 16;
1073                         erase_region_count = (tmp & 0xffff) + 1;
1074                         debug ("erase_region_count = %d erase_region_size = %d\n",
1075                                 erase_region_count, erase_region_size);
1076                         for (j = 0; j < erase_region_count; j++) {
1077                                 info->start[sect_cnt] = sector;
1078                                 sector += (erase_region_size * size_ratio);
1079
1080                                 /*
1081                                  * Only read protection status from supported devices (intel...)
1082                                  */
1083                                 switch (info->vendor) {
1084                                 case CFI_CMDSET_INTEL_EXTENDED:
1085                                 case CFI_CMDSET_INTEL_STANDARD:
1086                                         info->protect[sect_cnt] =
1087                                                 flash_isset (info, sect_cnt,
1088                                                              FLASH_OFFSET_PROTECT,
1089                                                              FLASH_STATUS_PROTECT);
1090                                         break;
1091                                 default:
1092                                         info->protect[sect_cnt] = 0; /* default: not protected */
1093                                 }
1094
1095                                 sect_cnt++;
1096                         }
1097                 }
1098
1099                 info->sector_count = sect_cnt;
1100                 /* multiply the size by the number of chips */
1101                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1102                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1103                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1104                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1105                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1106                 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1107                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1108                 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1109                 info->flash_id = FLASH_MAN_CFI;
1110                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1111                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1112                 }
1113         }
1114
1115         flash_write_cmd (info, 0, 0, info->cmd_reset);
1116         return (info->size);
1117 }
1118
1119
1120 /*-----------------------------------------------------------------------
1121  */
1122 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1123                                 cfiword_t cword)
1124 {
1125
1126         cfiptr_t ctladdr;
1127         cfiptr_t cptr;
1128         int flag;
1129
1130         ctladdr.cp = flash_make_addr (info, 0, 0);
1131         cptr.cp = (uchar *) dest;
1132
1133
1134         /* Check if Flash is (sufficiently) erased */
1135         switch (info->portwidth) {
1136         case FLASH_CFI_8BIT:
1137                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1138                 break;
1139         case FLASH_CFI_16BIT:
1140                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1141                 break;
1142         case FLASH_CFI_32BIT:
1143                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1144                 break;
1145         case FLASH_CFI_64BIT:
1146                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1147                 break;
1148         default:
1149                 return 2;
1150         }
1151         if (!flag)
1152                 return 2;
1153
1154         /* Disable interrupts which might cause a timeout here */
1155         flag = disable_interrupts ();
1156
1157         switch (info->vendor) {
1158         case CFI_CMDSET_INTEL_EXTENDED:
1159         case CFI_CMDSET_INTEL_STANDARD:
1160                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1161                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1162                 break;
1163         case CFI_CMDSET_AMD_EXTENDED:
1164         case CFI_CMDSET_AMD_STANDARD:
1165                 flash_unlock_seq (info, 0);
1166                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1167                 break;
1168         }
1169
1170         switch (info->portwidth) {
1171         case FLASH_CFI_8BIT:
1172                 cptr.cp[0] = cword.c;
1173                 break;
1174         case FLASH_CFI_16BIT:
1175                 cptr.wp[0] = cword.w;
1176                 break;
1177         case FLASH_CFI_32BIT:
1178                 cptr.lp[0] = cword.l;
1179                 break;
1180         case FLASH_CFI_64BIT:
1181                 cptr.llp[0] = cword.ll;
1182                 break;
1183         }
1184
1185         /* re-enable interrupts if necessary */
1186         if (flag)
1187                 enable_interrupts ();
1188
1189         return flash_full_status_check (info, 0, info->write_tout, "write");
1190 }
1191
1192 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1193
1194 /* loop through the sectors from the highest address
1195  * when the passed address is greater or equal to the sector address
1196  * we have a match
1197  */
1198 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1199 {
1200         flash_sect_t sector;
1201
1202         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1203                 if (addr >= info->start[sector])
1204                         break;
1205         }
1206         return sector;
1207 }
1208
1209 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1210                                   int len)
1211 {
1212         flash_sect_t sector;
1213         int cnt;
1214         int retcode;
1215         volatile cfiptr_t src;
1216         volatile cfiptr_t dst;
1217         /* buffered writes in the AMD chip set is not supported yet */
1218         if((info->vendor ==  CFI_CMDSET_AMD_STANDARD) ||
1219                 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1220                 return ERR_INVAL;
1221
1222         src.cp = cp;
1223         dst.cp = (uchar *) dest;
1224         sector = find_sector (info, dest);
1225         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1226         flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1227         if ((retcode =
1228              flash_status_check (info, sector, info->buffer_write_tout,
1229                                  "write to buffer")) == ERR_OK) {
1230                 /* reduce the number of loops by the width of the port  */
1231                 switch (info->portwidth) {
1232                 case FLASH_CFI_8BIT:
1233                         cnt = len;
1234                         break;
1235                 case FLASH_CFI_16BIT:
1236                         cnt = len >> 1;
1237                         break;
1238                 case FLASH_CFI_32BIT:
1239                         cnt = len >> 2;
1240                         break;
1241                 case FLASH_CFI_64BIT:
1242                         cnt = len >> 3;
1243                         break;
1244                 default:
1245                         return ERR_INVAL;
1246                         break;
1247                 }
1248                 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1249                 while (cnt-- > 0) {
1250                         switch (info->portwidth) {
1251                         case FLASH_CFI_8BIT:
1252                                 *dst.cp++ = *src.cp++;
1253                                 break;
1254                         case FLASH_CFI_16BIT:
1255                                 *dst.wp++ = *src.wp++;
1256                                 break;
1257                         case FLASH_CFI_32BIT:
1258                                 *dst.lp++ = *src.lp++;
1259                                 break;
1260                         case FLASH_CFI_64BIT:
1261                                 *dst.llp++ = *src.llp++;
1262                                 break;
1263                         default:
1264                                 return ERR_INVAL;
1265                                 break;
1266                         }
1267                 }
1268                 flash_write_cmd (info, sector, 0,
1269                                  FLASH_CMD_WRITE_BUFFER_CONFIRM);
1270                 retcode =
1271                         flash_full_status_check (info, sector,
1272                                                  info->buffer_write_tout,
1273                                                  "buffer write");
1274         }
1275         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1276         return retcode;
1277 }
1278 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1279 #endif /* CFG_FLASH_CFI */