]> git.kernelconcepts.de Git - karo-tx-uboot.git/blob - drivers/cfi_flash.c
* Patch by Tolunay Orkun, 5 Mar 2004:
[karo-tx-uboot.git] / drivers / cfi_flash.c
1 /*
2  * (C) Copyright 2002-2004
3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4  *
5  * Copyright (C) 2003 Arabella Software Ltd.
6  * Yuli Barcohen <yuli@arabellasw.com>
7  * Modified to work with AMD flashes
8  *
9  * Copyright (C) 2004
10  * Ed Okerson
11  * Modified to work with little-endian systems.
12  *
13  * See file CREDITS for list of people who contributed to this
14  * project.
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License as
18  * published by the Free Software Foundation; either version 2 of
19  * the License, or (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29  * MA 02111-1307 USA
30  *
31  * History
32  * 01/20/2004 - combined variants of original driver.
33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
35  * 01/27/2004 - Little endian support Ed Okerson
36  *
37  * Tested Architectures
38  * Port Width  Chip Width    # of banks    Flash Chip  Board
39  * 32          16            1             28F128J3    seranoa/eagle
40  * 64          16            1             28F128J3    seranoa/falcon
41  *
42  */
43
44 /* The DEBUG define must be before common to enable debugging */
45 /* #define DEBUG        */
46
47 #include <common.h>
48 #include <asm/processor.h>
49 #include <linux/byteorder/swab.h>
50 #ifdef  CFG_FLASH_CFI_DRIVER
51
52 /*
53  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
54  * The width of the port and the width of the chips are determined at initialization.
55  * These widths are used to calculate the address for access CFI data structures.
56  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
57  *
58  * References
59  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
60  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
61  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
62  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
63  *
64  * TODO
65  *
66  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
67  * Table (ALT) to determine if protection is available
68  *
69  * Add support for other command sets Use the PRI and ALT to determine command set
70  * Verify erase and program timeouts.
71  */
72
73 #ifndef CFG_FLASH_BANKS_LIST
74 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
75 #endif
76
77 #define FLASH_CMD_CFI                   0x98
78 #define FLASH_CMD_READ_ID               0x90
79 #define FLASH_CMD_RESET                 0xff
80 #define FLASH_CMD_BLOCK_ERASE           0x20
81 #define FLASH_CMD_ERASE_CONFIRM         0xD0
82 #define FLASH_CMD_WRITE                 0x40
83 #define FLASH_CMD_PROTECT               0x60
84 #define FLASH_CMD_PROTECT_SET           0x01
85 #define FLASH_CMD_PROTECT_CLEAR         0xD0
86 #define FLASH_CMD_CLEAR_STATUS          0x50
87 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
88 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
89
90 #define FLASH_STATUS_DONE               0x80
91 #define FLASH_STATUS_ESS                0x40
92 #define FLASH_STATUS_ECLBS              0x20
93 #define FLASH_STATUS_PSLBS              0x10
94 #define FLASH_STATUS_VPENS              0x08
95 #define FLASH_STATUS_PSS                0x04
96 #define FLASH_STATUS_DPS                0x02
97 #define FLASH_STATUS_R                  0x01
98 #define FLASH_STATUS_PROTECT            0x01
99
100 #define AMD_CMD_RESET                   0xF0
101 #define AMD_CMD_WRITE                   0xA0
102 #define AMD_CMD_ERASE_START             0x80
103 #define AMD_CMD_ERASE_SECTOR            0x30
104
105 #define AMD_STATUS_TOGGLE               0x40
106 #define AMD_STATUS_ERROR                0x20
107
108 #define FLASH_OFFSET_CFI                0x55
109 #define FLASH_OFFSET_CFI_RESP           0x10
110 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
111 #define FLASH_OFFSET_WTOUT              0x1F
112 #define FLASH_OFFSET_WBTOUT             0x20
113 #define FLASH_OFFSET_ETOUT              0x21
114 #define FLASH_OFFSET_CETOUT             0x22
115 #define FLASH_OFFSET_WMAX_TOUT          0x23
116 #define FLASH_OFFSET_WBMAX_TOUT         0x24
117 #define FLASH_OFFSET_EMAX_TOUT          0x25
118 #define FLASH_OFFSET_CEMAX_TOUT         0x26
119 #define FLASH_OFFSET_SIZE               0x27
120 #define FLASH_OFFSET_INTERFACE          0x28
121 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
122 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
123 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
124 #define FLASH_OFFSET_PROTECT            0x02
125 #define FLASH_OFFSET_USER_PROTECTION    0x85
126 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
127
128
129 #define FLASH_MAN_CFI                   0x01000000
130
131 #define CFI_CMDSET_NONE             0
132 #define CFI_CMDSET_INTEL_EXTENDED   1
133 #define CFI_CMDSET_AMD_STANDARD     2
134 #define CFI_CMDSET_INTEL_STANDARD   3
135 #define CFI_CMDSET_AMD_EXTENDED     4
136 #define CFI_CMDSET_MITSU_STANDARD   256
137 #define CFI_CMDSET_MITSU_EXTENDED   257
138 #define CFI_CMDSET_SST              258
139
140
141 typedef union {
142         unsigned char c;
143         unsigned short w;
144         unsigned long l;
145         unsigned long long ll;
146 } cfiword_t;
147
148 typedef union {
149         volatile unsigned char *cp;
150         volatile unsigned short *wp;
151         volatile unsigned long *lp;
152         volatile unsigned long long *llp;
153 } cfiptr_t;
154
155 #define NUM_ERASE_REGIONS 4
156
157 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
158
159 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];   /* info for FLASH chips   */
160
161 /*-----------------------------------------------------------------------
162  * Functions
163  */
164
165 typedef unsigned long flash_sect_t;
166
167 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
168 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
169 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
170 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
171 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
172 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
173 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
174 static int flash_detect_cfi (flash_info_t * info);
175 static ulong flash_get_size (ulong base, int banknum);
176 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
177 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
178                                     ulong tout, char *prompt);
179 #ifdef CFG_FLASH_USE_BUFFER_WRITE
180 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
181 #endif
182
183 /*-----------------------------------------------------------------------
184  * create an address based on the offset and the port width
185  */
186 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
187 {
188         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
189 }
190
191 #ifdef DEBUG
192 /*-----------------------------------------------------------------------
193  * Debug support
194  */
195 void print_longlong (char *str, unsigned long long data)
196 {
197         int i;
198         char *cp;
199
200         cp = (unsigned char *) &data;
201         for (i = 0; i < 8; i++)
202                 sprintf (&str[i * 2], "%2.2x", *cp++);
203 }
204 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
205 {
206         cfiptr_t cptr;
207         int x, y;
208
209         for (x = 0; x < 0x40; x += 16 / info->portwidth) {
210                 cptr.cp =
211                         flash_make_addr (info, sect,
212                                          x + FLASH_OFFSET_CFI_RESP);
213                 debug ("%p : ", cptr.cp);
214                 for (y = 0; y < 16; y++) {
215                         debug ("%2.2x ", cptr.cp[y]);
216                 }
217                 debug (" ");
218                 for (y = 0; y < 16; y++) {
219                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
220                                 debug ("%c", cptr.cp[y]);
221                         } else {
222                                 debug (".");
223                         }
224                 }
225                 debug ("\n");
226         }
227 }
228 #endif
229
230
231 /*-----------------------------------------------------------------------
232  * read a character at a port width address
233  */
234 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
235 {
236         uchar *cp;
237
238         cp = flash_make_addr (info, 0, offset);
239 #if defined(__LITTLE_ENDIAN)
240         return (cp[0]);
241 #else
242         return (cp[info->portwidth - 1]);
243 #endif
244 }
245
246 /*-----------------------------------------------------------------------
247  * read a short word by swapping for ppc format.
248  */
249 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
250 {
251         uchar *addr;
252         ushort retval;
253
254 #ifdef DEBUG
255         int x;
256 #endif
257         addr = flash_make_addr (info, sect, offset);
258
259 #ifdef DEBUG
260         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
261                info->portwidth);
262         for (x = 0; x < 2 * info->portwidth; x++) {
263                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
264         }
265 #endif
266 #if defined(__LITTLE_ENDIAN)
267         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
268 #else
269         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
270                   addr[info->portwidth - 1]);
271 #endif
272
273         debug ("retval = 0x%x\n", retval);
274         return retval;
275 }
276
277 /*-----------------------------------------------------------------------
278  * read a long word by picking the least significant byte of each maiximum
279  * port size word. Swap for ppc format.
280  */
281 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
282 {
283         uchar *addr;
284         ulong retval;
285
286 #ifdef DEBUG
287         int x;
288 #endif
289         addr = flash_make_addr (info, sect, offset);
290
291 #ifdef DEBUG
292         debug ("long addr is at %p info->portwidth = %d\n", addr,
293                info->portwidth);
294         for (x = 0; x < 4 * info->portwidth; x++) {
295                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
296         }
297 #endif
298 #if defined(__LITTLE_ENDIAN)
299         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
300                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
301 #else
302         retval = (addr[(2 * info->portwidth) - 1] << 24) |
303                 (addr[(info->portwidth) - 1] << 16) |
304                 (addr[(4 * info->portwidth) - 1] << 8) |
305                 addr[(3 * info->portwidth) - 1];
306 #endif
307         return retval;
308 }
309
310 /*-----------------------------------------------------------------------
311  */
312 unsigned long flash_init (void)
313 {
314         unsigned long size = 0;
315         int i;
316
317         /* Init: no FLASHes known */
318         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
319                 flash_info[i].flash_id = FLASH_UNKNOWN;
320                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
321                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
322                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
323                                 i, flash_info[i].size, flash_info[i].size << 20);
324                 }
325         }
326
327         /* Monitor protection ON by default */
328 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
329         flash_protect (FLAG_PROTECT_SET,
330                        CFG_MONITOR_BASE,
331                        CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
332                        &flash_info[0]);
333 #endif
334
335         return (size);
336 }
337
338 /*-----------------------------------------------------------------------
339  */
340 int flash_erase (flash_info_t * info, int s_first, int s_last)
341 {
342         int rcode = 0;
343         int prot;
344         flash_sect_t sect;
345
346         if (info->flash_id != FLASH_MAN_CFI) {
347                 printf ("Can't erase unknown flash type - aborted\n");
348                 return 1;
349         }
350         if ((s_first < 0) || (s_first > s_last)) {
351                 printf ("- no sectors to erase\n");
352                 return 1;
353         }
354
355         prot = 0;
356         for (sect = s_first; sect <= s_last; ++sect) {
357                 if (info->protect[sect]) {
358                         prot++;
359                 }
360         }
361         if (prot) {
362                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
363         } else {
364                 printf ("\n");
365         }
366
367
368         for (sect = s_first; sect <= s_last; sect++) {
369                 if (info->protect[sect] == 0) { /* not protected */
370                         switch (info->vendor) {
371                         case CFI_CMDSET_INTEL_STANDARD:
372                         case CFI_CMDSET_INTEL_EXTENDED:
373                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
374                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
375                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
376                                 break;
377                         case CFI_CMDSET_AMD_STANDARD:
378                         case CFI_CMDSET_AMD_EXTENDED:
379                                 flash_unlock_seq (info, sect);
380                                 flash_write_cmd (info, sect, 0x555, AMD_CMD_ERASE_START);
381                                 flash_unlock_seq (info, sect);
382                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
383                                 break;
384                         default:
385                                 debug ("Unkown flash vendor %d\n",
386                                        info->vendor);
387                                 break;
388                         }
389
390                         if (flash_full_status_check
391                             (info, sect, info->erase_blk_tout, "erase")) {
392                                 rcode = 1;
393                         } else
394                                 printf (".");
395                 }
396         }
397         printf (" done\n");
398         return rcode;
399 }
400
401 /*-----------------------------------------------------------------------
402  */
403 void flash_print_info (flash_info_t * info)
404 {
405         int i;
406
407         if (info->flash_id != FLASH_MAN_CFI) {
408                 printf ("missing or unknown FLASH type\n");
409                 return;
410         }
411
412         printf ("CFI conformant FLASH (%d x %d)",
413                 (info->portwidth << 3), (info->chipwidth << 3));
414         printf ("  Size: %ld MB in %d Sectors\n",
415                 info->size >> 20, info->sector_count);
416         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
417                 info->erase_blk_tout,
418                 info->write_tout,
419                 info->buffer_write_tout,
420                 info->buffer_size);
421
422         printf ("  Sector Start Addresses:");
423         for (i = 0; i < info->sector_count; ++i) {
424 #ifdef CFG_FLASH_EMPTY_INFO
425                 int k;
426                 int size;
427                 int erased;
428                 volatile unsigned long *flash;
429
430                 /*
431                  * Check if whole sector is erased
432                  */
433                 if (i != (info->sector_count - 1))
434                         size = info->start[i + 1] - info->start[i];
435                 else
436                         size = info->start[0] + info->size - info->start[i];
437                 erased = 1;
438                 flash = (volatile unsigned long *) info->start[i];
439                 size = size >> 2;       /* divide by 4 for longword access */
440                 for (k = 0; k < size; k++) {
441                         if (*flash++ != 0xffffffff) {
442                                 erased = 0;
443                                 break;
444                         }
445                 }
446
447                 if ((i % 5) == 0)
448                         printf ("\n");
449                 /* print empty and read-only info */
450                 printf (" %08lX%s%s",
451                         info->start[i],
452                         erased ? " E" : "  ",
453                         info->protect[i] ? "RO " : "   ");
454 #else
455                 if ((i % 5) == 0)
456                         printf ("\n   ");
457                 printf (" %08lX%s",
458                         info->start[i], info->protect[i] ? " (RO)" : "     ");
459 #endif
460         }
461         printf ("\n");
462         return;
463 }
464
465 /*-----------------------------------------------------------------------
466  * Copy memory to flash, returns:
467  * 0 - OK
468  * 1 - write timeout
469  * 2 - Flash not erased
470  */
471 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
472 {
473         ulong wp;
474         ulong cp;
475         int aln;
476         cfiword_t cword;
477         int i, rc;
478
479 #ifdef CFG_FLASH_USE_BUFFER_WRITE
480         int buffered_size;
481 #endif
482         int x8mode = 0;
483
484         /* special handling of 16 bit devices in 8 bit mode */
485         if ((info->interface == FLASH_CFI_X8X16)
486             && (info->chipwidth == FLASH_CFI_BY8)) {
487                 switch (info->vendor) {
488                 case CFI_CMDSET_INTEL_STANDARD:
489                 case CFI_CMDSET_INTEL_EXTENDED:
490                         x8mode = info->portwidth;
491                         info->portwidth >>= 1;  /* XXX - Need to test on x9/x16 in parallel. */
492                         /*info->portwidth = FLASH_CFI_8BIT; */ /* XXX - Need to test on x9/x16 in parallel. */
493                         break;
494                 case CFI_CMDSET_AMD_STANDARD:
495                 case CFI_CMDSET_AMD_EXTENDED:
496                 default:
497                         break;
498                 }
499         }
500         /* get lower aligned address */
501         /* get lower aligned address */
502         wp = (addr & ~(info->portwidth - 1));
503
504         /* handle unaligned start */
505         if ((aln = addr - wp) != 0) {
506                 cword.l = 0;
507                 cp = wp;
508                 for (i = 0; i < aln; ++i, ++cp)
509                         flash_add_byte (info, &cword, (*(uchar *) cp));
510
511                 for (; (i < info->portwidth) && (cnt > 0); i++) {
512                         flash_add_byte (info, &cword, *src++);
513                         cnt--;
514                         cp++;
515                 }
516                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
517                         flash_add_byte (info, &cword, (*(uchar *) cp));
518                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
519                         return rc;
520                 wp = cp;
521         }
522
523         /* handle the aligned part */
524 #ifdef CFG_FLASH_USE_BUFFER_WRITE
525         buffered_size = (info->portwidth / info->chipwidth);
526         buffered_size *= info->buffer_size;
527         while (cnt >= info->portwidth) {
528                 i = buffered_size > cnt ? cnt : buffered_size;
529                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
530                         return rc;
531                 wp += i;
532                 src += i;
533                 cnt -= i;
534         }
535 #else
536         while (cnt >= info->portwidth) {
537                 cword.l = 0;
538                 for (i = 0; i < info->portwidth; i++) {
539                         flash_add_byte (info, &cword, *src++);
540                 }
541                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
542                         return rc;
543                 wp += info->portwidth;
544                 cnt -= info->portwidth;
545         }
546 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
547         if (cnt == 0) {
548                 return (0);
549         }
550
551         /*
552          * handle unaligned tail bytes
553          */
554         cword.l = 0;
555         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
556                 flash_add_byte (info, &cword, *src++);
557                 --cnt;
558         }
559         for (; i < info->portwidth; ++i, ++cp) {
560                 flash_add_byte (info, &cword, (*(uchar *) cp));
561         }
562
563         /* special handling of 16 bit devices in 8 bit mode */
564         if (x8mode) {
565                 info->portwidth = x8mode;;
566         }
567         return flash_write_cfiword (info, wp, cword);
568 }
569
570 /*-----------------------------------------------------------------------
571  */
572 #ifdef CFG_FLASH_PROTECTION
573
574 int flash_real_protect (flash_info_t * info, long sector, int prot)
575 {
576         int retcode = 0;
577
578         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
579         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
580         if (prot)
581                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
582         else
583                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
584
585         if ((retcode =
586              flash_full_status_check (info, sector, info->erase_blk_tout,
587                                       prot ? "protect" : "unprotect")) == 0) {
588
589                 info->protect[sector] = prot;
590                 /* Intel's unprotect unprotects all locking */
591                 if (prot == 0) {
592                         flash_sect_t i;
593
594                         for (i = 0; i < info->sector_count; i++) {
595                                 if (info->protect[i])
596                                         flash_real_protect (info, i, 1);
597                         }
598                 }
599         }
600         return retcode;
601 }
602
603 /*-----------------------------------------------------------------------
604  * flash_read_user_serial - read the OneTimeProgramming cells
605  */
606 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
607                              int len)
608 {
609         uchar *src;
610         uchar *dst;
611
612         dst = buffer;
613         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
614         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
615         memcpy (dst, src + offset, len);
616         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
617 }
618
619 /*
620  * flash_read_factory_serial - read the device Id from the protection area
621  */
622 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
623                                 int len)
624 {
625         uchar *src;
626
627         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
628         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
629         memcpy (buffer, src + offset, len);
630         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
631 }
632
633 #endif /* CFG_FLASH_PROTECTION */
634
635 /*
636  * flash_is_busy - check to see if the flash is busy
637  * This routine checks the status of the chip and returns true if the chip is busy
638  */
639 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
640 {
641         int retval;
642
643         switch (info->vendor) {
644         case CFI_CMDSET_INTEL_STANDARD:
645         case CFI_CMDSET_INTEL_EXTENDED:
646                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
647                 break;
648         case CFI_CMDSET_AMD_STANDARD:
649         case CFI_CMDSET_AMD_EXTENDED:
650                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
651                 break;
652         default:
653                 retval = 0;
654         }
655         debug ("flash_is_busy: %d\n", retval);
656         return retval;
657 }
658
659 /*-----------------------------------------------------------------------
660  *  wait for XSR.7 to be set. Time out with an error if it does not.
661  *  This routine does not set the flash to read-array mode.
662  */
663 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
664                                ulong tout, char *prompt)
665 {
666         ulong start;
667
668         /* Wait for command completion */
669         start = get_timer (0);
670         while (flash_is_busy (info, sector)) {
671                 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
672                         printf ("Flash %s timeout at address %lx data %lx\n",
673                                 prompt, info->start[sector],
674                                 flash_read_long (info, sector, 0));
675                         flash_write_cmd (info, sector, 0, info->cmd_reset);
676                         return ERR_TIMOUT;
677                 }
678         }
679         return ERR_OK;
680 }
681
682 /*-----------------------------------------------------------------------
683  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
684  * This routine sets the flash to read-array mode.
685  */
686 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
687                                     ulong tout, char *prompt)
688 {
689         int retcode;
690
691         retcode = flash_status_check (info, sector, tout, prompt);
692         switch (info->vendor) {
693         case CFI_CMDSET_INTEL_EXTENDED:
694         case CFI_CMDSET_INTEL_STANDARD:
695                 if ((retcode != ERR_OK)
696                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
697                         retcode = ERR_INVAL;
698                         printf ("Flash %s error at address %lx\n", prompt,
699                                 info->start[sector]);
700                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
701                                 printf ("Command Sequence Error.\n");
702                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
703                                 printf ("Block Erase Error.\n");
704                                 retcode = ERR_NOT_ERASED;
705                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
706                                 printf ("Locking Error\n");
707                         }
708                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
709                                 printf ("Block locked.\n");
710                                 retcode = ERR_PROTECTED;
711                         }
712                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
713                                 printf ("Vpp Low Error.\n");
714                 }
715                 flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
716                 break;
717         default:
718                 break;
719         }
720         return retcode;
721 }
722
723 /*-----------------------------------------------------------------------
724  */
725 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
726 {
727 #if defined(__LITTLE_ENDIAN)
728         unsigned short  w;
729         unsigned int    l;
730         unsigned long long ll;
731 #endif
732
733         switch (info->portwidth) {
734         case FLASH_CFI_8BIT:
735                 cword->c = c;
736                 break;
737         case FLASH_CFI_16BIT:
738 #if defined(__LITTLE_ENDIAN)
739                 w = c;
740                 w <<= 8;
741                 cword->w = (cword->w >> 8) | w;
742 #else
743                 cword->w = (cword->w << 8) | c;
744 #endif
745                 break;
746         case FLASH_CFI_32BIT:
747 #if defined(__LITTLE_ENDIAN)
748                 l = c;
749                 l <<= 24;
750                 cword->l = (cword->l >> 8) | l;
751 #else
752                 cword->l = (cword->l << 8) | c;
753 #endif
754                 break;
755         case FLASH_CFI_64BIT:
756 #if defined(__LITTLE_ENDIAN)
757                 ll = c;
758                 ll <<= 56;
759                 cword->ll = (cword->ll >> 8) | ll;
760 #else
761                 cword->ll = (cword->ll << 8) | c;
762 #endif
763                 break;
764         }
765 }
766
767
768 /*-----------------------------------------------------------------------
769  * make a proper sized command based on the port and chip widths
770  */
771 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
772 {
773         int i;
774
775 #if defined(__LITTLE_ENDIAN)
776         ushort stmpw;
777         uint   stmpi;
778 #endif
779         uchar *cp = (uchar *) cmdbuf;
780
781         for (i = 0; i < info->portwidth; i++)
782                 *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd;
783 #if defined(__LITTLE_ENDIAN)
784         switch (info->portwidth) {
785         case FLASH_CFI_8BIT:
786                 break;
787         case FLASH_CFI_16BIT:
788                 stmpw = *(ushort *) cmdbuf;
789                 *(ushort *) cmdbuf = __swab16 (stmpw);
790                 break;
791         case FLASH_CFI_32BIT:
792                 stmpi = *(uint *) cmdbuf;
793                 *(uint *) cmdbuf = __swab32 (stmpi);
794                 break;
795         default:
796                 printf("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
797                 break;
798         }
799 #endif
800 }
801
802 /*
803  * Write a proper sized command to the correct address
804  */
805 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
806 {
807
808         volatile cfiptr_t addr;
809         cfiword_t cword;
810
811         addr.cp = flash_make_addr (info, sect, offset);
812         flash_make_cmd (info, cmd, &cword);
813         switch (info->portwidth) {
814         case FLASH_CFI_8BIT:
815                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
816                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
817                 *addr.cp = cword.c;
818                 break;
819         case FLASH_CFI_16BIT:
820                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
821                        cmd, cword.w,
822                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
823                 *addr.wp = cword.w;
824                 break;
825         case FLASH_CFI_32BIT:
826                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
827                        cmd, cword.l,
828                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
829                 *addr.lp = cword.l;
830                 break;
831         case FLASH_CFI_64BIT:
832 #ifdef DEBUG
833                 {
834                         char str[20];
835
836                         print_longlong (str, cword.ll);
837
838                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
839                                addr.llp, cmd, str,
840                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
841                 }
842 #endif
843                 *addr.llp = cword.ll;
844                 break;
845         }
846 }
847
848 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
849 {
850         flash_write_cmd (info, sect, 0x555, 0xAA);
851         flash_write_cmd (info, sect, 0x2AA, 0x55);
852 }
853
854 /*-----------------------------------------------------------------------
855  */
856 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
857 {
858         cfiptr_t cptr;
859         cfiword_t cword;
860         int retval;
861
862         cptr.cp = flash_make_addr (info, sect, offset);
863         flash_make_cmd (info, cmd, &cword);
864
865         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
866         switch (info->portwidth) {
867         case FLASH_CFI_8BIT:
868                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
869                 retval = (cptr.cp[0] == cword.c);
870                 break;
871         case FLASH_CFI_16BIT:
872                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
873                 retval = (cptr.wp[0] == cword.w);
874                 break;
875         case FLASH_CFI_32BIT:
876                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
877                 retval = (cptr.lp[0] == cword.l);
878                 break;
879         case FLASH_CFI_64BIT:
880 #ifdef DEBUG
881                 {
882                         char str1[20];
883                         char str2[20];
884
885                         print_longlong (str1, cptr.llp[0]);
886                         print_longlong (str2, cword.ll);
887                         debug ("is= %s %s\n", str1, str2);
888                 }
889 #endif
890                 retval = (cptr.llp[0] == cword.ll);
891                 break;
892         default:
893                 retval = 0;
894                 break;
895         }
896         return retval;
897 }
898
899 /*-----------------------------------------------------------------------
900  */
901 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
902 {
903         cfiptr_t cptr;
904         cfiword_t cword;
905         int retval;
906
907         cptr.cp = flash_make_addr (info, sect, offset);
908         flash_make_cmd (info, cmd, &cword);
909         switch (info->portwidth) {
910         case FLASH_CFI_8BIT:
911                 retval = ((cptr.cp[0] & cword.c) == cword.c);
912                 break;
913         case FLASH_CFI_16BIT:
914                 retval = ((cptr.wp[0] & cword.w) == cword.w);
915                 break;
916         case FLASH_CFI_32BIT:
917                 retval = ((cptr.lp[0] & cword.l) == cword.l);
918                 break;
919         case FLASH_CFI_64BIT:
920                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
921                 break;
922         default:
923                 retval = 0;
924                 break;
925         }
926         return retval;
927 }
928
929 /*-----------------------------------------------------------------------
930  */
931 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
932 {
933         cfiptr_t cptr;
934         cfiword_t cword;
935         int retval;
936
937         cptr.cp = flash_make_addr (info, sect, offset);
938         flash_make_cmd (info, cmd, &cword);
939         switch (info->portwidth) {
940         case FLASH_CFI_8BIT:
941                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
942                 break;
943         case FLASH_CFI_16BIT:
944                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
945                 break;
946         case FLASH_CFI_32BIT:
947                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
948                 break;
949         case FLASH_CFI_64BIT:
950                 retval = ((cptr.llp[0] & cword.ll) !=
951                           (cptr.llp[0] & cword.ll));
952                 break;
953         default:
954                 retval = 0;
955                 break;
956         }
957         return retval;
958 }
959
960 /*-----------------------------------------------------------------------
961  * detect if flash is compatible with the Common Flash Interface (CFI)
962  * http://www.jedec.org/download/search/jesd68.pdf
963  *
964 */
965 static int flash_detect_cfi (flash_info_t * info)
966 {
967         debug ("flash detect cfi\n");
968
969         for (info->portwidth = FLASH_CFI_8BIT;
970              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
971                 for (info->chipwidth = FLASH_CFI_BY8;
972                      info->chipwidth <= info->portwidth;
973                      info->chipwidth <<= 1) {
974                         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
975                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
976                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
977                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
978                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
979                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
980                                 debug ("device interface is %d\n",
981                                        info->interface);
982                                 debug ("found port %d chip %d ",
983                                        info->portwidth, info->chipwidth);
984                                 debug ("port %d bits chip %d bits\n",
985                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
986                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
987                                 return 1;
988                         }
989                 }
990         }
991         debug ("not found\n");
992         return 0;
993 }
994
995 /*
996  * The following code cannot be run from FLASH!
997  *
998  */
999 static ulong flash_get_size (ulong base, int banknum)
1000 {
1001         flash_info_t *info = &flash_info[banknum];
1002         int i, j;
1003         flash_sect_t sect_cnt;
1004         unsigned long sector;
1005         unsigned long tmp;
1006         int size_ratio;
1007         uchar num_erase_regions;
1008         int erase_region_size;
1009         int erase_region_count;
1010
1011         info->start[0] = base;
1012
1013         if (flash_detect_cfi (info)) {
1014                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1015 #ifdef DEBUG
1016                 flash_printqry (info, 0);
1017 #endif
1018                 switch (info->vendor) {
1019                 case CFI_CMDSET_INTEL_STANDARD:
1020                 case CFI_CMDSET_INTEL_EXTENDED:
1021                 default:
1022                         info->cmd_reset = FLASH_CMD_RESET;
1023                         break;
1024                 case CFI_CMDSET_AMD_STANDARD:
1025                 case CFI_CMDSET_AMD_EXTENDED:
1026                         info->cmd_reset = AMD_CMD_RESET;
1027                         break;
1028                 }
1029
1030                 debug ("manufacturer is %d\n", info->vendor);
1031                 size_ratio = info->portwidth / info->chipwidth;
1032                 /* if the chip is x8/x16 reduce the ratio by half */
1033                 if ((info->interface == FLASH_CFI_X8X16)
1034                     && (info->chipwidth == FLASH_CFI_BY8)) {
1035                         size_ratio >>= 1;
1036                 }
1037                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1038                 debug ("size_ratio %d port %d bits chip %d bits\n",
1039                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1040                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1041                 debug ("found %d erase regions\n", num_erase_regions);
1042                 sect_cnt = 0;
1043                 sector = base;
1044                 for (i = 0; i < num_erase_regions; i++) {
1045                         if (i > NUM_ERASE_REGIONS) {
1046                                 printf ("%d erase regions found, only %d used\n",
1047                                         num_erase_regions, NUM_ERASE_REGIONS);
1048                                 break;
1049                         }
1050                         tmp = flash_read_long (info, 0,
1051                                                FLASH_OFFSET_ERASE_REGIONS +
1052                                                i * 4);
1053                         erase_region_size =
1054                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1055                         tmp >>= 16;
1056                         erase_region_count = (tmp & 0xffff) + 1;
1057                         printf ("erase_region_count = %d erase_region_size = %d\n",
1058                                 erase_region_count, erase_region_size);
1059                         for (j = 0; j < erase_region_count; j++) {
1060                                 info->start[sect_cnt] = sector;
1061                                 sector += (erase_region_size * size_ratio);
1062                                 info->protect[sect_cnt] =
1063                                         flash_isset (info, sect_cnt,
1064                                                      FLASH_OFFSET_PROTECT,
1065                                                      FLASH_STATUS_PROTECT);
1066                                 sect_cnt++;
1067                         }
1068                 }
1069
1070                 info->sector_count = sect_cnt;
1071                 /* multiply the size by the number of chips */
1072                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1073                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1074                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1075                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1076                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1077                 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1078                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1079                 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1080                 info->flash_id = FLASH_MAN_CFI;
1081         }
1082
1083         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1084         return (info->size);
1085 }
1086
1087
1088 /*-----------------------------------------------------------------------
1089  */
1090 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1091                                 cfiword_t cword)
1092 {
1093
1094         cfiptr_t ctladdr;
1095         cfiptr_t cptr;
1096         int flag;
1097
1098         ctladdr.cp = flash_make_addr (info, 0, 0);
1099         cptr.cp = (uchar *) dest;
1100
1101
1102         /* Check if Flash is (sufficiently) erased */
1103         switch (info->portwidth) {
1104         case FLASH_CFI_8BIT:
1105                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1106                 break;
1107         case FLASH_CFI_16BIT:
1108                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1109                 break;
1110         case FLASH_CFI_32BIT:
1111                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1112                 break;
1113         case FLASH_CFI_64BIT:
1114                 flag = ((cptr.lp[0] & cword.ll) == cword.ll);
1115                 break;
1116         default:
1117                 return 2;
1118         }
1119         if (!flag)
1120                 return 2;
1121
1122         /* Disable interrupts which might cause a timeout here */
1123         flag = disable_interrupts ();
1124
1125         switch (info->vendor) {
1126         case CFI_CMDSET_INTEL_EXTENDED:
1127         case CFI_CMDSET_INTEL_STANDARD:
1128                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1129                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1130                 break;
1131         case CFI_CMDSET_AMD_EXTENDED:
1132         case CFI_CMDSET_AMD_STANDARD:
1133                 flash_unlock_seq (info, 0);
1134                 flash_write_cmd (info, 0, 0x555, AMD_CMD_WRITE);
1135                 break;
1136         }
1137
1138         switch (info->portwidth) {
1139         case FLASH_CFI_8BIT:
1140                 cptr.cp[0] = cword.c;
1141                 break;
1142         case FLASH_CFI_16BIT:
1143                 cptr.wp[0] = cword.w;
1144                 break;
1145         case FLASH_CFI_32BIT:
1146                 cptr.lp[0] = cword.l;
1147                 break;
1148         case FLASH_CFI_64BIT:
1149                 cptr.llp[0] = cword.ll;
1150                 break;
1151         }
1152
1153         /* re-enable interrupts if necessary */
1154         if (flag)
1155                 enable_interrupts ();
1156
1157         return flash_full_status_check (info, 0, info->write_tout, "write");
1158 }
1159
1160 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1161
1162 /* loop through the sectors from the highest address
1163  * when the passed address is greater or equal to the sector address
1164  * we have a match
1165  */
1166 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1167 {
1168         flash_sect_t sector;
1169
1170         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1171                 if (addr >= info->start[sector])
1172                         break;
1173         }
1174         return sector;
1175 }
1176
1177 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1178                                   int len)
1179 {
1180         flash_sect_t sector;
1181         int cnt;
1182         int retcode;
1183         volatile cfiptr_t src;
1184         volatile cfiptr_t dst;
1185
1186         src.cp = cp;
1187         dst.cp = (uchar *) dest;
1188         sector = find_sector (info, dest);
1189         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1190         flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1191         if ((retcode =
1192              flash_status_check (info, sector, info->buffer_write_tout,
1193                                  "write to buffer")) == ERR_OK) {
1194                 /* reduce the number of loops by the width of the port  */
1195                 switch (info->portwidth) {
1196                 case FLASH_CFI_8BIT:
1197                         cnt = len;
1198                         break;
1199                 case FLASH_CFI_16BIT:
1200                         cnt = len >> 1;
1201                         break;
1202                 case FLASH_CFI_32BIT:
1203                         cnt = len >> 2;
1204                         break;
1205                 case FLASH_CFI_64BIT:
1206                         cnt = len >> 3;
1207                         break;
1208                 default:
1209                         return ERR_INVAL;
1210                         break;
1211                 }
1212                 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1213                 while (cnt-- > 0) {
1214                         switch (info->portwidth) {
1215                         case FLASH_CFI_8BIT:
1216                                 *dst.cp++ = *src.cp++;
1217                                 break;
1218                         case FLASH_CFI_16BIT:
1219                                 *dst.wp++ = *src.wp++;
1220                                 break;
1221                         case FLASH_CFI_32BIT:
1222                                 *dst.lp++ = *src.lp++;
1223                                 break;
1224                         case FLASH_CFI_64BIT:
1225                                 *dst.llp++ = *src.llp++;
1226                                 break;
1227                         default:
1228                                 return ERR_INVAL;
1229                                 break;
1230                         }
1231                 }
1232                 flash_write_cmd (info, sector, 0,
1233                                  FLASH_CMD_WRITE_BUFFER_CONFIRM);
1234                 retcode =
1235                         flash_full_status_check (info, sector,
1236                                                  info->buffer_write_tout,
1237                                                  "buffer write");
1238         }
1239         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1240         return retcode;
1241 }
1242 #endif /* CFG_USE_FLASH_BUFFER_WRITE */
1243 #endif /* CFG_FLASH_CFI */