2 # I2C subsystem configuration
5 menu "I2C device support"
14 bool "Software emulated I2C bus driver"
18 bool "Enable Driver Model for I2C drivers"
21 Enable driver model for I2C. The I2C uclass interface: probe, read,
22 write and speed, is implemented with the bus drivers operations,
23 which provide methods for bus setting and data transfer. Each chip
24 device (bus child) info is kept as parent platdata. The interface
25 is defined in include/i2c.h. When i2c bus driver supports the i2c
26 uclass, but the device drivers not, then DM_I2C_COMPAT config can
27 be used as compatibility layer.
30 bool "Enable I2C compatibility layer"
33 Enable old-style I2C functions for compatibility with existing code.
34 This option can be enabled as a temporary measure to avoid needing
35 to convert all code for a board in a single commit. It should not
36 be enabled for any board in an official release.
38 config I2C_CROS_EC_TUNNEL
39 tristate "Chrome OS EC tunnel I2C bus"
42 This provides an I2C bus that will tunnel i2c commands through to
43 the other side of the Chrome OS EC to the I2C bus connected there.
44 This will work whatever the interface used to talk to the EC (SPI,
45 I2C or LPC). Some Chromebooks use this when the hardware design
46 does not allow direct access to the main PMIC from the AP.
48 config I2C_CROS_EC_LDO
49 bool "Provide access to LDOs on the Chrome OS EC"
52 On many Chromebooks the main PMIC is inaccessible to the AP. This is
53 often dealt with by using an I2C pass-through interface provided by
54 the EC. On some unfortunate models (e.g. Spring) the pass-through
55 is not available, and an LDO message is available instead. This
56 option enables a driver which provides very basic access to those
57 regulators, via the EC. We implement this as an I2C bus which
58 emulates just the TPS65090 messages we know about. This is done to
59 avoid duplicating the logic in the TPS65090 regulator driver for
60 enabling/disabling an LDO.
63 bool "Enable Driver Model for software emulated I2C bus driver"
64 depends on DM_I2C && DM_GPIO
66 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
67 configuration is given by the device tree. Kernel-style device tree
68 bindings are supported.
69 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
72 bool "Freescale i.MX I2C controller"
74 select I2C_QUIRK_REG if FSL_LSCH3 || SOC_LS102XA
79 config SYS_I2C_SANDBOX
80 bool "Sandbox I2C driver"
81 depends on SANDBOX && DM_I2C
83 Enable I2C support for sandbox. This is an emulation of a real I2C
84 bus. Devices can be attached to the bus using the device tree
85 which specifies the driver to use. As an example, see this device
86 tree fragment from sandbox.dts. It shows that the I2C bus has a
87 single EEPROM at address 0x2c (7-bit address) which is emulated by
88 the driver for "sandbox,i2c-eeprom", which is in
89 drivers/misc/i2c_eeprom_emul.c.
95 compatible = "sandbox,i2c";
96 clock-frequency = <400000>;
99 compatible = "i2c-eeprom";
101 compatible = "sandbox,i2c-eeprom";
102 sandbox,filename = "i2c.bin";
103 sandbox,size = <128>;
109 config SYS_I2C_UNIPHIER
110 bool "UniPhier I2C driver"
111 depends on ARCH_UNIPHIER && DM_I2C
114 Support for UniPhier I2C controller driver. This I2C controller
115 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
117 config SYS_I2C_UNIPHIER_F
118 bool "UniPhier FIFO-builtin I2C driver"
119 depends on ARCH_UNIPHIER && DM_I2C
122 Support for UniPhier FIFO-builtin I2C controller driver.
123 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
125 source "drivers/i2c/muxes/Kconfig"