drivers/i2c/designware_i2c.c

   1 /*
   2  * (C) Copyright 2009
   3  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/hardware.h>
  11 #include "designware_i2c.h"
  12
  13 #ifdef CONFIG_I2C_MULTI_BUS
  14 static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX];
  15 static unsigned int current_bus = 0;
  16 #endif
  17
  18 static struct i2c_regs *i2c_regs_p =
  19     (struct i2c_regs *)CONFIG_SYS_I2C_BASE;
  20
  21 /*
  22  * set_speed - Set the i2c speed mode (standard, high, fast)
  23  * @i2c_spd:    required i2c speed mode
  24  *
  25  * Set the i2c speed mode (standard, high, fast)
  26  */
  27 static void set_speed(int i2c_spd)
  28 {
  29         unsigned int cntl;
  30         unsigned int hcnt, lcnt;
  31         unsigned int enbl;
  32
  33         /* to set speed cltr must be disabled */
  34         enbl = readl(&i2c_regs_p->ic_enable);
  35         enbl &= ~IC_ENABLE_0B;
  36         writel(enbl, &i2c_regs_p->ic_enable);
  37
  38         cntl = (readl(&i2c_regs_p->ic_con) & (~IC_CON_SPD_MSK));
  39
  40         switch (i2c_spd) {
  41         case IC_SPEED_MODE_MAX:
  42                 cntl |= IC_CON_SPD_HS;
  43                 hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
  44                 writel(hcnt, &i2c_regs_p->ic_hs_scl_hcnt);
  45                 lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
  46                 writel(lcnt, &i2c_regs_p->ic_hs_scl_lcnt);
  47                 break;
  48
  49         case IC_SPEED_MODE_STANDARD:
  50                 cntl |= IC_CON_SPD_SS;
  51                 hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
  52                 writel(hcnt, &i2c_regs_p->ic_ss_scl_hcnt);
  53                 lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
  54                 writel(lcnt, &i2c_regs_p->ic_ss_scl_lcnt);
  55                 break;
  56
  57         case IC_SPEED_MODE_FAST:
  58         default:
  59                 cntl |= IC_CON_SPD_FS;
  60                 hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
  61                 writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt);
  62                 lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
  63                 writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt);
  64                 break;
  65         }
  66
  67         writel(cntl, &i2c_regs_p->ic_con);
  68
  69         /* Enable back i2c now speed set */
  70         enbl |= IC_ENABLE_0B;
  71         writel(enbl, &i2c_regs_p->ic_enable);
  72 }
  73
  74 /*
  75  * i2c_set_bus_speed - Set the i2c speed
  76  * @speed:      required i2c speed
  77  *
  78  * Set the i2c speed.
  79  */
  80 int i2c_set_bus_speed(int speed)
  81 {
  82         if (speed >= I2C_MAX_SPEED)
  83                 set_speed(IC_SPEED_MODE_MAX);
  84         else if (speed >= I2C_FAST_SPEED)
  85                 set_speed(IC_SPEED_MODE_FAST);
  86         else
  87                 set_speed(IC_SPEED_MODE_STANDARD);
  88
  89         return 0;
  90 }
  91
  92 /*
  93  * i2c_get_bus_speed - Gets the i2c speed
  94  *
  95  * Gets the i2c speed.
  96  */
  97 int i2c_get_bus_speed(void)
  98 {
  99         u32 cntl;
 100
 101         cntl = (readl(&i2c_regs_p->ic_con) & IC_CON_SPD_MSK);
 102
 103         if (cntl == IC_CON_SPD_HS)
 104                 return I2C_MAX_SPEED;
 105         else if (cntl == IC_CON_SPD_FS)
 106                 return I2C_FAST_SPEED;
 107         else if (cntl == IC_CON_SPD_SS)
 108                 return I2C_STANDARD_SPEED;
 109
 110         return 0;
 111 }
 112
 113 /*
 114  * i2c_init - Init function
 115  * @speed:      required i2c speed
 116  * @slaveadd:   slave address for the device
 117  *
 118  * Initialization function.
 119  */
 120 void i2c_init(int speed, int slaveadd)
 121 {
 122         unsigned int enbl;
 123
 124         /* Disable i2c */
 125         enbl = readl(&i2c_regs_p->ic_enable);
 126         enbl &= ~IC_ENABLE_0B;
 127         writel(enbl, &i2c_regs_p->ic_enable);
 128
 129         writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_regs_p->ic_con);
 130         writel(IC_RX_TL, &i2c_regs_p->ic_rx_tl);
 131         writel(IC_TX_TL, &i2c_regs_p->ic_tx_tl);
 132         i2c_set_bus_speed(speed);
 133         writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask);
 134         writel(slaveadd, &i2c_regs_p->ic_sar);
 135
 136         /* Enable i2c */
 137         enbl = readl(&i2c_regs_p->ic_enable);
 138         enbl |= IC_ENABLE_0B;
 139         writel(enbl, &i2c_regs_p->ic_enable);
 140
 141 #ifdef CONFIG_I2C_MULTI_BUS
 142         bus_initialized[current_bus] = 1;
 143 #endif
 144 }
 145
 146 /*
 147  * i2c_setaddress - Sets the target slave address
 148  * @i2c_addr:   target i2c address
 149  *
 150  * Sets the target slave address.
 151  */
 152 static void i2c_setaddress(unsigned int i2c_addr)
 153 {
 154         unsigned int enbl;
 155
 156         /* Disable i2c */
 157         enbl = readl(&i2c_regs_p->ic_enable);
 158         enbl &= ~IC_ENABLE_0B;
 159         writel(enbl, &i2c_regs_p->ic_enable);
 160
 161         writel(i2c_addr, &i2c_regs_p->ic_tar);
 162
 163         /* Enable i2c */
 164         enbl = readl(&i2c_regs_p->ic_enable);
 165         enbl |= IC_ENABLE_0B;
 166         writel(enbl, &i2c_regs_p->ic_enable);
 167 }
 168
 169 /*
 170  * i2c_flush_rxfifo - Flushes the i2c RX FIFO
 171  *
 172  * Flushes the i2c RX FIFO
 173  */
 174 static void i2c_flush_rxfifo(void)
 175 {
 176         while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE)
 177                 readl(&i2c_regs_p->ic_cmd_data);
 178 }
 179
 180 /*
 181  * i2c_wait_for_bb - Waits for bus busy
 182  *
 183  * Waits for bus busy
 184  */
 185 static int i2c_wait_for_bb(void)
 186 {
 187         unsigned long start_time_bb = get_timer(0);
 188
 189         while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) ||
 190                !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) {
 191
 192                 /* Evaluate timeout */
 193                 if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB))
 194                         return 1;
 195         }
 196
 197         return 0;
 198 }
 199
 200 /* check parameters for i2c_read and i2c_write */
 201 static int check_params(uint addr, int alen, uchar *buffer, int len)
 202 {
 203         if (buffer == NULL) {
 204                 printf("Buffer is invalid\n");
 205                 return 1;
 206         }
 207
 208         if (alen > 1) {
 209                 printf("addr len %d not supported\n", alen);
 210                 return 1;
 211         }
 212
 213         if (addr + len > 256) {
 214                 printf("address out of range\n");
 215                 return 1;
 216         }
 217
 218         return 0;
 219 }
 220
 221 static int i2c_xfer_init(uchar chip, uint addr)
 222 {
 223         if (i2c_wait_for_bb())
 224                 return 1;
 225
 226         i2c_setaddress(chip);
 227         writel(addr, &i2c_regs_p->ic_cmd_data);
 228
 229         return 0;
 230 }
 231
 232 static int i2c_xfer_finish(void)
 233 {
 234         ulong start_stop_det = get_timer(0);
 235
 236         while (1) {
 237                 if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) {
 238                         readl(&i2c_regs_p->ic_clr_stop_det);
 239                         break;
 240                 } else if (get_timer(start_stop_det) > I2C_STOPDET_TO) {
 241                         break;
 242                 }
 243         }
 244
 245         if (i2c_wait_for_bb()) {
 246                 printf("Timed out waiting for bus\n");
 247                 return 1;
 248         }
 249
 250         i2c_flush_rxfifo();
 251
 252         return 0;
 253 }
 254
 255 /*
 256  * i2c_read - Read from i2c memory
 257  * @chip:       target i2c address
 258  * @addr:       address to read from
 259  * @alen:
 260  * @buffer:     buffer for read data
 261  * @len:        no of bytes to be read
 262  *
 263  * Read from i2c memory.
 264  */
 265 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 266 {
 267         unsigned long start_time_rx;
 268
 269 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
 270         /*
 271          * EEPROM chips that implement "address overflow" are ones
 272          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
 273          * address and the extra bits end up in the "chip address"
 274          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
 275          * four 256 byte chips.
 276          *
 277          * Note that we consider the length of the address field to
 278          * still be one byte because the extra address bits are
 279          * hidden in the chip address.
 280          */
 281         chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
 282         addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
 283
 284         debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip,
 285               addr);
 286 #endif
 287
 288         if (check_params(addr, alen, buffer, len))
 289                 return 1;
 290
 291         if (i2c_xfer_init(chip, addr))
 292                 return 1;
 293
 294         start_time_rx = get_timer(0);
 295         while (len) {
 296                 if (len == 1)
 297                         writel(IC_CMD | IC_STOP, &i2c_regs_p->ic_cmd_data);
 298                 else
 299                         writel(IC_CMD, &i2c_regs_p->ic_cmd_data);
 300
 301                 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) {
 302                         *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data);
 303                         len--;
 304                         start_time_rx = get_timer(0);
 305
 306                 } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
 307                                 return 1;
 308                 }
 309         }
 310
 311         return i2c_xfer_finish();
 312 }
 313
 314 /*
 315  * i2c_write - Write to i2c memory
 316  * @chip:       target i2c address
 317  * @addr:       address to read from
 318  * @alen:
 319  * @buffer:     buffer for read data
 320  * @len:        no of bytes to be read
 321  *
 322  * Write to i2c memory.
 323  */
 324 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 325 {
 326         int nb = len;
 327         unsigned long start_time_tx;
 328
 329 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
 330         /*
 331          * EEPROM chips that implement "address overflow" are ones
 332          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
 333          * address and the extra bits end up in the "chip address"
 334          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
 335          * four 256 byte chips.
 336          *
 337          * Note that we consider the length of the address field to
 338          * still be one byte because the extra address bits are
 339          * hidden in the chip address.
 340          */
 341         chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
 342         addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
 343
 344         debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip,
 345               addr);
 346 #endif
 347
 348         if (check_params(addr, alen, buffer, len))
 349                 return 1;
 350
 351         if (i2c_xfer_init(chip, addr))
 352                 return 1;
 353
 354         start_time_tx = get_timer(0);
 355         while (len) {
 356                 if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) {
 357                         if (--len == 0)
 358                                 writel(*buffer | IC_STOP, &i2c_regs_p->ic_cmd_data);
 359                         else
 360                                 writel(*buffer, &i2c_regs_p->ic_cmd_data);
 361                         buffer++;
 362                         start_time_tx = get_timer(0);
 363
 364                 } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
 365                                 printf("Timed out. i2c write Failed\n");
 366                                 return 1;
 367                 }
 368         }
 369
 370         return i2c_xfer_finish();
 371 }
 372
 373 /*
 374  * i2c_probe - Probe the i2c chip
 375  */
 376 int i2c_probe(uchar chip)
 377 {
 378         u32 tmp;
 379         int ret;
 380
 381         /*
 382          * Try to read the first location of the chip.
 383          */
 384         ret = i2c_read(chip, 0, 1, (uchar *)&tmp, 1);
 385         if (ret)
 386                 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 387
 388         return ret;
 389 }
 390
 391 #ifdef CONFIG_I2C_MULTI_BUS
 392 int i2c_set_bus_num(unsigned int bus)
 393 {
 394         switch (bus) {
 395         case 0:
 396                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE;
 397                 break;
 398 #ifdef CONFIG_SYS_I2C_BASE1
 399         case 1:
 400                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1;
 401                 break;
 402 #endif
 403 #ifdef CONFIG_SYS_I2C_BASE2
 404         case 2:
 405                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2;
 406                 break;
 407 #endif
 408 #ifdef CONFIG_SYS_I2C_BASE3
 409         case 3:
 410                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3;
 411                 break;
 412 #endif
 413 #ifdef CONFIG_SYS_I2C_BASE4
 414         case 4:
 415                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4;
 416                 break;
 417 #endif
 418 #ifdef CONFIG_SYS_I2C_BASE5
 419         case 5:
 420                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5;
 421                 break;
 422 #endif
 423 #ifdef CONFIG_SYS_I2C_BASE6
 424         case 6:
 425                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6;
 426                 break;
 427 #endif
 428 #ifdef CONFIG_SYS_I2C_BASE7
 429         case 7:
 430                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7;
 431                 break;
 432 #endif
 433 #ifdef CONFIG_SYS_I2C_BASE8
 434         case 8:
 435                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8;
 436                 break;
 437 #endif
 438 #ifdef CONFIG_SYS_I2C_BASE9
 439         case 9:
 440                 i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9;
 441                 break;
 442 #endif
 443         default:
 444                 printf("Bad bus: %d\n", bus);
 445                 return -1;
 446         }
 447
 448         current_bus = bus;
 449
 450         if (!bus_initialized[current_bus])
 451                 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 452
 453         return 0;
 454 }
 455
 456 int i2c_get_bus_num(void)
 457 {
 458         return current_bus;
 459 }
 460 #endif