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mmc: dw_mmc: Stop bounce buffer even in case of failure
[karo-tx-uboot.git] / drivers / mmc / dw_mmc.c
1 /*
2  * (C) Copyright 2012 SAMSUNG Electronics
3  * Jaehoon Chung <jh80.chung@samsung.com>
4  * Rajeshawari Shinde <rajeshwari.s@samsung.com>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #include <bouncebuf.h>
10 #include <common.h>
11 #include <malloc.h>
12 #include <mmc.h>
13 #include <dwmmc.h>
14 #include <asm-generic/errno.h>
15
16 #define PAGE_SIZE 4096
17
18 static int dwmci_wait_reset(struct dwmci_host *host, u32 value)
19 {
20         unsigned long timeout = 1000;
21         u32 ctrl;
22
23         dwmci_writel(host, DWMCI_CTRL, value);
24
25         while (timeout--) {
26                 ctrl = dwmci_readl(host, DWMCI_CTRL);
27                 if (!(ctrl & DWMCI_RESET_ALL))
28                         return 1;
29         }
30         return 0;
31 }
32
33 static void dwmci_set_idma_desc(struct dwmci_idmac *idmac,
34                 u32 desc0, u32 desc1, u32 desc2)
35 {
36         struct dwmci_idmac *desc = idmac;
37
38         desc->flags = desc0;
39         desc->cnt = desc1;
40         desc->addr = desc2;
41         desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
42 }
43
44 static void dwmci_prepare_data(struct dwmci_host *host,
45                                struct mmc_data *data,
46                                struct dwmci_idmac *cur_idmac,
47                                void *bounce_buffer)
48 {
49         unsigned long ctrl;
50         unsigned int i = 0, flags, cnt, blk_cnt;
51         ulong data_start, data_end;
52
53
54         blk_cnt = data->blocks;
55
56         dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
57
58         data_start = (ulong)cur_idmac;
59         dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
60
61         do {
62                 flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ;
63                 flags |= (i == 0) ? DWMCI_IDMAC_FS : 0;
64                 if (blk_cnt <= 8) {
65                         flags |= DWMCI_IDMAC_LD;
66                         cnt = data->blocksize * blk_cnt;
67                 } else
68                         cnt = data->blocksize * 8;
69
70                 dwmci_set_idma_desc(cur_idmac, flags, cnt,
71                                     (u32)bounce_buffer + (i * PAGE_SIZE));
72
73                 if (blk_cnt <= 8)
74                         break;
75                 blk_cnt -= 8;
76                 cur_idmac++;
77                 i++;
78         } while(1);
79
80         data_end = (ulong)cur_idmac;
81         flush_dcache_range(data_start, data_end + ARCH_DMA_MINALIGN);
82
83         ctrl = dwmci_readl(host, DWMCI_CTRL);
84         ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN;
85         dwmci_writel(host, DWMCI_CTRL, ctrl);
86
87         ctrl = dwmci_readl(host, DWMCI_BMOD);
88         ctrl |= DWMCI_BMOD_IDMAC_FB | DWMCI_BMOD_IDMAC_EN;
89         dwmci_writel(host, DWMCI_BMOD, ctrl);
90
91         dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
92         dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks);
93 }
94
95 static int dwmci_set_transfer_mode(struct dwmci_host *host,
96                 struct mmc_data *data)
97 {
98         unsigned long mode;
99
100         mode = DWMCI_CMD_DATA_EXP;
101         if (data->flags & MMC_DATA_WRITE)
102                 mode |= DWMCI_CMD_RW;
103
104         return mode;
105 }
106
107 static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
108                 struct mmc_data *data)
109 {
110         struct dwmci_host *host = mmc->priv;
111         ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac,
112                                  data ? DIV_ROUND_UP(data->blocks, 8) : 0);
113         int flags = 0, i;
114         unsigned int timeout = 100000;
115         u32 retry = 10000;
116         u32 mask, ctrl;
117         ulong start = get_timer(0);
118         struct bounce_buffer bbstate;
119
120         while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
121                 if (get_timer(start) > timeout) {
122                         printf("%s: Timeout on data busy\n", __func__);
123                         return TIMEOUT;
124                 }
125         }
126
127         dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
128
129         if (data) {
130                 if (data->flags == MMC_DATA_READ) {
131                         bounce_buffer_start(&bbstate, (void*)data->dest,
132                                             data->blocksize *
133                                             data->blocks, GEN_BB_WRITE);
134                 } else {
135                         bounce_buffer_start(&bbstate, (void*)data->src,
136                                             data->blocksize *
137                                             data->blocks, GEN_BB_READ);
138                 }
139                 dwmci_prepare_data(host, data, cur_idmac,
140                                    bbstate.bounce_buffer);
141         }
142
143         dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
144
145         if (data)
146                 flags = dwmci_set_transfer_mode(host, data);
147
148         if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
149                 return -1;
150
151         if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
152                 flags |= DWMCI_CMD_ABORT_STOP;
153         else
154                 flags |= DWMCI_CMD_PRV_DAT_WAIT;
155
156         if (cmd->resp_type & MMC_RSP_PRESENT) {
157                 flags |= DWMCI_CMD_RESP_EXP;
158                 if (cmd->resp_type & MMC_RSP_136)
159                         flags |= DWMCI_CMD_RESP_LENGTH;
160         }
161
162         if (cmd->resp_type & MMC_RSP_CRC)
163                 flags |= DWMCI_CMD_CHECK_CRC;
164
165         flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG);
166
167         debug("Sending CMD%d\n",cmd->cmdidx);
168
169         dwmci_writel(host, DWMCI_CMD, flags);
170
171         for (i = 0; i < retry; i++) {
172                 mask = dwmci_readl(host, DWMCI_RINTSTS);
173                 if (mask & DWMCI_INTMSK_CDONE) {
174                         if (!data)
175                                 dwmci_writel(host, DWMCI_RINTSTS, mask);
176                         break;
177                 }
178         }
179
180         if (i == retry) {
181                 printf("%s: Timeout.\n", __func__);
182                 return TIMEOUT;
183         }
184
185         if (mask & DWMCI_INTMSK_RTO) {
186                 /*
187                  * Timeout here is not necessarily fatal. (e)MMC cards
188                  * will splat here when they receive CMD55 as they do
189                  * not support this command and that is exactly the way
190                  * to tell them apart from SD cards. Thus, this output
191                  * below shall be debug(). eMMC cards also do not favor
192                  * CMD8, please keep that in mind.
193                  */
194                 debug("%s: Response Timeout.\n", __func__);
195                 return TIMEOUT;
196         } else if (mask & DWMCI_INTMSK_RE) {
197                 printf("%s: Response Error.\n", __func__);
198                 return -1;
199         }
200
201
202         if (cmd->resp_type & MMC_RSP_PRESENT) {
203                 if (cmd->resp_type & MMC_RSP_136) {
204                         cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
205                         cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
206                         cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
207                         cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
208                 } else {
209                         cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
210                 }
211         }
212
213         if (data) {
214                 do {
215                         mask = dwmci_readl(host, DWMCI_RINTSTS);
216                         if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
217                                 printf("%s: DATA ERROR!\n", __func__);
218                                 bounce_buffer_stop(&bbstate);
219                                 return -1;
220                         }
221                 } while (!(mask & DWMCI_INTMSK_DTO));
222
223                 dwmci_writel(host, DWMCI_RINTSTS, mask);
224
225                 ctrl = dwmci_readl(host, DWMCI_CTRL);
226                 ctrl &= ~(DWMCI_DMA_EN);
227                 dwmci_writel(host, DWMCI_CTRL, ctrl);
228
229                 bounce_buffer_stop(&bbstate);
230         }
231
232         udelay(100);
233
234         return 0;
235 }
236
237 static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
238 {
239         u32 div, status;
240         int timeout = 10000;
241         unsigned long sclk;
242
243         if ((freq == host->clock) || (freq == 0))
244                 return 0;
245         /*
246          * If host->get_mmc_clk isn't defined,
247          * then assume that host->bus_hz is source clock value.
248          * host->bus_hz should be set by user.
249          */
250         if (host->get_mmc_clk)
251                 sclk = host->get_mmc_clk(host);
252         else if (host->bus_hz)
253                 sclk = host->bus_hz;
254         else {
255                 printf("%s: Didn't get source clock value.\n", __func__);
256                 return -EINVAL;
257         }
258
259         if (sclk == freq)
260                 div = 0;        /* bypass mode */
261         else
262                 div = DIV_ROUND_UP(sclk, 2 * freq);
263
264         dwmci_writel(host, DWMCI_CLKENA, 0);
265         dwmci_writel(host, DWMCI_CLKSRC, 0);
266
267         dwmci_writel(host, DWMCI_CLKDIV, div);
268         dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
269                         DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
270
271         do {
272                 status = dwmci_readl(host, DWMCI_CMD);
273                 if (timeout-- < 0) {
274                         printf("%s: Timeout!\n", __func__);
275                         return -ETIMEDOUT;
276                 }
277         } while (status & DWMCI_CMD_START);
278
279         dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE |
280                         DWMCI_CLKEN_LOW_PWR);
281
282         dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
283                         DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
284
285         timeout = 10000;
286         do {
287                 status = dwmci_readl(host, DWMCI_CMD);
288                 if (timeout-- < 0) {
289                         printf("%s: Timeout!\n", __func__);
290                         return -ETIMEDOUT;
291                 }
292         } while (status & DWMCI_CMD_START);
293
294         host->clock = freq;
295
296         return 0;
297 }
298
299 static void dwmci_set_ios(struct mmc *mmc)
300 {
301         struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
302         u32 ctype, regs;
303
304         debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock);
305
306         dwmci_setup_bus(host, mmc->clock);
307         switch (mmc->bus_width) {
308         case 8:
309                 ctype = DWMCI_CTYPE_8BIT;
310                 break;
311         case 4:
312                 ctype = DWMCI_CTYPE_4BIT;
313                 break;
314         default:
315                 ctype = DWMCI_CTYPE_1BIT;
316                 break;
317         }
318
319         dwmci_writel(host, DWMCI_CTYPE, ctype);
320
321         regs = dwmci_readl(host, DWMCI_UHS_REG);
322         if (mmc->ddr_mode)
323                 regs |= DWMCI_DDR_MODE;
324         else
325                 regs &= ~DWMCI_DDR_MODE;
326
327         dwmci_writel(host, DWMCI_UHS_REG, regs);
328
329         if (host->clksel)
330                 host->clksel(host);
331 }
332
333 static int dwmci_init(struct mmc *mmc)
334 {
335         struct dwmci_host *host = mmc->priv;
336
337         if (host->board_init)
338                 host->board_init(host);
339
340         dwmci_writel(host, DWMCI_PWREN, 1);
341
342         if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
343                 printf("%s[%d] Fail-reset!!\n", __func__, __LINE__);
344                 return -1;
345         }
346
347         /* Enumerate at 400KHz */
348         dwmci_setup_bus(host, mmc->cfg->f_min);
349
350         dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
351         dwmci_writel(host, DWMCI_INTMASK, 0);
352
353         dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF);
354
355         dwmci_writel(host, DWMCI_IDINTEN, 0);
356         dwmci_writel(host, DWMCI_BMOD, 1);
357
358         if (host->fifoth_val) {
359                 dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
360         }
361
362         dwmci_writel(host, DWMCI_CLKENA, 0);
363         dwmci_writel(host, DWMCI_CLKSRC, 0);
364
365         return 0;
366 }
367
368 static const struct mmc_ops dwmci_ops = {
369         .send_cmd       = dwmci_send_cmd,
370         .set_ios        = dwmci_set_ios,
371         .init           = dwmci_init,
372 };
373
374 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk)
375 {
376         host->cfg.name = host->name;
377         host->cfg.ops = &dwmci_ops;
378         host->cfg.f_min = min_clk;
379         host->cfg.f_max = max_clk;
380
381         host->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
382
383         host->cfg.host_caps = host->caps;
384
385         if (host->buswidth == 8) {
386                 host->cfg.host_caps |= MMC_MODE_8BIT;
387                 host->cfg.host_caps &= ~MMC_MODE_4BIT;
388         } else {
389                 host->cfg.host_caps |= MMC_MODE_4BIT;
390                 host->cfg.host_caps &= ~MMC_MODE_8BIT;
391         }
392         host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
393
394         host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
395
396         host->mmc = mmc_create(&host->cfg, host);
397         if (host->mmc == NULL)
398                 return -1;
399
400         return 0;
401 }