drivers/usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * See file CREDITS for list of people who contributed to this
  21  * project.
  22  *
  23  * This program is free software; you can redistribute it and/or
  24  * modify it under the terms of the GNU General Public License as
  25  * published by the Free Software Foundation; either version 2 of
  26  * the License, or (at your option) any later version.
  27  *
  28  * This program is distributed in the hope that it will be useful,
  29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31  * GNU General Public License for more details.
  32  *
  33  * You should have received a copy of the GNU General Public License
  34  * along with this program; if not, write to the Free Software
  35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36  * MA 02111-1307 USA
  37  *
  38  */
  39 /*
  40  * IMPORTANT NOTES
  41  * 1 - Read doc/README.generic_usb_ohci
  42  * 2 - this driver is intended for use with USB Mass Storage Devices
  43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45  *     to activate workaround for bug #41 or this driver will NOT work!
  46  */
  47
  48 #include <common.h>
  49
  50 #ifdef CONFIG_USB_OHCI_NEW
  51
  52 #include <asm/byteorder.h>
  53
  54 #if defined(CONFIG_PCI_OHCI)
  55 # include <pci.h>
  56 #endif
  57
  58 #include <malloc.h>
  59 #include <usb.h>
  60 #include "usb_ohci.h"
  61
  62 #if defined(CONFIG_ARM920T) || \
  63     defined(CONFIG_S3C2400) || \
  64     defined(CONFIG_S3C2410) || \
  65     defined(CONFIG_440EP) || \
  66     defined(CONFIG_PCI_OHCI) || \
  67     defined(CONFIG_MPC5200)
  68 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  69 #endif
  70
  71 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  72 #undef DEBUG
  73 #undef SHOW_INFO
  74 #undef OHCI_FILL_TRACE
  75
  76 /* For initializing controller (mask in an HCFS mode too) */
  77 #define OHCI_CONTROL_INIT \
  78         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  79
  80 /*
  81  * e.g. PCI controllers need this
  82  */
  83 #ifdef CFG_OHCI_SWAP_REG_ACCESS
  84 # define readl(a) __swap_32(*((vu_long *)(a)))
  85 # define writel(a, b) (*((vu_long *)(b)) = __swap_32((vu_long)a))
  86 #else
  87 # define readl(a) (*((vu_long *)(a)))
  88 # define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
  89 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
  90
  91 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  92
  93 #ifdef CONFIG_PCI_OHCI
  94 static struct pci_device_id ohci_pci_ids[] = {
  95         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  96         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
  97         /* Please add supported PCI OHCI controller ids here */
  98         {0, 0}
  99 };
 100 #endif
 101
 102 #ifdef DEBUG
 103 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
 104 #else
 105 #define dbg(format, arg...) do {} while(0)
 106 #endif /* DEBUG */
 107 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
 108 #undef SHOW_INFO
 109 #ifdef SHOW_INFO
 110 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
 111 #else
 112 #define info(format, arg...) do {} while(0)
 113 #endif
 114
 115 #ifdef CFG_OHCI_BE_CONTROLLER
 116 # define m16_swap(x) cpu_to_be16(x)
 117 # define m32_swap(x) cpu_to_be32(x)
 118 #else
 119 # define m16_swap(x) cpu_to_le16(x)
 120 # define m32_swap(x) cpu_to_le32(x)
 121 #endif /* CFG_OHCI_BE_CONTROLLER */
 122
 123 /* global ohci_t */
 124 static ohci_t gohci;
 125 /* this must be aligned to a 256 byte boundary */
 126 struct ohci_hcca ghcca[1];
 127 /* a pointer to the aligned storage */
 128 struct ohci_hcca *phcca;
 129 /* this allocates EDs for all possible endpoints */
 130 struct ohci_device ohci_dev;
 131 /* RHSC flag */
 132 int got_rhsc;
 133 /* device which was disconnected */
 134 struct usb_device *devgone;
 135
 136
 137
 138 /*-------------------------------------------------------------------------*/
 139
 140 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
 141  * The erratum (#4) description is incorrect.  AMD's workaround waits
 142  * till some bits (mostly reserved) are clear; ok for all revs.
 143  */
 144 #define OHCI_QUIRK_AMD756 0xabcd
 145 #define read_roothub(hc, register, mask) ({ \
 146         u32 temp = readl (&hc->regs->roothub.register); \
 147         if (hc->flags & OHCI_QUIRK_AMD756) \
 148                 while (temp & mask) \
 149                         temp = readl (&hc->regs->roothub.register); \
 150         temp; })
 151
 152 static u32 roothub_a (struct ohci *hc)
 153         { return read_roothub (hc, a, 0xfc0fe000); }
 154 static inline u32 roothub_b (struct ohci *hc)
 155         { return readl (&hc->regs->roothub.b); }
 156 static inline u32 roothub_status (struct ohci *hc)
 157         { return readl (&hc->regs->roothub.status); }
 158 static u32 roothub_portstatus (struct ohci *hc, int i)
 159         { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
 160
 161
 162 /* forward declaration */
 163 static int hc_interrupt (void);
 164 static void
 165 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
 166         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
 167
 168 /*-------------------------------------------------------------------------*
 169  * URB support functions
 170  *-------------------------------------------------------------------------*/
 171
 172 /* free HCD-private data associated with this URB */
 173
 174 static void urb_free_priv (urb_priv_t * urb)
 175 {
 176         int             i;
 177         int             last;
 178         struct td       * td;
 179
 180         last = urb->length - 1;
 181         if (last >= 0) {
 182                 for (i = 0; i <= last; i++) {
 183                         td = urb->td[i];
 184                         if (td) {
 185                                 td->usb_dev = NULL;
 186                                 urb->td[i] = NULL;
 187                         }
 188                 }
 189         }
 190         free(urb);
 191 }
 192
 193 /*-------------------------------------------------------------------------*/
 194
 195 #ifdef DEBUG
 196 static int sohci_get_current_frame_number (struct usb_device * dev);
 197
 198 /* debug| print the main components of an URB
 199  * small: 0) header + data packets 1) just header */
 200
 201 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
 202         unsigned long pipe, void * buffer,
 203         int transfer_len, struct devrequest * setup, char * str, int small)
 204 {
 205         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
 206                         str,
 207                         sohci_get_current_frame_number (dev),
 208                         usb_pipedevice (pipe),
 209                         usb_pipeendpoint (pipe),
 210                         usb_pipeout (pipe)? 'O': 'I',
 211                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 212                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 213                         (purb ? purb->actual_length : 0),
 214                         transfer_len, dev->status);
 215 #ifdef  OHCI_VERBOSE_DEBUG
 216         if (!small) {
 217                 int i, len;
 218
 219                 if (usb_pipecontrol (pipe)) {
 220                         printf (__FILE__ ": cmd(8):");
 221                         for (i = 0; i < 8 ; i++)
 222                                 printf (" %02x", ((__u8 *) setup) [i]);
 223                         printf ("\n");
 224                 }
 225                 if (transfer_len > 0 && buffer) {
 226                         printf (__FILE__ ": data(%d/%d):",
 227                                 (purb ? purb->actual_length : 0),
 228                                 transfer_len);
 229                         len = usb_pipeout (pipe)?
 230                                         transfer_len:
 231                                         (purb ? purb->actual_length : 0);
 232                         for (i = 0; i < 16 && i < len; i++)
 233                                 printf (" %02x", ((__u8 *) buffer) [i]);
 234                         printf ("%s\n", i < len? "...": "");
 235                 }
 236         }
 237 #endif
 238 }
 239
 240 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 241 void ep_print_int_eds (ohci_t *ohci, char * str) {
 242         int i, j;
 243          __u32 * ed_p;
 244         for (i= 0; i < 32; i++) {
 245                 j = 5;
 246                 ed_p = &(ohci->hcca->int_table [i]);
 247                 if (*ed_p == 0)
 248                     continue;
 249                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 250                 while (*ed_p != 0 && j--) {
 251                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 252                         printf (" ed: %4x;", ed->hwINFO);
 253                         ed_p = &ed->hwNextED;
 254                 }
 255                 printf ("\n");
 256         }
 257 }
 258
 259 static void ohci_dump_intr_mask (char *label, __u32 mask)
 260 {
 261         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 262                 label,
 263                 mask,
 264                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 265                 (mask & OHCI_INTR_OC) ? " OC" : "",
 266                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 267                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 268                 (mask & OHCI_INTR_UE) ? " UE" : "",
 269                 (mask & OHCI_INTR_RD) ? " RD" : "",
 270                 (mask & OHCI_INTR_SF) ? " SF" : "",
 271                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 272                 (mask & OHCI_INTR_SO) ? " SO" : ""
 273                 );
 274 }
 275
 276 static void maybe_print_eds (char *label, __u32 value)
 277 {
 278         ed_t *edp = (ed_t *)value;
 279
 280         if (value) {
 281                 dbg ("%s %08x", label, value);
 282                 dbg ("%08x", edp->hwINFO);
 283                 dbg ("%08x", edp->hwTailP);
 284                 dbg ("%08x", edp->hwHeadP);
 285                 dbg ("%08x", edp->hwNextED);
 286         }
 287 }
 288
 289 static char * hcfs2string (int state)
 290 {
 291         switch (state) {
 292                 case OHCI_USB_RESET:    return "reset";
 293                 case OHCI_USB_RESUME:   return "resume";
 294                 case OHCI_USB_OPER:     return "operational";
 295                 case OHCI_USB_SUSPEND:  return "suspend";
 296         }
 297         return "?";
 298 }
 299
 300 /* dump control and status registers */
 301 static void ohci_dump_status (ohci_t *controller)
 302 {
 303         struct ohci_regs        *regs = controller->regs;
 304         __u32                   temp;
 305
 306         temp = readl (&regs->revision) & 0xff;
 307         if (temp != 0x10)
 308                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 309
 310         temp = readl (&regs->control);
 311         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 312                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 313                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 314                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 315                 hcfs2string (temp & OHCI_CTRL_HCFS),
 316                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 317                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 318                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 319                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 320                 temp & OHCI_CTRL_CBSR
 321                 );
 322
 323         temp = readl (&regs->cmdstatus);
 324         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 325                 (temp & OHCI_SOC) >> 16,
 326                 (temp & OHCI_OCR) ? " OCR" : "",
 327                 (temp & OHCI_BLF) ? " BLF" : "",
 328                 (temp & OHCI_CLF) ? " CLF" : "",
 329                 (temp & OHCI_HCR) ? " HCR" : ""
 330                 );
 331
 332         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 333         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 334
 335         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 336
 337         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 338         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 339
 340         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 341         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 342
 343         maybe_print_eds ("donehead", readl (&regs->donehead));
 344 }
 345
 346 static void ohci_dump_roothub (ohci_t *controller, int verbose)
 347 {
 348         __u32                   temp, ndp, i;
 349
 350         temp = roothub_a (controller);
 351         ndp = (temp & RH_A_NDP);
 352 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 353         ndp = (ndp == 2) ? 1:0;
 354 #endif
 355         if (verbose) {
 356                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 357                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 358                         (temp & RH_A_NOCP) ? " NOCP" : "",
 359                         (temp & RH_A_OCPM) ? " OCPM" : "",
 360                         (temp & RH_A_DT) ? " DT" : "",
 361                         (temp & RH_A_NPS) ? " NPS" : "",
 362                         (temp & RH_A_PSM) ? " PSM" : "",
 363                         ndp
 364                         );
 365                 temp = roothub_b (controller);
 366                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 367                         temp,
 368                         (temp & RH_B_PPCM) >> 16,
 369                         (temp & RH_B_DR)
 370                         );
 371                 temp = roothub_status (controller);
 372                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
 373                         temp,
 374                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 375                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 376                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 377                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 378                         (temp & RH_HS_OCI) ? " OCI" : "",
 379                         (temp & RH_HS_LPS) ? " LPS" : ""
 380                         );
 381         }
 382
 383         for (i = 0; i < ndp; i++) {
 384                 temp = roothub_portstatus (controller, i);
 385                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 386                         i,
 387                         temp,
 388                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 389                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 390                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 391                         (temp & RH_PS_PESC) ? " PESC" : "",
 392                         (temp & RH_PS_CSC) ? " CSC" : "",
 393
 394                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 395                         (temp & RH_PS_PPS) ? " PPS" : "",
 396                         (temp & RH_PS_PRS) ? " PRS" : "",
 397                         (temp & RH_PS_POCI) ? " POCI" : "",
 398                         (temp & RH_PS_PSS) ? " PSS" : "",
 399
 400                         (temp & RH_PS_PES) ? " PES" : "",
 401                         (temp & RH_PS_CCS) ? " CCS" : ""
 402                         );
 403         }
 404 }
 405
 406 static void ohci_dump (ohci_t *controller, int verbose)
 407 {
 408         dbg ("OHCI controller usb-%s state", controller->slot_name);
 409
 410         /* dumps some of the state we know about */
 411         ohci_dump_status (controller);
 412         if (verbose)
 413                 ep_print_int_eds (controller, "hcca");
 414         dbg ("hcca frame #%04x", controller->hcca->frame_no);
 415         ohci_dump_roothub (controller, 1);
 416 }
 417
 418
 419 #endif /* DEBUG */
 420
 421 /*-------------------------------------------------------------------------*
 422  * Interface functions (URB)
 423  *-------------------------------------------------------------------------*/
 424
 425 /* get a transfer request */
 426
 427 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 428 {
 429         ohci_t *ohci;
 430         ed_t * ed;
 431         urb_priv_t *purb_priv = urb;
 432         int i, size = 0;
 433         struct usb_device *dev = urb->dev;
 434         unsigned long pipe = urb->pipe;
 435         void *buffer = urb->transfer_buffer;
 436         int transfer_len = urb->transfer_buffer_length;
 437         int interval = urb->interval;
 438
 439         ohci = &gohci;
 440
 441         /* when controller's hung, permit only roothub cleanup attempts
 442          * such as powering down ports */
 443         if (ohci->disabled) {
 444                 err("sohci_submit_job: EPIPE");
 445                 return -1;
 446         }
 447
 448         /* we're about to begin a new transaction here so mark the URB unfinished */
 449         urb->finished = 0;
 450
 451         /* every endpoint has a ed, locate and fill it */
 452         if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
 453                 err("sohci_submit_job: ENOMEM");
 454                 return -1;
 455         }
 456
 457         /* for the private part of the URB we need the number of TDs (size) */
 458         switch (usb_pipetype (pipe)) {
 459                 case PIPE_BULK: /* one TD for every 4096 Byte */
 460                         size = (transfer_len - 1) / 4096 + 1;
 461                         break;
 462                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 463                         size = (transfer_len == 0)? 2:
 464                                                 (transfer_len - 1) / 4096 + 3;
 465                         break;
 466                 case PIPE_INTERRUPT: /* 1 TD */
 467                         size = 1;
 468                         break;
 469         }
 470
 471         ed->purb = urb;
 472
 473         if (size >= (N_URB_TD - 1)) {
 474                 err("need %d TDs, only have %d", size, N_URB_TD);
 475                 return -1;
 476         }
 477         purb_priv->pipe = pipe;
 478
 479         /* fill the private part of the URB */
 480         purb_priv->length = size;
 481         purb_priv->ed = ed;
 482         purb_priv->actual_length = 0;
 483
 484         /* allocate the TDs */
 485         /* note that td[0] was allocated in ep_add_ed */
 486         for (i = 0; i < size; i++) {
 487                 purb_priv->td[i] = td_alloc (dev);
 488                 if (!purb_priv->td[i]) {
 489                         purb_priv->length = i;
 490                         urb_free_priv (purb_priv);
 491                         err("sohci_submit_job: ENOMEM");
 492                         return -1;
 493                 }
 494         }
 495
 496         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 497                 urb_free_priv (purb_priv);
 498                 err("sohci_submit_job: EINVAL");
 499                 return -1;
 500         }
 501
 502         /* link the ed into a chain if is not already */
 503         if (ed->state != ED_OPER)
 504                 ep_link (ohci, ed);
 505
 506         /* fill the TDs and link it to the ed */
 507         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
 508
 509         return 0;
 510 }
 511
 512 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 513 {
 514         struct ohci_regs *regs = hc->regs;
 515
 516         switch (usb_pipetype (urb->pipe)) {
 517         case PIPE_INTERRUPT:
 518                 /* implicitly requeued */
 519                 if (urb->dev->irq_handle &&
 520                                 (urb->dev->irq_act_len = urb->actual_length)) {
 521                         writel (OHCI_INTR_WDH, &regs->intrenable);
 522                         readl (&regs->intrenable); /* PCI posting flush */
 523                         urb->dev->irq_handle(urb->dev);
 524                         writel (OHCI_INTR_WDH, &regs->intrdisable);
 525                         readl (&regs->intrdisable); /* PCI posting flush */
 526                 }
 527                 urb->actual_length = 0;
 528                 td_submit_job (
 529                                 urb->dev,
 530                                 urb->pipe,
 531                                 urb->transfer_buffer,
 532                                 urb->transfer_buffer_length,
 533                                 NULL,
 534                                 urb,
 535                                 urb->interval);
 536                 break;
 537         case PIPE_CONTROL:
 538         case PIPE_BULK:
 539                 break;
 540         default:
 541                 return 0;
 542         }
 543         return 1;
 544 }
 545
 546 /*-------------------------------------------------------------------------*/
 547
 548 #ifdef DEBUG
 549 /* tell us the current USB frame number */
 550
 551 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
 552 {
 553         ohci_t *ohci = &gohci;
 554
 555         return m16_swap (ohci->hcca->frame_no);
 556 }
 557 #endif
 558
 559 /*-------------------------------------------------------------------------*
 560  * ED handling functions
 561  *-------------------------------------------------------------------------*/
 562
 563 /* search for the right branch to insert an interrupt ed into the int tree
 564  * do some load ballancing;
 565  * returns the branch and
 566  * sets the interval to interval = 2^integer (ld (interval)) */
 567
 568 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
 569 {
 570         int i, branch = 0;
 571
 572         /* search for the least loaded interrupt endpoint
 573          * branch of all 32 branches
 574          */
 575         for (i = 0; i < 32; i++)
 576                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 577                         branch = i;
 578
 579         branch = branch % interval;
 580         for (i = branch; i < 32; i += interval)
 581                 ohci->ohci_int_load [i] += load;
 582
 583         return branch;
 584 }
 585
 586 /*-------------------------------------------------------------------------*/
 587
 588 /*  2^int( ld (inter)) */
 589
 590 static int ep_2_n_interval (int inter)
 591 {
 592         int i;
 593         for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
 594         return 1 << i;
 595 }
 596
 597 /*-------------------------------------------------------------------------*/
 598
 599 /* the int tree is a binary tree
 600  * in order to process it sequentially the indexes of the branches have to be mapped
 601  * the mapping reverses the bits of a word of num_bits length */
 602
 603 static int ep_rev (int num_bits, int word)
 604 {
 605         int i, wout = 0;
 606
 607         for (i = 0; i < num_bits; i++)
 608                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 609         return wout;
 610 }
 611
 612 /*-------------------------------------------------------------------------*
 613  * ED handling functions
 614  *-------------------------------------------------------------------------*/
 615
 616 /* link an ed into one of the HC chains */
 617
 618 static int ep_link (ohci_t *ohci, ed_t *edi)
 619 {
 620         volatile ed_t *ed = edi;
 621         int int_branch;
 622         int i;
 623         int inter;
 624         int interval;
 625         int load;
 626         __u32 * ed_p;
 627
 628         ed->state = ED_OPER;
 629         ed->int_interval = 0;
 630
 631         switch (ed->type) {
 632         case PIPE_CONTROL:
 633                 ed->hwNextED = 0;
 634                 if (ohci->ed_controltail == NULL) {
 635                         writel (ed, &ohci->regs->ed_controlhead);
 636                 } else {
 637                         ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
 638                 }
 639                 ed->ed_prev = ohci->ed_controltail;
 640                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 641                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 642                         ohci->hc_control |= OHCI_CTRL_CLE;
 643                         writel (ohci->hc_control, &ohci->regs->control);
 644                 }
 645                 ohci->ed_controltail = edi;
 646                 break;
 647
 648         case PIPE_BULK:
 649                 ed->hwNextED = 0;
 650                 if (ohci->ed_bulktail == NULL) {
 651                         writel (ed, &ohci->regs->ed_bulkhead);
 652                 } else {
 653                         ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
 654                 }
 655                 ed->ed_prev = ohci->ed_bulktail;
 656                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 657                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 658                         ohci->hc_control |= OHCI_CTRL_BLE;
 659                         writel (ohci->hc_control, &ohci->regs->control);
 660                 }
 661                 ohci->ed_bulktail = edi;
 662                 break;
 663
 664         case PIPE_INTERRUPT:
 665                 load = ed->int_load;
 666                 interval = ep_2_n_interval (ed->int_period);
 667                 ed->int_interval = interval;
 668                 int_branch = ep_int_ballance (ohci, interval, load);
 669                 ed->int_branch = int_branch;
 670
 671                 for (i = 0; i < ep_rev (6, interval); i += inter) {
 672                         inter = 1;
 673                         for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
 674                                 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
 675                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 676                                         inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
 677                         ed->hwNextED = *ed_p;
 678                         *ed_p = m32_swap(ed);
 679                 }
 680                 break;
 681         }
 682         return 0;
 683 }
 684
 685 /*-------------------------------------------------------------------------*/
 686
 687 /* scan the periodic table to find and unlink this ED */
 688 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
 689                 unsigned index, unsigned period)
 690 {
 691         for (; index < NUM_INTS; index += period) {
 692                 __u32   *ed_p = &ohci->hcca->int_table [index];
 693
 694                 /* ED might have been unlinked through another path */
 695                 while (*ed_p != 0) {
 696                         if (((struct ed *)m32_swap (ed_p)) == ed) {
 697                                 *ed_p = ed->hwNextED;
 698                                 break;
 699                         }
 700                         ed_p = & (((struct ed *)m32_swap (ed_p))->hwNextED);
 701                 }
 702         }
 703 }
 704
 705
 706 /* unlink an ed from one of the HC chains.
 707  * just the link to the ed is unlinked.
 708  * the link from the ed still points to another operational ed or 0
 709  * so the HC can eventually finish the processing of the unlinked ed */
 710
 711 static int ep_unlink (ohci_t *ohci, ed_t *edi)
 712 {
 713         volatile ed_t *ed = edi;
 714         int i;
 715
 716         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
 717
 718         switch (ed->type) {
 719         case PIPE_CONTROL:
 720                 if (ed->ed_prev == NULL) {
 721                         if (!ed->hwNextED) {
 722                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 723                                 writel (ohci->hc_control, &ohci->regs->control);
 724                         }
 725                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
 726                 } else {
 727                         ed->ed_prev->hwNextED = ed->hwNextED;
 728                 }
 729                 if (ohci->ed_controltail == ed) {
 730                         ohci->ed_controltail = ed->ed_prev;
 731                 } else {
 732                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 733                 }
 734                 break;
 735
 736         case PIPE_BULK:
 737                 if (ed->ed_prev == NULL) {
 738                         if (!ed->hwNextED) {
 739                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 740                                 writel (ohci->hc_control, &ohci->regs->control);
 741                         }
 742                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
 743                 } else {
 744                         ed->ed_prev->hwNextED = ed->hwNextED;
 745                 }
 746                 if (ohci->ed_bulktail == ed) {
 747                         ohci->ed_bulktail = ed->ed_prev;
 748                 } else {
 749                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 750                 }
 751                 break;
 752
 753         case PIPE_INTERRUPT:
 754                 periodic_unlink (ohci, ed, 0, 1);
 755                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 756                     ohci->ohci_int_load[i] -= ed->int_load;
 757                 break;
 758         }
 759         ed->state = ED_UNLINK;
 760         return 0;
 761 }
 762
 763
 764 /*-------------------------------------------------------------------------*/
 765
 766 /* add/reinit an endpoint; this should be done once at the
 767  * usb_set_configuration command, but the USB stack is a little bit
 768  * stateless so we do it at every transaction if the state of the ed
 769  * is ED_NEW then a dummy td is added and the state is changed to
 770  * ED_UNLINK in all other cases the state is left unchanged the ed
 771  * info fields are setted anyway even though most of them should not
 772  * change
 773  */
 774 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
 775                 int interval, int load)
 776 {
 777         td_t *td;
 778         ed_t *ed_ret;
 779         volatile ed_t *ed;
 780
 781         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
 782                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
 783
 784         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 785                 err("ep_add_ed: pending delete");
 786                 /* pending delete request */
 787                 return NULL;
 788         }
 789
 790         if (ed->state == ED_NEW) {
 791                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 792                 /* dummy td; end of td list for ed */
 793                 td = td_alloc (usb_dev);
 794                 ed->hwTailP = m32_swap ((unsigned long)td);
 795                 ed->hwHeadP = ed->hwTailP;
 796                 ed->state = ED_UNLINK;
 797                 ed->type = usb_pipetype (pipe);
 798                 ohci_dev.ed_cnt++;
 799         }
 800
 801         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
 802                         | usb_pipeendpoint (pipe) << 7
 803                         | (usb_pipeisoc (pipe)? 0x8000: 0)
 804                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
 805                         | usb_pipeslow (pipe) << 13
 806                         | usb_maxpacket (usb_dev, pipe) << 16);
 807
 808         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 809                 ed->int_period = interval;
 810                 ed->int_load = load;
 811         }
 812
 813         return ed_ret;
 814 }
 815
 816 /*-------------------------------------------------------------------------*
 817  * TD handling functions
 818  *-------------------------------------------------------------------------*/
 819
 820 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 821
 822 static void td_fill (ohci_t *ohci, unsigned int info,
 823         void *data, int len,
 824         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 825 {
 826         volatile td_t  *td, *td_pt;
 827 #ifdef OHCI_FILL_TRACE
 828         int i;
 829 #endif
 830
 831         if (index > urb_priv->length) {
 832                 err("index > length");
 833                 return;
 834         }
 835         /* use this td as the next dummy */
 836         td_pt = urb_priv->td [index];
 837         td_pt->hwNextTD = 0;
 838
 839         /* fill the old dummy TD */
 840         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
 841
 842         td->ed = urb_priv->ed;
 843         td->next_dl_td = NULL;
 844         td->index = index;
 845         td->data = (__u32)data;
 846 #ifdef OHCI_FILL_TRACE
 847         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
 848                 for (i = 0; i < len; i++)
 849                 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
 850                 printf("\n");
 851         }
 852 #endif
 853         if (!len)
 854                 data = 0;
 855
 856         td->hwINFO = m32_swap (info);
 857         td->hwCBP = m32_swap ((unsigned long)data);
 858         if (data)
 859                 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
 860         else
 861                 td->hwBE = 0;
 862         td->hwNextTD = m32_swap ((unsigned long)td_pt);
 863
 864         /* append to queue */
 865         td->ed->hwTailP = td->hwNextTD;
 866 }
 867
 868 /*-------------------------------------------------------------------------*/
 869
 870 /* prepare all TDs of a transfer */
 871
 872 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
 873         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
 874 {
 875         ohci_t *ohci = &gohci;
 876         int data_len = transfer_len;
 877         void *data;
 878         int cnt = 0;
 879         __u32 info = 0;
 880         unsigned int toggle = 0;
 881
 882         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
 883         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 884                 toggle = TD_T_TOGGLE;
 885         } else {
 886                 toggle = TD_T_DATA0;
 887                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
 888         }
 889         urb->td_cnt = 0;
 890         if (data_len)
 891                 data = buffer;
 892         else
 893                 data = 0;
 894
 895         switch (usb_pipetype (pipe)) {
 896         case PIPE_BULK:
 897                 info = usb_pipeout (pipe)?
 898                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 899                 while(data_len > 4096) {
 900                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
 901                         data += 4096; data_len -= 4096; cnt++;
 902                 }
 903                 info = usb_pipeout (pipe)?
 904                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 905                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
 906                 cnt++;
 907
 908                 if (!ohci->sleeping)
 909                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
 910                 break;
 911
 912         case PIPE_CONTROL:
 913                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 914                 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
 915                 if (data_len > 0) {
 916                         info = usb_pipeout (pipe)?
 917                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 918                         /* NOTE:  mishandles transfers >8K, some >4K */
 919                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 920                 }
 921                 info = usb_pipeout (pipe)?
 922                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
 923                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
 924                 if (!ohci->sleeping)
 925                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
 926                 break;
 927
 928         case PIPE_INTERRUPT:
 929                 info = usb_pipeout (urb->pipe)?
 930                         TD_CC | TD_DP_OUT | toggle:
 931                         TD_CC | TD_R | TD_DP_IN | toggle;
 932                 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 933                 break;
 934         }
 935         if (urb->length != cnt)
 936                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 937 }
 938
 939 /*-------------------------------------------------------------------------*
 940  * Done List handling functions
 941  *-------------------------------------------------------------------------*/
 942
 943
 944 /* calculate the transfer length and update the urb */
 945
 946 static void dl_transfer_length(td_t * td)
 947 {
 948         __u32 tdINFO, tdBE, tdCBP;
 949         urb_priv_t *lurb_priv = td->ed->purb;
 950
 951         tdINFO = m32_swap (td->hwINFO);
 952         tdBE   = m32_swap (td->hwBE);
 953         tdCBP  = m32_swap (td->hwCBP);
 954
 955
 956         if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
 957             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 958                 if (tdBE != 0) {
 959                         if (td->hwCBP == 0)
 960                                 lurb_priv->actual_length += tdBE - td->data + 1;
 961                         else
 962                                 lurb_priv->actual_length += tdCBP - td->data;
 963                 }
 964         }
 965 }
 966
 967 /*-------------------------------------------------------------------------*/
 968
 969 /* replies to the request have to be on a FIFO basis so
 970  * we reverse the reversed done-list */
 971
 972 static td_t * dl_reverse_done_list (ohci_t *ohci)
 973 {
 974         __u32 td_list_hc;
 975         td_t *td_rev = NULL;
 976         td_t *td_list = NULL;
 977         urb_priv_t *lurb_priv = NULL;
 978
 979         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
 980         ohci->hcca->done_head = 0;
 981
 982         while (td_list_hc) {
 983                 td_list = (td_t *)td_list_hc;
 984
 985                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
 986                         lurb_priv = td_list->ed->purb;
 987                         dbg(" USB-error/status: %x : %p",
 988                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
 989                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
 990                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
 991                                         td_list->ed->hwHeadP =
 992                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
 993                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
 994                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
 995                                 } else
 996                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
 997                         }
 998 #ifdef CONFIG_MPC5200
 999                         td_list->hwNextTD = 0;
1000 #endif
1001                 }
1002
1003                 td_list->next_dl_td = td_rev;
1004                 td_rev = td_list;
1005                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
1006         }
1007         return td_list;
1008 }
1009
1010 /*-------------------------------------------------------------------------*/
1011
1012 /* td done list */
1013 static int dl_done_list (ohci_t *ohci, td_t *td_list)
1014 {
1015         td_t *td_list_next = NULL;
1016         ed_t *ed;
1017         int cc = 0;
1018         int stat = 0;
1019         /* urb_t *urb; */
1020         urb_priv_t *lurb_priv;
1021         __u32 tdINFO, edHeadP, edTailP;
1022
1023         while (td_list) {
1024                 td_list_next = td_list->next_dl_td;
1025
1026                 tdINFO = m32_swap (td_list->hwINFO);
1027
1028                 ed = td_list->ed;
1029                 lurb_priv = ed->purb;
1030
1031                 dl_transfer_length(td_list);
1032
1033                 /* error code of transfer */
1034                 cc = TD_CC_GET (tdINFO);
1035                 if (cc != 0) {
1036                         dbg("ConditionCode %#x", cc);
1037                         stat = cc_to_error[cc];
1038                 }
1039
1040                 /* see if this done list makes for all TD's of current URB,
1041                  * and mark the URB finished if so */
1042                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1043 #if 1
1044                         if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1045                             (lurb_priv->state != URB_DEL))
1046 #else
1047                         if ((ed->state & (ED_OPER | ED_UNLINK)))
1048 #endif
1049                                 lurb_priv->finished = sohci_return_job(ohci,
1050                                                 lurb_priv);
1051                         else
1052                                 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1053                 } else
1054                         dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1055                                 lurb_priv->length);
1056                 if (ed->state != ED_NEW &&
1057                           (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1058                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1059                         edTailP = m32_swap (ed->hwTailP);
1060
1061                         /* unlink eds if they are not busy */
1062                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1063                                 ep_unlink (ohci, ed);
1064                 }
1065
1066                 td_list = td_list_next;
1067         }
1068         return stat;
1069 }
1070
1071 /*-------------------------------------------------------------------------*
1072  * Virtual Root Hub
1073  *-------------------------------------------------------------------------*/
1074
1075 /* Device descriptor */
1076 static __u8 root_hub_dev_des[] =
1077 {
1078         0x12,       /*  __u8  bLength; */
1079         0x01,       /*  __u8  bDescriptorType; Device */
1080         0x10,       /*  __u16 bcdUSB; v1.1 */
1081         0x01,
1082         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1083         0x00,       /*  __u8  bDeviceSubClass; */
1084         0x00,       /*  __u8  bDeviceProtocol; */
1085         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1086         0x00,       /*  __u16 idVendor; */
1087         0x00,
1088         0x00,       /*  __u16 idProduct; */
1089         0x00,
1090         0x00,       /*  __u16 bcdDevice; */
1091         0x00,
1092         0x00,       /*  __u8  iManufacturer; */
1093         0x01,       /*  __u8  iProduct; */
1094         0x00,       /*  __u8  iSerialNumber; */
1095         0x01        /*  __u8  bNumConfigurations; */
1096 };
1097
1098
1099 /* Configuration descriptor */
1100 static __u8 root_hub_config_des[] =
1101 {
1102         0x09,       /*  __u8  bLength; */
1103         0x02,       /*  __u8  bDescriptorType; Configuration */
1104         0x19,       /*  __u16 wTotalLength; */
1105         0x00,
1106         0x01,       /*  __u8  bNumInterfaces; */
1107         0x01,       /*  __u8  bConfigurationValue; */
1108         0x00,       /*  __u8  iConfiguration; */
1109         0x40,       /*  __u8  bmAttributes;
1110                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1111         0x00,       /*  __u8  MaxPower; */
1112
1113         /* interface */
1114         0x09,       /*  __u8  if_bLength; */
1115         0x04,       /*  __u8  if_bDescriptorType; Interface */
1116         0x00,       /*  __u8  if_bInterfaceNumber; */
1117         0x00,       /*  __u8  if_bAlternateSetting; */
1118         0x01,       /*  __u8  if_bNumEndpoints; */
1119         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1120         0x00,       /*  __u8  if_bInterfaceSubClass; */
1121         0x00,       /*  __u8  if_bInterfaceProtocol; */
1122         0x00,       /*  __u8  if_iInterface; */
1123
1124         /* endpoint */
1125         0x07,       /*  __u8  ep_bLength; */
1126         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1127         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1128         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1129         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1130         0x00,
1131         0xff        /*  __u8  ep_bInterval; 255 ms */
1132 };
1133
1134 static unsigned char root_hub_str_index0[] =
1135 {
1136         0x04,                   /*  __u8  bLength; */
1137         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1138         0x09,                   /*  __u8  lang ID */
1139         0x04,                   /*  __u8  lang ID */
1140 };
1141
1142 static unsigned char root_hub_str_index1[] =
1143 {
1144         28,                     /*  __u8  bLength; */
1145         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1146         'O',                    /*  __u8  Unicode */
1147         0,                              /*  __u8  Unicode */
1148         'H',                    /*  __u8  Unicode */
1149         0,                              /*  __u8  Unicode */
1150         'C',                    /*  __u8  Unicode */
1151         0,                              /*  __u8  Unicode */
1152         'I',                    /*  __u8  Unicode */
1153         0,                              /*  __u8  Unicode */
1154         ' ',                    /*  __u8  Unicode */
1155         0,                              /*  __u8  Unicode */
1156         'R',                    /*  __u8  Unicode */
1157         0,                              /*  __u8  Unicode */
1158         'o',                    /*  __u8  Unicode */
1159         0,                              /*  __u8  Unicode */
1160         'o',                    /*  __u8  Unicode */
1161         0,                              /*  __u8  Unicode */
1162         't',                    /*  __u8  Unicode */
1163         0,                              /*  __u8  Unicode */
1164         ' ',                    /*  __u8  Unicode */
1165         0,                              /*  __u8  Unicode */
1166         'H',                    /*  __u8  Unicode */
1167         0,                              /*  __u8  Unicode */
1168         'u',                    /*  __u8  Unicode */
1169         0,                              /*  __u8  Unicode */
1170         'b',                    /*  __u8  Unicode */
1171         0,                              /*  __u8  Unicode */
1172 };
1173
1174 /* Hub class-specific descriptor is constructed dynamically */
1175
1176
1177 /*-------------------------------------------------------------------------*/
1178
1179 #define OK(x)                   len = (x); break
1180 #ifdef DEBUG
1181 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1182 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1183 #else
1184 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1185 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1186 #endif
1187 #define RD_RH_STAT              roothub_status(&gohci)
1188 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
1189
1190 /* request to virtual root hub */
1191
1192 int rh_check_port_status(ohci_t *controller)
1193 {
1194         __u32 temp, ndp, i;
1195         int res;
1196
1197         res = -1;
1198         temp = roothub_a (controller);
1199         ndp = (temp & RH_A_NDP);
1200 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1201         ndp = (ndp == 2) ? 1:0;
1202 #endif
1203         for (i = 0; i < ndp; i++) {
1204                 temp = roothub_portstatus (controller, i);
1205                 /* check for a device disconnect */
1206                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1207                         (RH_PS_PESC | RH_PS_CSC)) &&
1208                         ((temp & RH_PS_CCS) == 0)) {
1209                         res = i;
1210                         break;
1211                 }
1212         }
1213         return res;
1214 }
1215
1216 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1217                 void *buffer, int transfer_len, struct devrequest *cmd)
1218 {
1219         void * data = buffer;
1220         int leni = transfer_len;
1221         int len = 0;
1222         int stat = 0;
1223         __u32 datab[4];
1224         __u8 *data_buf = (__u8 *)datab;
1225         __u16 bmRType_bReq;
1226         __u16 wValue;
1227         __u16 wIndex;
1228         __u16 wLength;
1229
1230 #ifdef DEBUG
1231 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1232 #else
1233         wait_ms(1);
1234 #endif
1235         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1236                 info("Root-Hub submit IRQ: NOT implemented");
1237                 return 0;
1238         }
1239
1240         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1241         wValue        = cpu_to_le16 (cmd->value);
1242         wIndex        = cpu_to_le16 (cmd->index);
1243         wLength       = cpu_to_le16 (cmd->length);
1244
1245         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1246                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1247
1248         switch (bmRType_bReq) {
1249         /* Request Destination:
1250            without flags: Device,
1251            RH_INTERFACE: interface,
1252            RH_ENDPOINT: endpoint,
1253            RH_CLASS means HUB here,
1254            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1255         */
1256
1257         case RH_GET_STATUS:
1258                         *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1259         case RH_GET_STATUS | RH_INTERFACE:
1260                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1261         case RH_GET_STATUS | RH_ENDPOINT:
1262                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1263         case RH_GET_STATUS | RH_CLASS:
1264                         *(__u32 *) data_buf = cpu_to_le32 (
1265                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1266                         OK (4);
1267         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1268                         *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1269
1270         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1271                 switch (wValue) {
1272                         case (RH_ENDPOINT_STALL): OK (0);
1273                 }
1274                 break;
1275
1276         case RH_CLEAR_FEATURE | RH_CLASS:
1277                 switch (wValue) {
1278                         case RH_C_HUB_LOCAL_POWER:
1279                                 OK(0);
1280                         case (RH_C_HUB_OVER_CURRENT):
1281                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1282                 }
1283                 break;
1284
1285         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1286                 switch (wValue) {
1287                         case (RH_PORT_ENABLE):
1288                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1289                         case (RH_PORT_SUSPEND):
1290                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1291                         case (RH_PORT_POWER):
1292                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1293                         case (RH_C_PORT_CONNECTION):
1294                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1295                         case (RH_C_PORT_ENABLE):
1296                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1297                         case (RH_C_PORT_SUSPEND):
1298                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1299                         case (RH_C_PORT_OVER_CURRENT):
1300                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1301                         case (RH_C_PORT_RESET):
1302                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1303                 }
1304                 break;
1305
1306         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1307                 switch (wValue) {
1308                         case (RH_PORT_SUSPEND):
1309                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1310                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1311                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1312                                             WR_RH_PORTSTAT (RH_PS_PRS);
1313                                         OK (0);
1314                         case (RH_PORT_POWER):
1315                                         WR_RH_PORTSTAT (RH_PS_PPS );
1316                                         wait_ms(100);
1317                                         OK (0);
1318                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1319                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1320                                             WR_RH_PORTSTAT (RH_PS_PES );
1321                                         OK (0);
1322                 }
1323                 break;
1324
1325         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1326
1327         case RH_GET_DESCRIPTOR:
1328                 switch ((wValue & 0xff00) >> 8) {
1329                         case (0x01): /* device descriptor */
1330                                 len = min_t(unsigned int,
1331                                           leni,
1332                                           min_t(unsigned int,
1333                                               sizeof (root_hub_dev_des),
1334                                               wLength));
1335                                 data_buf = root_hub_dev_des; OK(len);
1336                         case (0x02): /* configuration descriptor */
1337                                 len = min_t(unsigned int,
1338                                           leni,
1339                                           min_t(unsigned int,
1340                                               sizeof (root_hub_config_des),
1341                                               wLength));
1342                                 data_buf = root_hub_config_des; OK(len);
1343                         case (0x03): /* string descriptors */
1344                                 if(wValue==0x0300) {
1345                                         len = min_t(unsigned int,
1346                                                   leni,
1347                                                   min_t(unsigned int,
1348                                                       sizeof (root_hub_str_index0),
1349                                                       wLength));
1350                                         data_buf = root_hub_str_index0;
1351                                         OK(len);
1352                                 }
1353                                 if(wValue==0x0301) {
1354                                         len = min_t(unsigned int,
1355                                                   leni,
1356                                                   min_t(unsigned int,
1357                                                       sizeof (root_hub_str_index1),
1358                                                       wLength));
1359                                         data_buf = root_hub_str_index1;
1360                                         OK(len);
1361                         }
1362                         default:
1363                                 stat = USB_ST_STALLED;
1364                 }
1365                 break;
1366
1367         case RH_GET_DESCRIPTOR | RH_CLASS:
1368         {
1369                 __u32 temp = roothub_a (&gohci);
1370
1371                 data_buf [0] = 9;               /* min length; */
1372                 data_buf [1] = 0x29;
1373                 data_buf [2] = temp & RH_A_NDP;
1374 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1375                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1376 #endif
1377                 data_buf [3] = 0;
1378                 if (temp & RH_A_PSM)    /* per-port power switching? */
1379                         data_buf [3] |= 0x1;
1380                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1381                         data_buf [3] |= 0x10;
1382                 else if (temp & RH_A_OCPM)      /* per-port overcurrent reporting? */
1383                         data_buf [3] |= 0x8;
1384
1385                 /* corresponds to data_buf[4-7] */
1386                 datab [1] = 0;
1387                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1388                 temp = roothub_b (&gohci);
1389                 data_buf [7] = temp & RH_B_DR;
1390                 if (data_buf [2] < 7) {
1391                         data_buf [8] = 0xff;
1392                 } else {
1393                         data_buf [0] += 2;
1394                         data_buf [8] = (temp & RH_B_DR) >> 8;
1395                         data_buf [10] = data_buf [9] = 0xff;
1396                 }
1397
1398                 len = min_t(unsigned int, leni,
1399                             min_t(unsigned int, data_buf [0], wLength));
1400                 OK (len);
1401         }
1402
1403         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1404
1405         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1406
1407         default:
1408                 dbg ("unsupported root hub command");
1409                 stat = USB_ST_STALLED;
1410         }
1411
1412 #ifdef  DEBUG
1413         ohci_dump_roothub (&gohci, 1);
1414 #else
1415         wait_ms(1);
1416 #endif
1417
1418         len = min_t(int, len, leni);
1419         if (data != data_buf)
1420             memcpy (data, data_buf, len);
1421         dev->act_len = len;
1422         dev->status = stat;
1423
1424 #ifdef DEBUG
1425         pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1426 #else
1427         wait_ms(1);
1428 #endif
1429
1430         return stat;
1431 }
1432
1433 /*-------------------------------------------------------------------------*/
1434
1435 /* common code for handling submit messages - used for all but root hub */
1436 /* accesses. */
1437 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1438                 int transfer_len, struct devrequest *setup, int interval)
1439 {
1440         int stat = 0;
1441         int maxsize = usb_maxpacket(dev, pipe);
1442         int timeout;
1443         urb_priv_t *urb;
1444
1445         urb = malloc(sizeof(urb_priv_t));
1446         memset(urb, 0, sizeof(urb_priv_t));
1447
1448         urb->dev = dev;
1449         urb->pipe = pipe;
1450         urb->transfer_buffer = buffer;
1451         urb->transfer_buffer_length = transfer_len;
1452         urb->interval = interval;
1453
1454         /* device pulled? Shortcut the action. */
1455         if (devgone == dev) {
1456                 dev->status = USB_ST_CRC_ERR;
1457                 return 0;
1458         }
1459
1460 #ifdef DEBUG
1461         urb->actual_length = 0;
1462         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1463 #else
1464         wait_ms(1);
1465 #endif
1466         if (!maxsize) {
1467                 err("submit_common_message: pipesize for pipe %lx is zero",
1468                         pipe);
1469                 return -1;
1470         }
1471
1472         if (sohci_submit_job(urb, setup) < 0) {
1473                 err("sohci_submit_job failed");
1474                 return -1;
1475         }
1476
1477 #if 0
1478         wait_ms(10);
1479         /* ohci_dump_status(&gohci); */
1480 #endif
1481
1482         /* allow more time for a BULK device to react - some are slow */
1483 #define BULK_TO  5000   /* timeout in milliseconds */
1484         if (usb_pipetype (pipe) == PIPE_BULK)
1485                 timeout = BULK_TO;
1486         else
1487                 timeout = 100;
1488
1489         /* wait for it to complete */
1490         for (;;) {
1491                 /* check whether the controller is done */
1492                 stat = hc_interrupt();
1493                 if (stat < 0) {
1494                         stat = USB_ST_CRC_ERR;
1495                         break;
1496                 }
1497
1498                 /* NOTE: since we are not interrupt driven in U-Boot and always
1499                  * handle only one URB at a time, we cannot assume the
1500                  * transaction finished on the first successful return from
1501                  * hc_interrupt().. unless the flag for current URB is set,
1502                  * meaning that all TD's to/from device got actually
1503                  * transferred and processed. If the current URB is not
1504                  * finished we need to re-iterate this loop so as
1505                  * hc_interrupt() gets called again as there needs to be some
1506                  * more TD's to process still */
1507                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1508                         /* 0xff is returned for an SF-interrupt */
1509                         break;
1510                 }
1511
1512                 if (--timeout) {
1513                         wait_ms(1);
1514                         if (!urb->finished)
1515                                 dbg("\%");
1516
1517                 } else {
1518                         err("CTL:TIMEOUT ");
1519                         dbg("submit_common_msg: TO status %x\n", stat);
1520                         urb->finished = 1;
1521                         stat = USB_ST_CRC_ERR;
1522                         break;
1523                 }
1524         }
1525
1526         dev->status = stat;
1527         dev->act_len = transfer_len;
1528
1529 #ifdef DEBUG
1530         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1531 #else
1532         wait_ms(1);
1533 #endif
1534
1535         /* free TDs in urb_priv */
1536         if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1537                 urb_free_priv (urb);
1538         return 0;
1539 }
1540
1541 /* submit routines called from usb.c */
1542 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1543                 int transfer_len)
1544 {
1545         info("submit_bulk_msg");
1546         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1547 }
1548
1549 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1550                 int transfer_len, struct devrequest *setup)
1551 {
1552         int maxsize = usb_maxpacket(dev, pipe);
1553
1554         info("submit_control_msg");
1555 #ifdef DEBUG
1556         pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1557 #else
1558         wait_ms(1);
1559 #endif
1560         if (!maxsize) {
1561                 err("submit_control_message: pipesize for pipe %lx is zero",
1562                         pipe);
1563                 return -1;
1564         }
1565         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1566                 gohci.rh.dev = dev;
1567                 /* root hub - redirect */
1568                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1569                         setup);
1570         }
1571
1572         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1573 }
1574
1575 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1576                 int transfer_len, int interval)
1577 {
1578         info("submit_int_msg");
1579         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1580                         interval);
1581 }
1582
1583 /*-------------------------------------------------------------------------*
1584  * HC functions
1585  *-------------------------------------------------------------------------*/
1586
1587 /* reset the HC and BUS */
1588
1589 static int hc_reset (ohci_t *ohci)
1590 {
1591         int timeout = 30;
1592         int smm_timeout = 50; /* 0,5 sec */
1593
1594         dbg("%s\n", __FUNCTION__);
1595
1596         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1597                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1598                 info("USB HC TakeOver from SMM");
1599                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1600                         wait_ms (10);
1601                         if (--smm_timeout == 0) {
1602                                 err("USB HC TakeOver failed!");
1603                                 return -1;
1604                         }
1605                 }
1606         }
1607
1608         /* Disable HC interrupts */
1609         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1610
1611         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1612                 ohci->slot_name,
1613                 readl(&ohci->regs->control));
1614
1615         /* Reset USB (needed by some controllers) */
1616         ohci->hc_control = 0;
1617         writel (ohci->hc_control, &ohci->regs->control);
1618
1619         /* HC Reset requires max 10 us delay */
1620         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1621         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1622                 if (--timeout == 0) {
1623                         err("USB HC reset timed out!");
1624                         return -1;
1625                 }
1626                 udelay (1);
1627         }
1628         return 0;
1629 }
1630
1631 /*-------------------------------------------------------------------------*/
1632
1633 /* Start an OHCI controller, set the BUS operational
1634  * enable interrupts
1635  * connect the virtual root hub */
1636
1637 static int hc_start (ohci_t * ohci)
1638 {
1639         __u32 mask;
1640         unsigned int fminterval;
1641
1642         ohci->disabled = 1;
1643
1644         /* Tell the controller where the control and bulk lists are
1645          * The lists are empty now. */
1646
1647         writel (0, &ohci->regs->ed_controlhead);
1648         writel (0, &ohci->regs->ed_bulkhead);
1649
1650         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1651
1652         fminterval = 0x2edf;
1653         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1654         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1655         writel (fminterval, &ohci->regs->fminterval);
1656         writel (0x628, &ohci->regs->lsthresh);
1657
1658         /* start controller operations */
1659         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1660         ohci->disabled = 0;
1661         writel (ohci->hc_control, &ohci->regs->control);
1662
1663         /* disable all interrupts */
1664         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1665                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1666                         OHCI_INTR_OC | OHCI_INTR_MIE);
1667         writel (mask, &ohci->regs->intrdisable);
1668         /* clear all interrupts */
1669         mask &= ~OHCI_INTR_MIE;
1670         writel (mask, &ohci->regs->intrstatus);
1671         /* Choose the interrupts we care about now  - but w/o MIE */
1672         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1673         writel (mask, &ohci->regs->intrenable);
1674
1675 #ifdef  OHCI_USE_NPS
1676         /* required for AMD-756 and some Mac platforms */
1677         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1678                 &ohci->regs->roothub.a);
1679         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1680 #endif  /* OHCI_USE_NPS */
1681
1682 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1683         /* POTPGT delay is bits 24-31, in 2 ms units. */
1684         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1685
1686         /* connect the virtual root hub */
1687         ohci->rh.devnum = 0;
1688
1689         return 0;
1690 }
1691
1692 /*-------------------------------------------------------------------------*/
1693
1694 /* Poll USB interrupt. */
1695 void usb_event_poll(void)
1696 {
1697         hc_interrupt();
1698 }
1699
1700 /* an interrupt happens */
1701
1702 static int hc_interrupt (void)
1703 {
1704         ohci_t *ohci = &gohci;
1705         struct ohci_regs *regs = ohci->regs;
1706         int ints;
1707         int stat = -1;
1708
1709         if ((ohci->hcca->done_head != 0) &&
1710             !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1711                 ints =  OHCI_INTR_WDH;
1712         } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1713                 ohci->disabled++;
1714                 err ("%s device removed!", ohci->slot_name);
1715                 return -1;
1716         } else if ((ints &= readl (&regs->intrenable)) == 0) {
1717                 dbg("hc_interrupt: returning..\n");
1718                 return 0xff;
1719         }
1720
1721         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1722
1723         if (ints & OHCI_INTR_RHSC) {
1724                 got_rhsc = 1;
1725                 stat = 0xff;
1726         }
1727
1728         if (ints & OHCI_INTR_UE) {
1729                 ohci->disabled++;
1730                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1731                         ohci->slot_name);
1732                 /* e.g. due to PCI Master/Target Abort */
1733
1734 #ifdef  DEBUG
1735                 ohci_dump (ohci, 1);
1736 #else
1737         wait_ms(1);
1738 #endif
1739                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1740                 /* Make some non-interrupt context restart the controller. */
1741                 /* Count and limit the retries though; either hardware or */
1742                 /* software errors can go forever... */
1743                 hc_reset (ohci);
1744                 return -1;
1745         }
1746
1747         if (ints & OHCI_INTR_WDH) {
1748                 wait_ms(1);
1749                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1750                 (void)readl (&regs->intrdisable); /* flush */
1751                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1752                 writel (OHCI_INTR_WDH, &regs->intrenable);
1753                 (void)readl (&regs->intrdisable); /* flush */
1754         }
1755
1756         if (ints & OHCI_INTR_SO) {
1757                 dbg("USB Schedule overrun\n");
1758                 writel (OHCI_INTR_SO, &regs->intrenable);
1759                 stat = -1;
1760         }
1761
1762         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1763         if (ints & OHCI_INTR_SF) {
1764                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1765                 wait_ms(1);
1766                 writel (OHCI_INTR_SF, &regs->intrdisable);
1767                 if (ohci->ed_rm_list[frame] != NULL)
1768                         writel (OHCI_INTR_SF, &regs->intrenable);
1769                 stat = 0xff;
1770         }
1771
1772         writel (ints, &regs->intrstatus);
1773         return stat;
1774 }
1775
1776 /*-------------------------------------------------------------------------*/
1777
1778 /*-------------------------------------------------------------------------*/
1779
1780 /* De-allocate all resources.. */
1781
1782 static void hc_release_ohci (ohci_t *ohci)
1783 {
1784         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1785
1786         if (!ohci->disabled)
1787                 hc_reset (ohci);
1788 }
1789
1790 /*-------------------------------------------------------------------------*/
1791
1792 /*
1793  * low level initalisation routine, called from usb.c
1794  */
1795 static char ohci_inited = 0;
1796
1797 int usb_lowlevel_init(void)
1798 {
1799 #ifdef CONFIG_PCI_OHCI
1800         pci_dev_t pdev;
1801 #endif
1802
1803 #ifdef CFG_USB_OHCI_CPU_INIT
1804         /* cpu dependant init */
1805         if(usb_cpu_init())
1806                 return -1;
1807 #endif
1808
1809 #ifdef CFG_USB_OHCI_BOARD_INIT
1810         /*  board dependant init */
1811         if(usb_board_init())
1812                 return -1;
1813 #endif
1814         memset (&gohci, 0, sizeof (ohci_t));
1815
1816         /* align the storage */
1817         if ((__u32)&ghcca[0] & 0xff) {
1818                 err("HCCA not aligned!!");
1819                 return -1;
1820         }
1821         phcca = &ghcca[0];
1822         info("aligned ghcca %p", phcca);
1823         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1824         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1825                 err("EDs not aligned!!");
1826                 return -1;
1827         }
1828         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1829         if ((__u32)gtd & 0x7) {
1830                 err("TDs not aligned!!");
1831                 return -1;
1832         }
1833         ptd = gtd;
1834         gohci.hcca = phcca;
1835         memset (phcca, 0, sizeof (struct ohci_hcca));
1836
1837         gohci.disabled = 1;
1838         gohci.sleeping = 0;
1839         gohci.irq = -1;
1840 #ifdef CONFIG_PCI_OHCI
1841         pdev = pci_find_devices(ohci_pci_ids, 0);
1842
1843         if (pdev != -1) {
1844                 u16 vid, did;
1845                 u32 base;
1846                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1847                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1848                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1849                                 vid, did, (pdev >> 16) & 0xff,
1850                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1851                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1852                 printf("OHCI regs address 0x%08x\n", base);
1853                 gohci.regs = (struct ohci_regs *)base;
1854         } else
1855                 return -1;
1856 #else
1857         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1858 #endif
1859
1860         gohci.flags = 0;
1861         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1862
1863         if (hc_reset (&gohci) < 0) {
1864                 hc_release_ohci (&gohci);
1865                 err ("can't reset usb-%s", gohci.slot_name);
1866 #ifdef CFG_USB_OHCI_BOARD_INIT
1867                 /* board dependant cleanup */
1868                 usb_board_init_fail();
1869 #endif
1870
1871 #ifdef CFG_USB_OHCI_CPU_INIT
1872                 /* cpu dependant cleanup */
1873                 usb_cpu_init_fail();
1874 #endif
1875                 return -1;
1876         }
1877
1878         /* FIXME this is a second HC reset; why?? */
1879         /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1880            wait_ms(10); */
1881         if (hc_start (&gohci) < 0) {
1882                 err ("can't start usb-%s", gohci.slot_name);
1883                 hc_release_ohci (&gohci);
1884                 /* Initialization failed */
1885 #ifdef CFG_USB_OHCI_BOARD_INIT
1886                 /* board dependant cleanup */
1887                 usb_board_stop();
1888 #endif
1889
1890 #ifdef CFG_USB_OHCI_CPU_INIT
1891                 /* cpu dependant cleanup */
1892                 usb_cpu_stop();
1893 #endif
1894                 return -1;
1895         }
1896
1897 #ifdef  DEBUG
1898         ohci_dump (&gohci, 1);
1899 #else
1900         wait_ms(1);
1901 #endif
1902         ohci_inited = 1;
1903         return 0;
1904 }
1905
1906 int usb_lowlevel_stop(void)
1907 {
1908         /* this gets called really early - before the controller has */
1909         /* even been initialized! */
1910         if (!ohci_inited)
1911                 return 0;
1912         /* TODO release any interrupts, etc. */
1913         /* call hc_release_ohci() here ? */
1914         hc_reset (&gohci);
1915
1916 #ifdef CFG_USB_OHCI_BOARD_INIT
1917         /* board dependant cleanup */
1918         if(usb_board_stop())
1919                 return -1;
1920 #endif
1921
1922 #ifdef CFG_USB_OHCI_CPU_INIT
1923         /* cpu dependant cleanup */
1924         if(usb_cpu_stop())
1925                 return -1;
1926 #endif
1927
1928         return 0;
1929 }
1930 #endif /* CONFIG_USB_OHCI_NEW */