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imported Ka-Ro specific additions to U-Boot 2009.08 for TX28
[karo-tx-uboot.git] / drivers / video / mx2fb.c
1 /*
2  * Copyright (C) 2010 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the MX53-EVK Freescale board.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21
22 #include <common.h>
23 #include <lcd.h>
24 #include <asm/arch/mx25-regs.h>
25 #include <asm/io.h>
26 #include <asm/errno.h>
27 #include <asm/errno.h>
28 #include <mx2fb.h>
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 void *lcd_base;                 /* Start of framebuffer memory  */
33 void *lcd_console_address;      /* Start of console buffer      */
34
35 int lcd_line_length;
36 int lcd_color_fg;
37 int lcd_color_bg;
38
39 short console_col;
40 short console_row;
41
42
43 void lcd_initcolregs(void)
44 {
45 }
46
47 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
48 {
49 }
50
51 void lcd_enable(void)
52 {
53 }
54
55 void lcd_disable(void)
56 {
57 }
58
59 void lcd_panel_disable(void)
60 {
61 }
62
63 void lcd_ctrl_init(void *lcdbase)
64 {
65         u32 ccm_ipg_cg, pcr;
66
67         /* LSSAR */
68         writel(gd->fb_base, LCDC_BASE + 0x00);
69         /* LSR = x << 20 + y */
70         writel(((panel_info.vl_col >> 4) << 20) + panel_info.vl_row,
71                 LCDC_BASE + 0x04);
72         /* LVPWR = x_res * 2 / 2 */
73         writel(panel_info.vl_col / 2, LCDC_BASE + 0x08);
74         /* LPCR =  To be fixed using Linux BSP Value for now */
75         switch (panel_info.vl_bpix) {
76         /* bpix = 4 (16bpp) */
77         case 4:
78                 pcr = LCDC_LPCR | (0x5 << 25);
79                 break;
80         default:
81                 pcr = LCDC_LPCR;
82                 break;
83         }
84
85         pcr |= (panel_info.vl_sync & FB_SYNC_CLK_LAT_FALL) ? 0x00200000 : 0;
86         pcr |= (panel_info.vl_sync & FB_SYNC_DATA_INVERT) ? 0x01000000 : 0;
87         pcr |= (panel_info.vl_sync & FB_SYNC_SHARP_MODE) ? 0x00000040 : 0;
88         pcr |= (panel_info.vl_sync & FB_SYNC_OE_LOW_ACT) ? 0x00100000 : 0;
89
90         pcr |= LCDC_LPCR_PCD;
91
92         writel(pcr, LCDC_BASE + 0x18);
93         /* LHCR = H Pulse width, Right and Left Margins */
94         writel(((panel_info.vl_hsync - 1) << 26) + \
95                 ((panel_info.vl_right_margin - 1) << 8) + \
96                 (panel_info.vl_left_margin - 3),
97                 LCDC_BASE + 0x1c);
98         /* LVCR = V Pulse width, lower and upper margins */
99         writel((panel_info.vl_vsync << 26) + \
100                 (panel_info.vl_lower_margin << 8) + \
101                 (panel_info.vl_upper_margin),
102                 LCDC_BASE + 0x20);
103         /* LSCR */
104         writel(LCDC_LSCR, LCDC_BASE + 0x28);
105         /* LRMCR */
106         writel(LCDC_LRMCR, LCDC_BASE + 0x34);
107         /* LDCR */
108         writel(LCDC_LDCR, LCDC_BASE + 0x30);
109         /* LPCCR = PWM */
110         writel(LCDC_LPCCR, LCDC_BASE + 0x2c);
111
112         /* On and off clock gating */
113         ccm_ipg_cg = readl(CCM_BASE + 0x10);
114
115         writel(ccm_ipg_cg&0xDFFFFFFF, CCM_BASE + 0x10);
116         writel(ccm_ipg_cg|0x20000000, CCM_BASE + 0x10);
117 }
118
119 ulong calc_fbsize(void)
120 {
121         return panel_info.vl_row * panel_info.vl_col * 2 \
122                 * NBITS(panel_info.vl_bpix) / 8;
123 }
124
125