include/configs/coreboot.h

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2008
   4  * Graeme Russ, graeme.russ@gmail.com.
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #include <asm/ibmpc.h>
  26 /*
  27  * board/config.h - configuration options, board specific
  28  */
  29
  30 #ifndef __CONFIG_H
  31 #define __CONFIG_H
  32
  33 /*
  34  * High Level Configuration Options
  35  * (easy to change)
  36  */
  37 #define CONFIG_SYS_COREBOOT
  38 #define CONFIG_SHOW_BOOT_PROGRESS
  39 #define CONFIG_LAST_STAGE_INIT
  40 #define CONFIG_SYS_VSNPRINTF
  41 #define CONFIG_INTEL_CORE_ARCH  /* Sandy bridge and ivy bridge chipsets. */
  42 #define CONFIG_ZBOOT_32
  43 #define CONFIG_PHYSMEM
  44
  45 /*-----------------------------------------------------------------------
  46  * Watchdog Configuration
  47  */
  48 #undef CONFIG_WATCHDOG
  49 #undef CONFIG_HW_WATCHDOG
  50
  51 /* SATA AHCI storage */
  52
  53 #define CONFIG_SCSI_AHCI
  54
  55 #ifdef CONFIG_SCSI_AHCI
  56 #define CONFIG_SYS_64BIT_LBA
  57 #define CONFIG_SATA_INTEL               1
  58 #define CONFIG_SCSI_DEV_LIST            {PCI_VENDOR_ID_INTEL, \
  59                         PCI_DEVICE_ID_INTEL_NM10_AHCI},       \
  60         {PCI_VENDOR_ID_INTEL,           \
  61                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
  62         {PCI_VENDOR_ID_INTEL, \
  63                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
  64         {PCI_VENDOR_ID_INTEL,           \
  65                         PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
  66
  67 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
  68 #define CONFIG_SYS_SCSI_MAX_LUN         1
  69 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  70                                          CONFIG_SYS_SCSI_MAX_LUN)
  71 #endif
  72
  73 /* Generic TPM interfaced through LPC bus */
  74 #define CONFIG_GENERIC_LPC_TPM
  75 #define CONFIG_TPM_TIS_BASE_ADDRESS        0xfed40000
  76
  77 /*-----------------------------------------------------------------------
  78  * Real Time Clock Configuration
  79  */
  80 #define CONFIG_RTC_MC146818
  81 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS  0
  82 #define CONFIG_SYS_ISA_IO      CONFIG_SYS_ISA_IO_BASE_ADDRESS
  83
  84 /*-----------------------------------------------------------------------
  85  * Serial Configuration
  86  */
  87 #define CONFIG_CONS_INDEX               1
  88 #define CONFIG_SYS_NS16550
  89 #define CONFIG_SYS_NS16550_SERIAL
  90 #define CONFIG_SYS_NS16550_REG_SIZE     1
  91 #define CONFIG_SYS_NS16550_CLK          1843200
  92 #define CONFIG_BAUDRATE                 9600
  93 #define CONFIG_SYS_BAUDRATE_TABLE       {300, 600, 1200, 2400, 4800, \
  94                                          9600, 19200, 38400, 115200}
  95 #define CONFIG_SYS_NS16550_COM1 UART0_BASE
  96 #define CONFIG_SYS_NS16550_COM2 UART1_BASE
  97 #define CONFIG_SYS_NS16550_PORT_MAPPED
  98
  99 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,eserial0\0" \
 100                                         "stdout=vga,eserial0,cbmem\0" \
 101                                         "stderr=vga,eserial0,cbmem\0"
 102
 103 #define CONFIG_CONSOLE_MUX
 104 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 105 #define CONFIG_SYS_STDIO_DEREGISTER
 106 #define CONFIG_CBMEM_CONSOLE
 107
 108 #define CONFIG_CMDLINE_EDITING
 109 #define CONFIG_COMMAND_HISTORY
 110 #define CONFIG_AUTOCOMPLETE
 111
 112 #define CONFIG_SUPPORT_VFAT
 113 /************************************************************
 114  * ATAPI support (experimental)
 115  ************************************************************/
 116 #define CONFIG_ATAPI
 117
 118 /************************************************************
 119  * DISK Partition support
 120  ************************************************************/
 121 #define CONFIG_EFI_PARTITION
 122 #define CONFIG_DOS_PARTITION
 123 #define CONFIG_MAC_PARTITION
 124 #define CONFIG_ISO_PARTITION            /* Experimental */
 125
 126 #define CONFIG_CMD_PART
 127 #define CONFIG_CMD_CBFS
 128 #define CONFIG_CMD_EXT4
 129 #define CONFIG_CMD_EXT4_WRITE
 130 #define CONFIG_PARTITION_UUIDS
 131
 132 /*-----------------------------------------------------------------------
 133  * Video Configuration
 134  */
 135 #define CONFIG_VIDEO
 136 #define CONFIG_VIDEO_COREBOOT
 137 #define CONFIG_VIDEO_SW_CURSOR
 138 #define VIDEO_FB_16BPP_WORD_SWAP
 139 #define CONFIG_I8042_KBD
 140 #define CONFIG_CFB_CONSOLE
 141 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 142
 143 /* x86 GPIOs are accessed through a PCI device */
 144 #define CONFIG_INTEL_ICH6_GPIO
 145
 146 /*-----------------------------------------------------------------------
 147  * Command line configuration.
 148  */
 149 #include <config_cmd_default.h>
 150
 151 #define CONFIG_CMD_BDI
 152 #define CONFIG_CMD_BOOTD
 153 #define CONFIG_CMD_CONSOLE
 154 #define CONFIG_CMD_DATE
 155 #define CONFIG_CMD_ECHO
 156 #undef CONFIG_CMD_FLASH
 157 #define CONFIG_CMD_FPGA
 158 #define CONFIG_CMD_GPIO
 159 #define CONFIG_CMD_IMI
 160 #undef CONFIG_CMD_IMLS
 161 #define CONFIG_CMD_IO
 162 #define CONFIG_CMD_IRQ
 163 #define CONFIG_CMD_ITEST
 164 #define CONFIG_CMD_LOADB
 165 #define CONFIG_CMD_LOADS
 166 #define CONFIG_CMD_MEMORY
 167 #define CONFIG_CMD_MISC
 168 #define CONFIG_CMD_NET
 169 #undef CONFIG_CMD_NFS
 170 #define CONFIG_CMD_PCI
 171 #define CONFIG_CMD_PING
 172 #define CONFIG_CMD_RUN
 173 #define CONFIG_CMD_SAVEENV
 174 #define CONFIG_CMD_SETGETDCR
 175 #define CONFIG_CMD_SOURCE
 176 #define CONFIG_CMD_XIMG
 177 #define CONFIG_CMD_SCSI
 178
 179 #define CONFIG_CMD_FAT
 180 #define CONFIG_CMD_EXT2
 181
 182 #define CONFIG_CMD_ZBOOT
 183
 184 #define CONFIG_BOOTDELAY        2
 185 #define CONFIG_BOOTARGS         \
 186         "root=/dev/sdb3 init=/sbin/init rootwait ro"
 187 #define CONFIG_BOOTCOMMAND      \
 188         "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
 189
 190
 191 #if defined(CONFIG_CMD_KGDB)
 192 #define CONFIG_KGDB_BAUDRATE                    115200
 193 #define CONFIG_KGDB_SER_INDEX                   2
 194 #endif
 195
 196 /*
 197  * Miscellaneous configurable options
 198  */
 199 #define CONFIG_SYS_LONGHELP
 200 #define CONFIG_SYS_PROMPT                       "boot > "
 201 #define CONFIG_SYS_CBSIZE                       256
 202 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + \
 203                                                  sizeof(CONFIG_SYS_PROMPT) + \
 204                                                  16)
 205 #define CONFIG_SYS_MAXARGS                      16
 206 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
 207
 208 #define CONFIG_SYS_MEMTEST_START                0x00100000
 209 #define CONFIG_SYS_MEMTEST_END                  0x01000000
 210 #define CONFIG_SYS_LOAD_ADDR                    0x100000
 211 #define CONFIG_SYS_HZ                           1000
 212 #define CONFIG_SYS_X86_ISR_TIMER
 213
 214 /*-----------------------------------------------------------------------
 215  * SDRAM Configuration
 216  */
 217 #define CONFIG_NR_DRAM_BANKS                    4
 218
 219 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
 220 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
 221 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
 222 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
 223 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
 224
 225 /*-----------------------------------------------------------------------
 226  * CPU Features
 227  */
 228
 229 #define CONFIG_SYS_GENERIC_TIMER
 230 #define CONFIG_SYS_PCAT_INTERRUPTS
 231 #define CONFIG_SYS_NUM_IRQS                     16
 232
 233 /*-----------------------------------------------------------------------
 234  * Memory organization:
 235  * 32kB Stack
 236  * 16kB Cache-As-RAM @ 0x19200000
 237  * 256kB Monitor
 238  * (128kB + Environment Sector Size) malloc pool
 239  */
 240 #define CONFIG_SYS_STACK_SIZE                   (32 * 1024)
 241 #define CONFIG_SYS_CAR_ADDR                     0x19200000
 242 #define CONFIG_SYS_CAR_SIZE                     (16 * 1024)
 243 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 244 #define CONFIG_SYS_MONITOR_LEN                  (256 * 1024)
 245 #define CONFIG_SYS_MALLOC_LEN                   (0x20000 + 128 * 1024)
 246
 247
 248 /* allow to overwrite serial and ethaddr */
 249 #define CONFIG_ENV_OVERWRITE
 250
 251 /*-----------------------------------------------------------------------
 252  * FLASH configuration
 253  */
 254 #define CONFIG_SYS_NO_FLASH
 255 #undef CONFIG_FLASH_CFI_DRIVER
 256 #define CONFIG_SYS_MAX_FLASH_SECT               1
 257 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 258
 259 /*-----------------------------------------------------------------------
 260  * Environment configuration
 261  */
 262 #define CONFIG_ENV_IS_NOWHERE
 263 #define CONFIG_ENV_SIZE                 0x01000
 264
 265 /*-----------------------------------------------------------------------
 266  * PCI configuration
 267  */
 268 #define CONFIG_PCI
 269
 270 #define CONFIG_EXTRA_ENV_SETTINGS \
 271         CONFIG_STD_DEVICES_SETTINGS
 272
 273 #endif  /* __CONFIG_H */