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1 /*
2  * Common configuration settings for IGEP technology based boards
3  *
4  * (C) Copyright 2012
5  * ISEE 2007 SL, <www.iseebcn.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+ 
8  */
9
10 #ifndef __IGEP00X0_H
11 #define __IGEP00X0_H
12
13 #include <asm/sizes.h>
14
15 /*
16  * High Level Configuration Options
17  */
18 #define CONFIG_OMAP             1       /* in a TI OMAP core */
19 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
20 #define CONFIG_OMAP_GPIO
21
22 #define CONFIG_SDRC     /* The chip has SDRC controller */
23
24 #include <asm/arch/cpu.h>
25 #include <asm/arch/omap3.h>
26 #include <asm/mach-types.h>
27
28 /*
29  * Display CPU and Board information
30  */
31 #define CONFIG_DISPLAY_CPUINFO          1
32 #define CONFIG_DISPLAY_BOARDINFO        1
33
34 /* Clock Defines */
35 #define V_OSCK                  26000000        /* Clock output from T2 */
36 #define V_SCLK                  (V_OSCK >> 1)
37
38 #define CONFIG_MISC_INIT_R
39
40 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
41 #define CONFIG_SETUP_MEMORY_TAGS        1
42 #define CONFIG_INITRD_TAG               1
43 #define CONFIG_REVISION_TAG             1
44
45 #define CONFIG_OF_LIBFDT
46 #define CONFIG_CMD_BOOTZ
47
48 /*
49  * NS16550 Configuration
50  */
51
52 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
53
54 #define CONFIG_SYS_NS16550
55 #define CONFIG_SYS_NS16550_SERIAL
56 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
57 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
58
59 /* select serial console configuration */
60 #define CONFIG_CONS_INDEX               3
61 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
62 #define CONFIG_SERIAL3                  3
63
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_BAUDRATE                 115200
67 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
68                                         115200}
69 #define CONFIG_GENERIC_MMC              1
70 #define CONFIG_MMC                      1
71 #define CONFIG_OMAP_HSMMC               1
72 #define CONFIG_DOS_PARTITION            1
73
74 /* define to enable boot progress via leds */
75 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
76     (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
77 #define CONFIG_SHOW_BOOT_PROGRESS
78 #endif
79
80 /* USB */
81 #define CONFIG_MUSB_UDC                 1
82 #define CONFIG_USB_OMAP3                1
83 #define CONFIG_TWL4030_USB              1
84
85 /* USB device configuration */
86 #define CONFIG_USB_DEVICE               1
87 #define CONFIG_USB_TTY                  1
88 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
89
90 /* Change these to suit your needs */
91 #define CONFIG_USBD_VENDORID            0x0451
92 #define CONFIG_USBD_PRODUCTID           0x5678
93 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
94 #define CONFIG_USBD_PRODUCT_NAME        "IGEP"
95
96 /* commands to include */
97 #include <config_cmd_default.h>
98
99 #define CONFIG_CMD_CACHE
100 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
101 #define CONFIG_CMD_FAT          /* FAT support                  */
102 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
103 #define CONFIG_CMD_MMC          /* MMC support                  */
104 #ifdef CONFIG_BOOT_ONENAND
105 #define CONFIG_CMD_ONENAND      /* ONENAND support              */
106 #endif
107 #ifdef CONFIG_BOOT_NAND
108 #define CONFIG_CMD_NAND
109 #endif
110 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
111     (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
112 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
113 #endif
114 #define CONFIG_CMD_DHCP
115 #define CONFIG_CMD_PING
116 #define CONFIG_CMD_NFS          /* NFS support                  */
117 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
118 #define CONFIG_MTD_DEVICE
119
120 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
121 #undef CONFIG_CMD_IMLS          /* List all found images        */
122
123 #define CONFIG_SYS_NO_FLASH
124 #define CONFIG_HARD_I2C                 1
125 #define CONFIG_SYS_I2C_SPEED            100000
126 #define CONFIG_SYS_I2C_SLAVE            1
127 #define CONFIG_DRIVER_OMAP34XX_I2C      1
128
129 /*
130  * TWL4030
131  */
132 #define CONFIG_TWL4030_POWER            1
133
134 #define CONFIG_BOOTDELAY                3
135
136 #define CONFIG_EXTRA_ENV_SETTINGS \
137         "usbtty=cdc_acm\0" \
138         "loadaddr=0x82000000\0" \
139         "usbtty=cdc_acm\0" \
140         "console=ttyO2,115200n8\0" \
141         "mpurate=auto\0" \
142         "vram=12M\0" \
143         "dvimode=1024x768MR-16@60\0" \
144         "defaultdisplay=dvi\0" \
145         "mmcdev=0\0" \
146         "mmcroot=/dev/mmcblk0p2 rw\0" \
147         "mmcrootfstype=ext4 rootwait\0" \
148         "nandroot=/dev/mtdblock4 rw\0" \
149         "nandrootfstype=jffs2\0" \
150         "mmcargs=setenv bootargs console=${console} " \
151                 "mpurate=${mpurate} " \
152                 "vram=${vram} " \
153                 "omapfb.mode=dvi:${dvimode} " \
154                 "omapfb.debug=y " \
155                 "omapdss.def_disp=${defaultdisplay} " \
156                 "root=${mmcroot} " \
157                 "rootfstype=${mmcrootfstype}\0" \
158         "nandargs=setenv bootargs console=${console} " \
159                 "mpurate=${mpurate} " \
160                 "vram=${vram} " \
161                 "omapfb.mode=dvi:${dvimode} " \
162                 "omapfb.debug=y " \
163                 "omapdss.def_disp=${defaultdisplay} " \
164                 "root=${nandroot} " \
165                 "rootfstype=${nandrootfstype}\0" \
166         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
167         "importbootenv=echo Importing environment from mmc ...; " \
168                 "env import -t $loadaddr $filesize\0" \
169         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
170         "mmcboot=echo Booting from mmc ...; " \
171                 "run mmcargs; " \
172                 "bootm ${loadaddr}\0" \
173         "nandboot=echo Booting from onenand ...; " \
174                 "run nandargs; " \
175                 "onenand read ${loadaddr} 280000 400000; " \
176                 "bootm ${loadaddr}\0" \
177
178 #define CONFIG_BOOTCOMMAND \
179         "mmc dev ${mmcdev}; if mmc rescan; then " \
180                 "echo SD/MMC found on device ${mmcdev};" \
181                 "if run loadbootenv; then " \
182                         "run importbootenv;" \
183                 "fi;" \
184                 "if test -n $uenvcmd; then " \
185                         "echo Running uenvcmd ...;" \
186                         "run uenvcmd;" \
187                 "fi;" \
188                 "if run loaduimage; then " \
189                         "run mmcboot;" \
190                 "fi;" \
191         "fi;" \
192         "run nandboot;" \
193
194 #define CONFIG_AUTO_COMPLETE            1
195
196 /*
197  * Miscellaneous configurable options
198  */
199 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
200 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
201 #define CONFIG_SYS_PROMPT               "U-Boot # "
202 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
203 /* Print Buffer Size */
204 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
205                                         sizeof(CONFIG_SYS_PROMPT) + 16)
206 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
207 /* Boot Argument Buffer Size */
208 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
209
210 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
211                                                                 /* works on */
212 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
213                                         0x01F00000) /* 31MB */
214
215 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
216                                                         /* load address */
217
218 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
219
220 /*
221  * OMAP3 has 12 GP timers, they can be driven by the system clock
222  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
223  * This rate is divided by a local divisor.
224  */
225 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
226 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
227 #define CONFIG_SYS_HZ                   1000
228
229 /*
230  * Physical Memory Map
231  *
232  */
233 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
234 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
235 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
236
237 /*
238  * FLASH and environment organization
239  */
240
241 #ifdef CONFIG_BOOT_ONENAND
242 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
243
244 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
245
246 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
247
248 #define CONFIG_ENV_IS_IN_ONENAND        1
249 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
250 #define CONFIG_ENV_ADDR                 ONENAND_ENV_OFFSET
251 #endif
252
253 #ifdef CONFIG_BOOT_NAND
254 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
255 #define CONFIG_NAND_OMAP_GPMC
256 #define CONFIG_SYS_NAND_BASE            NAND_BASE
257 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
258 #define CONFIG_ENV_OFFSET               0x260000 /* environment starts here */
259 #define CONFIG_ENV_IS_IN_NAND           1
260 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
261 #define CONFIG_ENV_ADDR                 NAND_ENV_OFFSET
262 #define CONFIG_SYS_MAX_NAND_DEVICE      1
263 #endif
264
265 /*
266  * Size of malloc() pool
267  */
268 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
269
270 /*
271  * SMSC911x Ethernet
272  */
273 #if defined(CONFIG_CMD_NET)
274 #define CONFIG_SMC911X
275 #define CONFIG_SMC911X_32_BIT
276 #define CONFIG_SMC911X_BASE     0x2C000000
277 #endif /* (CONFIG_CMD_NET) */
278
279 /*
280  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
281  * and older u-boot.bin with the new U-Boot SPL.
282  */
283 #define CONFIG_SYS_TEXT_BASE            0x80008000
284 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
285 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
286 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
287 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
288                                          CONFIG_SYS_INIT_RAM_SIZE - \
289                                          GENERATED_GBL_DATA_SIZE)
290
291 /* SPL */
292 #define CONFIG_SPL
293 #define CONFIG_SPL_FRAMEWORK
294 #define CONFIG_SPL_NAND_SIMPLE
295 #define CONFIG_SPL_TEXT_BASE            0x40200800
296 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)
297 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
298
299 /* move malloc and bss high to prevent clashing with the main image */
300 #define CONFIG_SYS_SPL_MALLOC_START     0x87000000
301 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
302 #define CONFIG_SPL_BSS_START_ADDR       0x87080000      /* end of minimum RAM */
303 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
304
305 /* MMC boot config */
306 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
307 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
308 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
309 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
310
311 #define CONFIG_SPL_BOARD_INIT
312 #define CONFIG_SPL_LIBCOMMON_SUPPORT
313 #define CONFIG_SPL_LIBDISK_SUPPORT
314 #define CONFIG_SPL_I2C_SUPPORT
315 #define CONFIG_SPL_LIBGENERIC_SUPPORT
316 #define CONFIG_SPL_MMC_SUPPORT
317 #define CONFIG_SPL_FAT_SUPPORT
318 #define CONFIG_SPL_SERIAL_SUPPORT
319
320 #define CONFIG_SPL_POWER_SUPPORT
321 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
322
323 #ifdef CONFIG_BOOT_ONENAND
324 #define CONFIG_SPL_ONENAND_SUPPORT
325
326 /* OneNAND boot config */
327 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
328 #define CONFIG_SYS_ONENAND_PAGE_SIZE    2048
329 #define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
330 #define CONFIG_SPL_ONENAND_LOAD_SIZE    \
331         (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
332
333 #endif
334
335 #ifdef CONFIG_BOOT_NAND
336 #define CONFIG_SPL_NAND_SUPPORT
337 #define CONFIG_SPL_NAND_BASE
338 #define CONFIG_SPL_NAND_DRIVERS
339 #define CONFIG_SPL_NAND_ECC
340
341 /* NAND boot config */
342 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
343 #define CONFIG_SYS_NAND_PAGE_COUNT      64
344 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
345 #define CONFIG_SYS_NAND_OOBSIZE         64
346 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
347 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
348 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
349                                                 10, 11, 12, 13}
350 #define CONFIG_SYS_NAND_ECCSIZE         512
351 #define CONFIG_SYS_NAND_ECCBYTES        3
352 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
353 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
354 #endif
355
356 #endif /* __IGEP00X0_H */