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1 /*
2  * (C) Copyright 2009
3  * Marvell Semiconductor <www.marvell.com>
4  * Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * (C) Copyright 2009
7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8  *
9  * (C) Copyright 2010-2011
10  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11  *
12  * SPDX-License-Identifier:     GPL-2.0+
13  */
14
15 /*
16  * for linking errors see
17  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
18  */
19
20 #ifndef _CONFIG_KM_ARM_H
21 #define _CONFIG_KM_ARM_H
22
23 #define CONFIG_SYS_GENERIC_BOARD
24
25 /* We got removed from Linux mach-types.h */
26 #define MACH_TYPE_KM_KIRKWOOD          2255
27
28 /*
29  * High Level Configuration Options (easy to change)
30  */
31 #define CONFIG_MARVELL
32 #define CONFIG_FEROCEON_88FR131         /* CPU Core subversion */
33 #define CONFIG_KW88F6281                /* SOC Name */
34 #define CONFIG_MACH_KM_KIRKWOOD         /* Machine type */
35
36 #define CONFIG_MACH_TYPE        MACH_TYPE_KM_KIRKWOOD
37
38 #define CONFIG_NAND_ECC_BCH
39 #define CONFIG_BCH
40
41 /* include common defines/options for all Keymile boards */
42 #include "keymile-common.h"
43
44 #define CONFIG_CMD_NAND
45 #define CONFIG_CMD_SF
46
47 /* SPI NOR Flash default params, used by sf commands */
48 #define CONFIG_SF_DEFAULT_SPEED         8100000
49 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_3
50
51 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
52 #define CONFIG_ENV_SPI_BUS              0
53 #define CONFIG_ENV_SPI_CS               0
54 #define CONFIG_ENV_SPI_MAX_HZ           8100000
55 #define CONFIG_ENV_SPI_MODE             SPI_MODE_3
56 #endif
57
58 /* Reserve 4 MB for malloc */
59 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
60
61 #include "asm/arch/config.h"
62
63 #define CONFIG_SYS_TEXT_BASE    0x07d00000      /* code address before reloc */
64 #define CONFIG_SYS_MEMTEST_START 0x00400000     /* 4M */
65 #define CONFIG_SYS_MEMTEST_END  0x007fffff      /*(_8M -1) */
66 #define CONFIG_SYS_LOAD_ADDR    0x00800000      /* default load adr- 8M */
67
68 /* pseudo-non volatile RAM [hex] */
69 #define CONFIG_KM_PNVRAM        0x80000
70 /* physical RAM MTD size [hex] */
71 #define CONFIG_KM_PHRAM         0x17F000
72
73 #define CONFIG_KM_CRAMFS_ADDR   0x2400000
74 #define CONFIG_KM_KERNEL_ADDR   0x2000000       /* 3098KBytes */
75 #define CONFIG_KM_FDT_ADDR      0x23E0000       /*  128KBytes */
76
77 /* architecture specific default bootargs */
78 #define CONFIG_KM_DEF_BOOT_ARGS_CPU                                     \
79                 "bootcountaddr=${bootcountaddr} ${mtdparts}"            \
80                 " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
81
82 #define CONFIG_KM_DEF_ENV_CPU                                           \
83         "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"           \
84         CONFIG_KM_UPDATE_UBOOT                                          \
85         "set_fdthigh=setenv fdt_high ${kernelmem}\0"                    \
86         ""
87
88 #define CONFIG_SKIP_LOWLEVEL_INIT       /* disable board lowlevel_init */
89 #define CONFIG_MISC_INIT_R
90
91 /* Pass open firmware flat tree */
92 #define CONFIG_OF_LIBFDT
93
94 /*
95  * NS16550 Configuration
96  */
97 #define CONFIG_SYS_NS16550
98 #define CONFIG_SYS_NS16550_SERIAL
99 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
100 #define CONFIG_SYS_NS16550_CLK          CONFIG_SYS_TCLK
101 #define CONFIG_SYS_NS16550_COM1         KW_UART0_BASE
102 #define CONFIG_SYS_NS16550_COM2         KW_UART1_BASE
103
104 /*
105  * Serial Port configuration
106  * The following definitions let you select what serial you want to use
107  * for your console driver.
108  */
109
110 #define CONFIG_CONS_INDEX       1       /* Console on UART0 */
111
112 /*
113  * For booting Linux, the board info and command line data
114  * have to be in the first 8 MB of memory, since this is
115  * the maximum mapped by the Linux kernel during initialization.
116  */
117 #define CONFIG_BOOTMAPSZ        (8 << 20)       /* Initial Memmap for Linux */
118 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs  */
119 #define CONFIG_INITRD_TAG               /* enable INITRD tag */
120 #define CONFIG_SETUP_MEMORY_TAGS        /* enable memory tag */
121
122 /*
123  * Commands configuration
124  */
125 #define CONFIG_CMD_ELF
126 #define CONFIG_CMD_MTDPARTS
127
128 /*
129  * Without NOR FLASH we need this
130  */
131 #define CONFIG_SYS_NO_FLASH
132
133 /*
134  * NAND Flash configuration
135  */
136 #define CONFIG_SYS_MAX_NAND_DEVICE      1
137
138 #define BOOTFLASH_START         0x0
139
140 /* Kirkwood has two serial IF */
141 #if (CONFIG_CONS_INDEX == 2)
142 #define CONFIG_KM_CONSOLE_TTY   "ttyS1"
143 #else
144 #define CONFIG_KM_CONSOLE_TTY   "ttyS0"
145 #endif
146
147 /*
148  * Other required minimal configurations
149  */
150 #define CONFIG_CONSOLE_INFO_QUIET       /* some code reduction */
151 #define CONFIG_ARCH_CPU_INIT            /* call arch_cpu_init() */
152 #define CONFIG_ARCH_MISC_INIT           /* call arch_misc_init() */
153 #define CONFIG_DISPLAY_CPUINFO          /* Display cpu info */
154 #define CONFIG_NR_DRAM_BANKS    4
155 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000     /* Rst Vector Adr */
156
157 /*
158  * Ethernet Driver configuration
159  */
160 #define CONFIG_NETCONSOLE       /* include NetConsole support   */
161 #define CONFIG_MII              /* expose smi ove miiphy interface */
162 #define CONFIG_CMD_MII          /* to debug mdio phy config */
163 #define CONFIG_MVGBE            /* Enable Marvell Gbe Controller Driver */
164 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
165 #define CONFIG_MVGBE_PORTS      {1, 0}  /* enable port 0 only */
166 #define CONFIG_PHY_BASE_ADR     0
167 #define CONFIG_ENV_OVERWRITE    /* ethaddr can be reprogrammed */
168 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
169
170 /*
171  * UBI related stuff
172  */
173 #define CONFIG_SYS_USE_UBI
174
175 /*
176  * I2C related stuff
177  */
178 #undef CONFIG_I2C_MVTWSI
179 #define CONFIG_SYS_I2C
180 #define CONFIG_SYS_I2C_SOFT     /* I2C bit-banged       */
181 #define CONFIG_SYS_I2C_INIT_BOARD
182
183 #define CONFIG_KIRKWOOD_GPIO            /* Enable GPIO Support */
184 #define CONFIG_SYS_NUM_I2C_BUSES        6
185 #define CONFIG_SYS_I2C_MAX_HOPS         1
186 #define CONFIG_SYS_I2C_BUSES    {       {0, {I2C_NULL_HOP} }, \
187                                         {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
188                                         {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
189                                         {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
190                                         {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
191                                         {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
192                                 }
193
194 #ifndef __ASSEMBLY__
195 #include <asm/arch/gpio.h>
196 extern void __set_direction(unsigned pin, int high);
197 void set_sda(int state);
198 void set_scl(int state);
199 int get_sda(void);
200 int get_scl(void);
201 #define KM_KIRKWOOD_SDA_PIN     8
202 #define KM_KIRKWOOD_SCL_PIN     9
203 #define KM_KIRKWOOD_SOFT_I2C_GPIOS      0x0300
204 #define KM_KIRKWOOD_ENV_WP      38
205
206 #define I2C_ACTIVE      __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
207 #define I2C_TRISTATE    __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
208 #define I2C_READ        (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
209 #define I2C_SDA(bit)    kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
210 #define I2C_SCL(bit)    kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
211 #endif
212
213 #define I2C_DELAY       udelay(1)
214 #define I2C_SOFT_DECLARATIONS
215
216 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x0
217 #define CONFIG_SYS_I2C_SOFT_SPEED       100000
218
219 /* EEprom support 24C128, 24C256 valid for environment eeprom */
220 #define CONFIG_SYS_I2C_MULTI_EEPROMS
221 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
222 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6 /* 64 Byte write page */
223 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10
224
225 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
226 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
227
228 /*
229  *  Environment variables configurations
230  */
231 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
232 #define CONFIG_ENV_IS_IN_SPI_FLASH  /* use SPI-Flash for environment vars */
233 #define CONFIG_ENV_OFFSET               0xc0000     /* no bracets! */
234 #define CONFIG_ENV_SIZE                 0x02000     /* Size of Environment */
235 #define CONFIG_ENV_SECT_SIZE            0x10000
236 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
237                                         CONFIG_ENV_SECT_SIZE)
238 #define CONFIG_ENV_TOTAL_SIZE           0x20000     /* no bracets! */
239 #else
240 #define CONFIG_ENV_IS_IN_EEPROM         /* use EEPROM for environment vars */
241 #define CONFIG_SYS_DEF_EEPROM_ADDR      0x50
242 #define CONFIG_ENV_EEPROM_IS_ON_I2C
243 #define CONFIG_SYS_EEPROM_WREN
244 #define CONFIG_ENV_OFFSET               0x0 /* no bracets! */
245 #define CONFIG_ENV_SIZE                 (0x2000 - CONFIG_ENV_OFFSET)
246 #define CONFIG_I2C_ENV_EEPROM_BUS       KM_ENV_BUS
247 #define CONFIG_ENV_OFFSET_REDUND        0x2000 /* no bracets! */
248 #define CONFIG_ENV_SIZE_REDUND          (CONFIG_ENV_SIZE)
249 #endif
250
251 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
252
253 #define CONFIG_SPI_FLASH_STMICRO
254
255 /* SPI bus claim MPP configuration */
256 #define CONFIG_SYS_KW_SPI_MPP   0x0
257
258 #define FLASH_GPIO_PIN                  0x00010000
259 #define KM_FLASH_GPIO_PIN       16
260
261 #ifndef MTDIDS_DEFAULT
262 # define MTDIDS_DEFAULT         "nand0=orion_nand"
263 #endif /* MTDIDS_DEFAULT */
264
265 #ifndef MTDPARTS_DEFAULT
266 # define MTDPARTS_DEFAULT       "mtdparts="                     \
267         "orion_nand:"                                           \
268                 "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
269 #endif /* MTDPARTS_DEFAULT */
270
271 #define CONFIG_KM_UPDATE_UBOOT                                          \
272         "update="                                                       \
273                 "sf probe 0;sf erase 0 +${filesize};"                   \
274                 "sf write ${load_addr_r} 0 ${filesize};\0"
275
276 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
277 #define CONFIG_KM_NEW_ENV                                               \
278         "newenv=sf probe 0;"                                            \
279                 "sf erase " __stringify(CONFIG_ENV_OFFSET) " "          \
280                 __stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
281 #else
282 #define CONFIG_KM_NEW_ENV                                               \
283         "newenv=setenv addr 0x100000 && "                               \
284                 "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; "  \
285                 "mw.b ${addr} 0 4 && "                                  \
286                 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
287                 " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "     \
288                 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
289                 " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
290 #endif
291
292 #ifndef CONFIG_KM_BOARD_EXTRA_ENV
293 #define CONFIG_KM_BOARD_EXTRA_ENV       ""
294 #endif
295
296 /*
297  * Default environment variables
298  */
299 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
300         CONFIG_KM_BOARD_EXTRA_ENV                                       \
301         CONFIG_KM_DEF_ENV                                               \
302         CONFIG_KM_NEW_ENV                                               \
303         "arch=arm\0"                                                    \
304         ""
305
306 #if defined(CONFIG_SYS_NO_FLASH)
307 #undef  CONFIG_FLASH_CFI_MTD
308 #undef  CONFIG_JFFS2_CMDLINE
309 #endif
310
311 /* additions for new relocation code, must be added to all boards */
312 #define CONFIG_SYS_SDRAM_BASE           0x00000000
313 /* Do early setups now in board_init_f() */
314 #define CONFIG_BOARD_EARLY_INIT_F
315
316 /*
317  * resereved pram area at the end of memroy [hex]
318  * 8Mbytes for switch + 4Kbytes for bootcount
319  */
320 #define CONFIG_KM_RESERVED_PRAM 0x801000
321 /* address for the bootcount (taken from end of RAM) */
322 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
323 /* Use generic bootcount RAM driver */
324 #define CONFIG_BOOTCOUNT_RAM
325
326 /* enable POST tests */
327 #define CONFIG_POST     (CONFIG_SYS_POST_MEM_REGIONS)
328 #define CONFIG_POST_SKIP_ENV_FLAGS
329 #define CONFIG_POST_EXTERNAL_WORD_FUNCS
330 #define CONFIG_CMD_DIAG
331
332 /* we do the whole PCIe FPGA config stuff here */
333 #define CONFIG_BOARD_LATE_INIT
334
335 #endif /* _CONFIG_KM_ARM_H */