]> git.kernelconcepts.de Git - karo-tx-uboot.git/blob - include/configs/omap3_beagle.h
Removed unused define, CONFIG_ARMV7.
[karo-tx-uboot.git] / include / configs / omap3_beagle.h
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * Configuration settings for the TI OMAP3530 Beagle board.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27
28 #ifndef __CONFIG_H
29 #define __CONFIG_H
30
31 /*
32  * High Level Configuration Options
33  */
34 #define CONFIG_OMAP             1       /* in a TI OMAP core */
35 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
36 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
37 #define CONFIG_OMAP3_BEAGLE     1       /* working with BEAGLE */
38
39 #define CONFIG_SDRC     /* The chip has SDRC controller */
40
41 #include <asm/arch/cpu.h>               /* get chip and board defs */
42 #include <asm/arch/omap3.h>
43
44 /*
45  * Display CPU and Board information
46  */
47 #define CONFIG_DISPLAY_CPUINFO          1
48 #define CONFIG_DISPLAY_BOARDINFO        1
49
50 /* Clock Defines */
51 #define V_OSCK                  26000000        /* Clock output from T2 */
52 #define V_SCLK                  (V_OSCK >> 1)
53
54 #undef CONFIG_USE_IRQ                           /* no support for IRQs */
55 #define CONFIG_MISC_INIT_R
56
57 #define CONFIG_OF_LIBFDT                1
58
59 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
60 #define CONFIG_SETUP_MEMORY_TAGS        1
61 #define CONFIG_INITRD_TAG               1
62 #define CONFIG_REVISION_TAG             1
63
64 /*
65  * Size of malloc() pool
66  */
67 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
68                                                 /* Sector */
69 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
70
71 /*
72  * Hardware drivers
73  */
74
75 /*
76  * NS16550 Configuration
77  */
78 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
79
80 #define CONFIG_SYS_NS16550
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
83 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
84
85 /*
86  * select serial console configuration
87  */
88 #define CONFIG_CONS_INDEX               3
89 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
90 #define CONFIG_SERIAL3                  3       /* UART3 on Beagle Rev 2 */
91
92 /* allow to overwrite serial and ethaddr */
93 #define CONFIG_ENV_OVERWRITE
94 #define CONFIG_BAUDRATE                 115200
95 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
96                                         115200}
97 #define CONFIG_GENERIC_MMC              1
98 #define CONFIG_MMC                      1
99 #define CONFIG_OMAP_HSMMC               1
100 #define CONFIG_DOS_PARTITION            1
101
102 /* Status LED */
103 #define CONFIG_STATUS_LED               1
104 #define CONFIG_BOARD_SPECIFIC_LED       1
105 #define STATUS_LED_BIT                  0x01
106 #define STATUS_LED_STATE                STATUS_LED_ON
107 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
108 #define STATUS_LED_BIT1                 0x02
109 #define STATUS_LED_STATE1               STATUS_LED_ON
110 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
111 #define STATUS_LED_BOOT                 STATUS_LED_BIT
112 #define STATUS_LED_GREEN                STATUS_LED_BIT1
113
114 /* DDR - I use Micron DDR */
115 #define CONFIG_OMAP3_MICRON_DDR         1
116
117 /* USB */
118 #define CONFIG_MUSB_UDC                 1
119 #define CONFIG_USB_OMAP3                1
120 #define CONFIG_TWL4030_USB              1
121
122 /* USB device configuration */
123 #define CONFIG_USB_DEVICE               1
124 #define CONFIG_USB_TTY                  1
125 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
126
127 /* USB EHCI */
128 #define CONFIG_CMD_USB
129 #define CONFIG_USB_EHCI
130 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
131
132 /* commands to include */
133 #include <config_cmd_default.h>
134
135 #define CONFIG_CMD_CACHE
136 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
137 #define CONFIG_CMD_FAT          /* FAT support                  */
138 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
139 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
140 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
141 #define MTDIDS_DEFAULT                  "nand0=nand"
142 #define MTDPARTS_DEFAULT                "mtdparts=nand:512k(x-loader),"\
143                                         "1920k(u-boot),128k(u-boot-env),"\
144                                         "4m(kernel),-(fs)"
145
146 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
147 #define CONFIG_CMD_MMC          /* MMC support                  */
148 #define CONFIG_USB_STORAGE      /* USB storage support          */
149 #define CONFIG_CMD_NAND         /* NAND support                 */
150 #define CONFIG_CMD_LED          /* LED support                  */
151
152 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
153 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
154 #undef CONFIG_CMD_IMI           /* iminfo                       */
155 #undef CONFIG_CMD_IMLS          /* List all found images        */
156 #undef CONFIG_CMD_NET           /* bootp, tftpboot, rarpboot    */
157 #undef CONFIG_CMD_NFS           /* NFS support                  */
158
159 #define CONFIG_SYS_NO_FLASH
160 #define CONFIG_HARD_I2C                 1
161 #define CONFIG_SYS_I2C_SPEED            100000
162 #define CONFIG_SYS_I2C_SLAVE            1
163 #define CONFIG_SYS_I2C_BUS              0
164 #define CONFIG_SYS_I2C_BUS_SELECT       1
165 #define CONFIG_I2C_MULTI_BUS            1
166 #define CONFIG_DRIVER_OMAP34XX_I2C      1
167
168 /*
169  * TWL4030
170  */
171 #define CONFIG_TWL4030_POWER            1
172 #define CONFIG_TWL4030_LED              1
173
174 /*
175  * Board NAND Info.
176  */
177 #define CONFIG_SYS_NAND_QUIET_TEST      1
178 #define CONFIG_NAND_OMAP_GPMC
179 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
180                                                         /* to access nand */
181 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
182                                                         /* to access nand at */
183                                                         /* CS0 */
184 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
185
186 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
187                                                         /* devices */
188 #define CONFIG_JFFS2_NAND
189 /* nand device jffs2 lives on */
190 #define CONFIG_JFFS2_DEV                "nand0"
191 /* start of jffs2 partition */
192 #define CONFIG_JFFS2_PART_OFFSET        0x680000
193 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
194                                                         /* partition */
195
196 /* Environment information */
197 #define CONFIG_BOOTDELAY                10
198
199 #define CONFIG_EXTRA_ENV_SETTINGS \
200         "loadaddr=0x82000000\0" \
201         "usbtty=cdc_acm\0" \
202         "console=ttyS2,115200n8\0" \
203         "mpurate=auto\0" \
204         "vram=12M\0" \
205         "dvimode=1024x768MR-16@60\0" \
206         "defaultdisplay=dvi\0" \
207         "mmcdev=0\0" \
208         "mmcroot=/dev/mmcblk0p2 rw\0" \
209         "mmcrootfstype=ext3 rootwait\0" \
210         "nandroot=/dev/mtdblock4 rw\0" \
211         "nandrootfstype=jffs2\0" \
212         "mmcargs=setenv bootargs console=${console} " \
213                 "mpurate=${mpurate} " \
214                 "vram=${vram} " \
215                 "omapfb.mode=dvi:${dvimode} " \
216                 "omapfb.debug=y " \
217                 "omapdss.def_disp=${defaultdisplay} " \
218                 "root=${mmcroot} " \
219                 "rootfstype=${mmcrootfstype}\0" \
220         "nandargs=setenv bootargs console=${console} " \
221                 "mpurate=${mpurate} " \
222                 "vram=${vram} " \
223                 "omapfb.mode=dvi:${dvimode} " \
224                 "omapfb.debug=y " \
225                 "omapdss.def_disp=${defaultdisplay} " \
226                 "root=${nandroot} " \
227                 "rootfstype=${nandrootfstype}\0" \
228         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
229         "importbootenv=echo Importing environment from mmc ...; " \
230                 "env import -t $loadaddr $filesize\0" \
231         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
232         "mmcboot=echo Booting from mmc ...; " \
233                 "run mmcargs; " \
234                 "bootm ${loadaddr}\0" \
235         "nandboot=echo Booting from nand ...; " \
236                 "run nandargs; " \
237                 "nand read ${loadaddr} 280000 400000; " \
238                 "bootm ${loadaddr}\0" \
239
240 #define CONFIG_BOOTCOMMAND \
241         "if mmc rescan ${mmcdev}; then " \
242                 "echo SD/MMC found on device ${mmcdev};" \
243                 "if run loadbootenv; then " \
244                         "run importbootenv;" \
245                 "fi;" \
246                 "if test -n $uenvcmd; then " \
247                         "echo Running uenvcmd ...;" \
248                         "run uenvcmd;" \
249                 "fi;" \
250                 "if run loaduimage; then " \
251                         "run mmcboot;" \
252                 "fi;" \
253         "fi;" \
254         "run nandboot;" \
255
256 #define CONFIG_AUTO_COMPLETE            1
257 /*
258  * Miscellaneous configurable options
259  */
260 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
261 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
262 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
263 #define CONFIG_SYS_PROMPT               "OMAP3 beagleboard.org # "
264 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
265 /* Print Buffer Size */
266 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
267                                         sizeof(CONFIG_SYS_PROMPT) + 16)
268 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
269 /* Boot Argument Buffer Size */
270 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
271
272 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
273                                                                 /* works on */
274 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
275                                         0x01F00000) /* 31MB */
276
277 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
278                                                         /* load address */
279
280 /*
281  * OMAP3 has 12 GP timers, they can be driven by the system clock
282  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
283  * This rate is divided by a local divisor.
284  */
285 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
286 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
287 #define CONFIG_SYS_HZ                   1000
288
289 /*-----------------------------------------------------------------------
290  * Stack sizes
291  *
292  * The stack sizes are set up in start.S using the settings below
293  */
294 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
295 #ifdef CONFIG_USE_IRQ
296 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
297 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
298 #endif
299
300 /*-----------------------------------------------------------------------
301  * Physical Memory Map
302  */
303 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
304 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
305 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
306 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
307
308 /* SDRAM Bank Allocation method */
309 #define SDRC_R_B_C              1
310
311 /*-----------------------------------------------------------------------
312  * FLASH and environment organization
313  */
314
315 /* **** PISMO SUPPORT *** */
316
317 /* Configure the PISMO */
318 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
319 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
320
321 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
322
323 #if defined(CONFIG_CMD_NAND)
324 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
325 #endif
326
327 /* Monitor at start of flash */
328 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
329 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
330
331 #define CONFIG_ENV_IS_IN_NAND           1
332 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
333 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
334
335 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
336 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
337 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
338
339 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
340 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
341 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
342 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
343                                          CONFIG_SYS_INIT_RAM_SIZE - \
344                                          GENERATED_GBL_DATA_SIZE)
345
346 #define CONFIG_OMAP3_SPI
347
348 #endif /* __CONFIG_H */