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1 /*
2  * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
3  *
4  * Configuration settings for the Dave/DENX QongEVB-LITE board.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21
22 #ifndef __CONFIG_H
23 #define __CONFIG_H
24
25 #include <asm/arch/imx-regs.h>
26
27 /* High Level Configuration Options */
28 #define CONFIG_ARM1136                  /* This is an arm1136 CPU core */
29 #define CONFIG_MX31                     /* in a mx31 */
30 #define CONFIG_QONG
31 #define CONFIG_MX31_HCLK_FREQ   26000000        /* 26MHz */
32 #define CONFIG_MX31_CLK32       32768
33
34 #define CONFIG_DISPLAY_CPUINFO
35 #define CONFIG_DISPLAY_BOARDINFO
36
37 #define CONFIG_SYS_TEXT_BASE 0xa0000000
38
39 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
40 #define CONFIG_SETUP_MEMORY_TAGS
41 #define CONFIG_INITRD_TAG
42
43 /*
44  * Size of malloc() pool
45  */
46 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1536 * 1024)
47
48 /*
49  * Hardware drivers
50  */
51
52 #define CONFIG_MXC_UART
53 #define CONFIG_MXC_UART_BASE    UART1_BASE
54
55 #define CONFIG_MXC_GPIO
56 #define CONFIG_HW_WATCHDOG
57
58 #define CONFIG_MXC_SPI
59 #define CONFIG_DEFAULT_SPI_BUS  1
60 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
61 #define CONFIG_RTC_MC13XXX
62
63 #define CONFIG_PMIC
64 #define CONFIG_PMIC_SPI
65 #define CONFIG_PMIC_FSL
66 #define CONFIG_FSL_PMIC_BUS     1
67 #define CONFIG_FSL_PMIC_CS      0
68 #define CONFIG_FSL_PMIC_CLK     100000
69 #define CONFIG_FSL_PMIC_MODE    (SPI_MODE_0 | SPI_CS_HIGH)
70 #define CONFIG_FSL_PMIC_BITLEN  32
71
72 /* FPGA */
73 #define CONFIG_FPGA
74 #define CONFIG_QONG_FPGA
75 #define CONFIG_FPGA_BASE        (CS1_BASE)
76 #define CONFIG_FPGA_LATTICE
77 #define CONFIG_FPGA_COUNT       1
78
79 #ifdef CONFIG_QONG_FPGA
80 /* Ethernet */
81 #define CONFIG_DNET
82 #define CONFIG_DNET_BASE        (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
83
84 /* Framebuffer and LCD */
85 #define CONFIG_VIDEO
86 #define CONFIG_CFB_CONSOLE
87 #define CONFIG_VIDEO_MX3
88 #define CONFIG_VIDEO_LOGO
89 #define CONFIG_VIDEO_SW_CURSOR
90 #define CONFIG_VGA_AS_SINGLE_DEVICE
91 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
92 #define CONFIG_SPLASH_SCREEN
93 #define CONFIG_CMD_BMP
94 #define CONFIG_BMP_16BPP
95 #define CONFIG_VIDEO_BMP_GZIP
96 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (512 << 10)
97
98 /* USB */
99 #define CONFIG_CMD_USB
100 #ifdef CONFIG_CMD_USB
101 #define CONFIG_USB_EHCI                 /* Enable EHCI USB support */
102 #define CONFIG_USB_EHCI_MXC
103 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
104 #define CONFIG_MXC_USB_PORT     2
105 #define CONFIG_MXC_USB_PORTSC   (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT)
106 #define CONFIG_MXC_USB_FLAGS    MXC_EHCI_POWER_PINS_ENABLED
107 #define CONFIG_EHCI_IS_TDI
108 #define CONFIG_USB_STORAGE
109 #define CONFIG_DOS_PARTITION
110 #define CONFIG_SUPPORT_VFAT
111 #define CONFIG_CMD_EXT2
112 #define CONFIG_CMD_FAT
113 #endif /* CONFIG_CMD_USB */
114
115 /*
116  * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
117  * initial TFTP transfer, should the user wish one, significantly.
118  */
119 #define CONFIG_ARP_TIMEOUT      200UL
120
121 #endif /* CONFIG_QONG_FPGA */
122
123 #define CONFIG_CONS_INDEX       1
124 #define CONFIG_BAUDRATE         115200
125
126 /***********************************************************
127  * Command definition
128  ***********************************************************/
129
130 #include <config_cmd_default.h>
131
132 #define CONFIG_CMD_CACHE
133 #define CONFIG_CMD_DATE
134 #define CONFIG_CMD_DHCP
135 #define CONFIG_CMD_MII
136 #define CONFIG_CMD_NAND
137 #define CONFIG_CMD_NET
138 #define CONFIG_CMD_PING
139 #define CONFIG_CMD_SETEXPR
140 #define CONFIG_CMD_SPI
141 #define CONFIG_CMD_UNZIP
142
143 #define CONFIG_BOARD_LATE_INIT
144
145 #define CONFIG_BOOTDELAY        5
146
147 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
148
149 #define xstr(s) str(s)
150 #define str(s)  #s
151
152 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
153         "netdev=eth0\0"                                                 \
154         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
155                 "nfsroot=${serverip}:${rootpath}\0"                     \
156         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
157         "addip=setenv bootargs ${bootargs} "                            \
158                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
159                 ":${hostname}:${netdev}:off panic=1\0"                  \
160         "addtty=setenv bootargs ${bootargs}"                            \
161                 " console=ttymxc0,${baudrate}\0"                        \
162         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
163         "addmisc=setenv bootargs ${bootargs}\0"                         \
164         "uboot_addr=A0000000\0"                                         \
165         "kernel_addr=A00C0000\0"                                        \
166         "ramdisk_addr=A0300000\0"                                       \
167         "u-boot=qong/u-boot.bin\0"                                      \
168         "kernel_addr_r=80800000\0"                                      \
169         "hostname=qong\0"                                               \
170         "bootfile=qong/uImage\0"                                        \
171         "rootpath=/opt/eldk-4.2-arm/armVFP\0"                           \
172         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
173                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
174         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
175                 "bootm ${kernel_addr}\0"                                \
176         "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
177                 "run nfsargs addip addtty addmtd addmisc;"              \
178                 "bootm\0"                                               \
179         "bootcmd=run flash_self\0"                                      \
180         "load=tftp ${loadaddr} ${u-boot}\0"                             \
181         "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE)             \
182                 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE)      \
183                 " +${filesize};cp.b ${fileaddr} "                       \
184                 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"          \
185         "upd=run load update\0"                                         \
186         "videomode=video=ctfb:x:640,y:480,depth:16,mode:0,pclk:40000,"  \
187                 "le:120,ri:40,up:35,lo:10,hs:30,vs:3,sync:100663296,"   \
188                 "vmode:0\0"                                             \
189
190 /*
191  * Miscellaneous configurable options
192  */
193 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
194 #define CONFIG_SYS_PROMPT               "=> "
195 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
196 /* Print Buffer Size */
197 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
198                 sizeof(CONFIG_SYS_PROMPT) + 16)
199 #define CONFIG_SYS_MAXARGS              32      /* max number of command args */
200 /* Boot Argument Buffer Size */
201 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
202
203 /* memtest works on first 255MB of RAM */
204 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM_1
205 #define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM_1 + 0xff000000)
206
207 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
208
209 #define CONFIG_SYS_HZ                   1000
210
211 #define CONFIG_CMDLINE_EDITING
212 #define CONFIG_SYS_HUSH_PARSER                  /* Use the HUSH parser */
213
214 #define CONFIG_MISC_INIT_R
215
216 /*-----------------------------------------------------------------------
217  * Physical Memory Map
218  */
219 #define CONFIG_NR_DRAM_BANKS    1
220 #define PHYS_SDRAM_1            CSD0_BASE
221 #define PHYS_SDRAM_1_SIZE       0x10000000      /* 256 MB */
222
223 /*
224  * NAND driver
225  */
226
227 #ifndef __ASSEMBLY__
228 extern void qong_nand_plat_init(void *chip);
229 extern int qong_nand_rdy(void *chip);
230 #endif
231 #define CONFIG_NAND_PLAT
232 #define CONFIG_SYS_MAX_NAND_DEVICE     1
233 #define CONFIG_SYS_NAND_BASE    CS3_BASE
234 #define NAND_PLAT_INIT() qong_nand_plat_init(nand)
235
236 #define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
237 #define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
238 #define QONG_NAND_WRITE(addr, cmd) \
239         do { \
240                 __REG8(addr) = cmd; \
241         } while (0)
242
243 #define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
244 #define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
245 #define NAND_PLAT_DEV_READY(chip)      (qong_nand_rdy(chip))
246
247 /*-----------------------------------------------------------------------
248  * FLASH and environment organization
249  */
250 #define CONFIG_SYS_FLASH_BASE           CS0_BASE
251 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
252 /* max number of sectors on one chip */
253 #define CONFIG_SYS_MAX_FLASH_SECT       1024
254 /* Monitor at beginning of flash */
255 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
256 #define CONFIG_SYS_MONITOR_LEN          0x40000         /* Reserve 256KiB */
257
258 #define CONFIG_ENV_IS_IN_FLASH
259 #define CONFIG_ENV_SECT_SIZE    0x20000
260 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
261 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x80000)
262
263 /* Address and size of Redundant Environment Sector     */
264 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
265 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
266
267 /*-----------------------------------------------------------------------
268  * CFI FLASH driver setup
269  */
270 /* Flash memory is CFI compliant */
271 #define CONFIG_SYS_FLASH_CFI
272 /* Use drivers/cfi_flash.c */
273 #define CONFIG_FLASH_CFI_DRIVER
274 /* Use buffered writes (~10x faster) */
275 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
276 /* Use hardware sector protection */
277 #define CONFIG_SYS_FLASH_PROTECTION
278
279 /*
280  * Filesystem
281  */
282 #define CONFIG_CMD_JFFS2
283 #define CONFIG_CMD_UBI
284 #define CONFIG_CMD_UBIFS
285 #define CONFIG_RBTREE
286 #define CONFIG_MTD_PARTITIONS
287 #define CONFIG_CMD_MTDPARTS
288 #define CONFIG_LZO
289 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
290 #define CONFIG_FLASH_CFI_MTD
291 #define MTDIDS_DEFAULT          "nor0=physmap-flash.0,"         \
292                                 "nand0=gen_nand"
293 #define MTDPARTS_DEFAULT        \
294         "mtdparts=physmap-flash.0:"                             \
295                         "512k(U-Boot),128k(env1),128k(env2),"   \
296                         "2304k(kernel),13m(ramdisk),-(user);"   \
297                 "gen_nand:"                                     \
298                         "128m(nand)"
299
300 /* additions for new relocation code, must be added to all boards */
301 #define CONFIG_SYS_SDRAM_BASE           0x80000000
302 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
303 #define CONFIG_SYS_INIT_RAM_SIZE                IRAM_SIZE
304 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
305 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
306
307 #define CONFIG_BOARD_EARLY_INIT_F
308
309 #endif /* __CONFIG_H */