2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
17 #include <asm/sizes.h>
20 * Ka-Ro TX53 board - SoC configuration
22 #define CONFIG_TX53 /* TX53 SoM */
23 #define CONFIG_MX53 /* i.MX53 SoC */
24 #define CONFIG_SYS_MX5_IOMUX_V3
25 #define CONFIG_MXC_GPIO /* GPIO control */
26 #define CONFIG_SYS_MX5_HCLK 24000000
27 #define CONFIG_SYS_MX5_CLK32 32768
28 #define CONFIG_SYS_DDR_CLKSEL 0
29 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
30 #define CONFIG_SHOW_ACTIVITY
31 #define CONFIG_DISPLAY_BOARDINFO
32 #define CONFIG_BOARD_LATE_INIT
33 #define CONFIG_SPLASH_SCREEN
34 #define CONFIG_BOARD_EARLY_INIT_F
36 /* LCD Logo and Splash screen support */
39 #define CONFIG_SPLASH_SCREEN_ALIGN
40 #define CONFIG_VIDEO_MX5
41 #define CONFIG_LCD_LOGO
42 #define LCD_BPP LCD_COLOR24
43 #define CONFIG_CMD_BMP
44 #define CONFIG_VIDEO_BMP_RLE8
45 #endif /* CONFIG_LCD */
48 * Memory configurations
50 #define PHYS_SDRAM_1 0x70000000 /* Base address of bank 1 */
51 #define PHYS_SDRAM_1_SIZE SZ_512M
52 #if CONFIG_NR_DRAM_BANKS > 1
53 #define PHYS_SDRAM_2 0xb0000000 /* Base address of bank 2 */
54 #define PHYS_SDRAM_2_SIZE SZ_512M
55 #define TX53_MOD_SUFFIX "1"
57 #define TX53_MOD_SUFFIX "0"
59 #define CONFIG_STACKSIZE SZ_128K
60 #define CONFIG_SYS_MALLOC_LEN SZ_8M
61 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Reserved for initial data */
62 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
63 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + SZ_4M) /* 4 MB RAM test */
64 #define CONFIG_SYS_SDRAM_CLK 400
67 * U-Boot general configurations
69 #define CONFIG_SYS_LONGHELP
70 #define CONFIG_SYS_PROMPT "TX53 U-Boot > "
71 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
72 #define CONFIG_SYS_PBSIZE \
73 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
74 /* Print buffer size */
75 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
76 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
77 /* Boot argument buffer size */
78 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
79 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
80 #define CONFIG_CMDLINE_EDITING /* Command history etc */
82 #define CONFIG_SYS_64BIT_VSPRINTF
83 #define CONFIG_SYS_NO_FLASH
86 * Flattened Device Tree (FDT) support
88 #define CONFIG_OF_LIBFDT
89 #define CONFIG_OF_EMBED
90 #define CONFIG_OF_BOARD_SETUP
91 #define CONFIG_DEFAULT_DEVICE_TREE tx53
92 #define CONFIG_ARCH_DEVICE_TREE mx53
97 #define xstr(s) str(s)
100 #define CONFIG_CMDLINE_TAG
101 #define CONFIG_SETUP_MEMORY_TAGS
102 #define CONFIG_BOOTDELAY 3
103 #define CONFIG_ZERO_BOOTDELAY_CHECK
104 #define CONFIG_BOOTFILE "uImage"
105 #define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
106 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
107 #define CONFIG_LOADADDR 0x78000000
108 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
109 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
110 #define CONFIG_HW_WATCHDOG
115 #define CONFIG_EXTRA_ENV_SETTINGS \
117 "baseboard=stk5-v3\0" \
118 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
119 " root=/dev/mmcblk0p3 rootwait\0" \
120 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
121 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
122 "nfsroot=/tftpboot/rootfs\0" \
123 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
124 " root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},nolock\0"\
125 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
126 "mmc read ${loadaddr} 100 3000;run bootm_cmd\0" \
127 "bootcmd_nand=set autostart no;run bootargs_nand;" \
128 "nboot linux;run bootm_cmd\0" \
129 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
131 "bootm_cmd=fdt boardsetup;bootm ${loadaddr} - ${fdtaddr}\0" \
132 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
133 " ${mtdparts} video=${video_mode} ${append_bootargs}\0" \
135 "fdtcontroladdr=70004000\0" \
136 "mtdids=" MTDIDS_DEFAULT "\0" \
137 "mtdparts=" MTDPARTS_DEFAULT "\0" \
138 "otg_mode=device\0" \
139 "touchpanel=tsc2007\0" \
140 "video_mode=VGA-1:640x480MR-24@60\0"
142 #define MTD_NAME "mxc_nand"
143 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
144 #define CONFIG_FDT_FIXUP_PARTITIONS
149 #include <config_cmd_default.h>
150 #define CONFIG_CMD_CACHE
151 #define CONFIG_CMD_IIM
152 #define CONFIG_CMD_MMC
153 #define CONFIG_CMD_NAND
154 #define CONFIG_CMD_MTDPARTS
155 #define CONFIG_CMD_BOOTCE
156 #define CONFIG_CMD_TIME
161 #define CONFIG_MXC_UART
162 #define CONFIG_MXC_UART_BASE UART1_BASE
163 #define CONFIG_MXC_GPIO
164 #define CONFIG_CONS_INDEX 0
165 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
166 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
171 #define CONFIG_FEC_MXC
172 #ifdef CONFIG_FEC_MXC
173 #define IMX_FEC_BASE FEC_BASE_ADDR
174 #define CONFIG_FEC_MXC_PHYADDR 0
175 #define CONFIG_PHYLIB
176 #define CONFIG_PHY_SMSC
178 #define CONFIG_FEC_XCV_TYPE MII100
179 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
180 #define CONFIG_ETH_PRIME
181 #define CONFIG_CMD_MII
182 #define CONFIG_CMD_DHCP
183 #define CONFIG_CMD_PING
184 /* Add for working with "strict" DHCP server */
185 #define CONFIG_BOOTP_SUBNETMASK
186 #define CONFIG_BOOTP_GATEWAY
187 #define CONFIG_BOOTP_DNS
193 #ifdef CONFIG_CMD_NAND
194 #define CONFIG_MTD_DEVICE
195 #define CONFIG_ENV_IS_IN_NAND
196 #define CONFIG_NAND_MXC
197 #define CONFIG_MXC_NAND_REGS_BASE 0xf7ff0000
198 #define CONFIG_MXC_NAND_IP_BASE 0x63fdb000
199 #define CONFIG_MXC_NAND_HWECC
200 #define CONFIG_CMD_NAND_TRIMFFS
201 #define CONFIG_SYS_MAX_FLASH_SECT 1024
202 #define CONFIG_SYS_MAX_FLASH_BANKS 1
203 #define CONFIG_SYS_NAND_MAX_CHIPS 1
204 #define CONFIG_SYS_MAX_NAND_DEVICE 1
205 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
206 #define CONFIG_SYS_NAND_USE_FLASH_BBT
207 #ifdef CONFIG_ENV_IS_IN_NAND
208 #define CONFIG_ENV_OVERWRITE
209 #define CONFIG_ENV_OFFSET CONFIG_U_BOOT_IMG_SIZE
210 #define CONFIG_ENV_SIZE 0x20000 /* 128 KiB */
212 #define CONFIG_ENV_OFFSET_REDUND 0x20000
213 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
216 #ifndef CONFIG_SYS_NO_FLASH
217 #define CONFIG_CMD_FLASH
218 #define CONFIG_SYS_NAND_BASE 0xa0000000
221 #define CONFIG_SYS_NAND_BASE 0x00000000
222 #define CONFIG_CMD_ROMUPDATE
224 #endif /* CONFIG_CMD_NAND */
229 #ifdef CONFIG_CMD_MMC
230 #ifndef CONFIG_ENV_IS_IN_NAND
231 #define CONFIG_ENV_IS_IN_MMC
234 #define CONFIG_GENERIC_MMC
235 #define CONFIG_FSL_ESDHC
236 #define CONFIG_SYS_FSL_ESDHC_USE_PIO
237 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
238 #define CONFIG_SYS_FSL_ESDHC_NUM 2
239 #define CONFIG_DOS_PARTITION
240 #define CONFIG_CMD_FAT
242 #define CONFIG_BOOT_PARTITION_ACCESS
243 #define CONFIG_DOS_PARTITION
244 #define CONFIG_CMD_FAT
245 #define CONFIG_CMD_EXT2
248 * Environments on MMC
250 #ifdef CONFIG_ENV_IS_IN_MMC
251 #define CONFIG_SYS_MMC_ENV_DEV 0
252 #define CONFIG_CMD_ENV
253 #define CONFIG_ENV_OVERWRITE
254 /* Associated with the MMC layout defined in mmcops.c */
255 #define CONFIG_ENV_OFFSET 0x400 /* 1 KB */
256 #define CONFIG_ENV_SIZE (0x20000 - 0x400) /* 127 KB */
257 #define CONFIG_DYNAMIC_MMC_DEVNO
258 #endif /* CONFIG_ENV_IS_IN_MMC */
259 #endif /* CONFIG_CMD_MMC */
261 #ifdef CONFIG_ENV_OFFSET_REDUND
262 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
264 xstr(CONFIG_ENV_SIZE) \
266 xstr(CONFIG_ENV_SIZE) \
267 "(env2),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
269 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
271 xstr(CONFIG_ENV_SIZE) \
272 "(env),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
275 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
276 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
277 GENERATED_GBL_DATA_SIZE)
279 #ifdef CONFIG_CMD_IIM
280 #define CONFIG_IMX_IIM
283 #endif /* __CONFIG_H */