include/configs/xpedite550x.h

   1 /*
   2  * Copyright 2010 Extreme Engineering Solutions, Inc.
   3  * Copyright 2007-2008 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 /*
  24  * xpedite550x board configuration file
  25  */
  26 #ifndef __CONFIG_H
  27 #define __CONFIG_H
  28
  29 /*
  30  * High Level Configuration Options
  31  */
  32 #define CONFIG_BOOKE            1       /* BOOKE */
  33 #define CONFIG_E500             1       /* BOOKE e500 family */
  34 #define CONFIG_MPC85xx          1       /* MPC8540/60/55/41/48 */
  35 #define CONFIG_P2020            1
  36 #define CONFIG_XPEDITE550X      1
  37 #define CONFIG_SYS_BOARD_NAME   "XPedite5500"
  38 #define CONFIG_SYS_FORM_PMC_XMC 1
  39 #define CONFIG_PRPMC_PCI_ALIAS  "pci0"  /* Processor PMC interface on pci0 */
  40 #define CONFIG_BOARD_EARLY_INIT_R       /* Call board_pre_init */
  41
  42 #ifndef CONFIG_SYS_TEXT_BASE
  43 #define CONFIG_SYS_TEXT_BASE    0xfff80000
  44 #endif
  45
  46 #define CONFIG_PCI              1       /* Enable PCI/PCIE */
  47 #define CONFIG_PCI_PNP          1       /* do pci plug-and-play */
  48 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
  49 #define CONFIG_PCIE1            1       /* PCIE controler 1 (PEX8112 or XMC) */
  50 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
  51 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
  52 #define CONFIG_FSL_PCIE_RESET   1       /* need PCIe reset errata */
  53 #define CONFIG_FSL_LAW          1       /* Use common FSL init code */
  54 #define CONFIG_FSL_ELBC         1
  55
  56 /*
  57  * Multicore config
  58  */
  59 #define CONFIG_MP
  60 #define CONFIG_BPTR_VIRT_ADDR   0xee000000      /* virt boot page address */
  61 #define CONFIG_MPC8xxx_DISABLE_BPTR             /* Don't leave BPTR enabled */
  62
  63 /*
  64  * DDR config
  65  */
  66 #define CONFIG_FSL_DDR3
  67 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
  68 #define CONFIG_DDR_SPD
  69 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  70 #define SPD_EEPROM_ADDRESS1                     0x54
  71 #define SPD_EEPROM_OFFSET               0x200   /* OFFSET of SPD in EEPROM */
  72 #define CONFIG_NUM_DDR_CONTROLLERS      1
  73 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
  74 #define CONFIG_CHIP_SELECTS_PER_CTRL 2
  75 #define CONFIG_DDR_ECC
  76 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
  77 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000 /* DDR is system memory*/
  78 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  79 #define CONFIG_VERY_BIG_RAM
  80
  81 #ifndef __ASSEMBLY__
  82 extern unsigned long get_board_sys_clk(unsigned long dummy);
  83 extern unsigned long get_board_ddr_clk(unsigned long dummy);
  84 #endif
  85
  86 #define CONFIG_SYS_CLK_FREQ     get_board_sys_clk(0) /* sysclk for MPC85xx */
  87 #define CONFIG_DDR_CLK_FREQ     get_board_ddr_clk(0) /* ddrclk for MPC85xx */
  88
  89 /*
  90  * These can be toggled for performance analysis, otherwise use default.
  91  */
  92 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
  93 #define CONFIG_BTB                      /* toggle branch predition */
  94 #define CONFIG_ENABLE_36BIT_PHYS        1
  95
  96 /*
  97  * Base addresses -- Note these are effective addresses where the
  98  * actual resources get mapped (not physical addresses)
  99  */
 100 #define CONFIG_SYS_CCSRBAR_DEFAULT      0xff700000      /* CCSRBAR Default */
 101 #define CONFIG_SYS_CCSRBAR              0xef000000      /* relocated CCSRBAR */
 102 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
 103 #define CONFIG_SYS_IMMR         CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
 104
 105 /*
 106  * Diagnostics
 107  */
 108 #define CONFIG_SYS_ALT_MEMTEST
 109 #define CONFIG_SYS_MEMTEST_START        0x10000000
 110 #define CONFIG_SYS_MEMTEST_END          0x20000000
 111 #define CONFIG_POST                     (CONFIG_SYS_POST_MEMORY | \
 112                                          CONFIG_SYS_POST_I2C)
 113 #define I2C_ADDR_LIST                   {CONFIG_SYS_I2C_EEPROM_ADDR,    \
 114                                          CONFIG_SYS_I2C_LM75_ADDR,      \
 115                                          CONFIG_SYS_I2C_LM90_ADDR,      \
 116                                          CONFIG_SYS_I2C_PCA953X_ADDR0,  \
 117                                          CONFIG_SYS_I2C_PCA953X_ADDR2,  \
 118                                          CONFIG_SYS_I2C_PCA953X_ADDR3,  \
 119                                          CONFIG_SYS_I2C_RTC_ADDR}
 120
 121 /*
 122  * Memory map
 123  * 0x0000_0000 0x7fff_ffff      DDR                     2G Cacheable
 124  * 0x8000_0000 0xbfff_ffff      PCIe1 Mem               1G non-cacheable
 125  * 0xe000_0000 0xe7ff_ffff      SRAM/SSRAM/L1 Cache     128M non-cacheable
 126  * 0xe800_0000 0xe87f_ffff      PCIe1 IO                8M non-cacheable
 127  * 0xee00_0000 0xee00_ffff      Boot page translation   4K non-cacheable
 128  * 0xef00_0000 0xef0f_ffff      CCSR/IMMR               1M non-cacheable
 129  * 0xef80_0000 0xef8f_ffff      NAND Flash              1M non-cacheable
 130  * 0xf000_0000 0xf7ff_ffff      NOR Flash 2             128M non-cacheable
 131  * 0xf800_0000 0xffff_ffff      NOR Flash 1             128M non-cacheable
 132  */
 133
 134 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_8 | LCRR_EADC_3)
 135
 136 /*
 137  * NAND flash configuration
 138  */
 139 #define CONFIG_SYS_NAND_BASE            0xef800000
 140 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
 141 #define CONFIG_SYS_NAND_BASE_LIST       {CONFIG_SYS_NAND_BASE, \
 142                                          CONFIG_SYS_NAND_BASE2}
 143 #define CONFIG_SYS_MAX_NAND_DEVICE      2
 144 #define CONFIG_MTD_NAND_VERIFY_WRITE
 145 #define CONFIG_SYS_NAND_QUIET_TEST      /* 2nd NAND flash not always populated */
 146 #define CONFIG_NAND_FSL_ELBC
 147
 148 /*
 149  * NOR flash configuration
 150  */
 151 #define CONFIG_SYS_FLASH_BASE           0xf8000000
 152 #define CONFIG_SYS_FLASH_BASE2          0xf0000000
 153 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
 154 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
 155 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
 156 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
 157 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
 158 #define CONFIG_FLASH_CFI_DRIVER
 159 #define CONFIG_SYS_FLASH_CFI
 160 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 161 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
 162                                                   {0xf7f40000, 0xc0000} }
 163 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 164
 165 /*
 166  * Chip select configuration
 167  */
 168 /* NOR Flash 0 on CS0 */
 169 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
 170                                  BR_PS_16               | \
 171                                  BR_V)
 172 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_128MB            | \
 173                                  OR_GPCM_CSNT           | \
 174                                  OR_GPCM_XACS           | \
 175                                  OR_GPCM_ACS_DIV2       | \
 176                                  OR_GPCM_SCY_8          | \
 177                                  OR_GPCM_TRLX           | \
 178                                  OR_GPCM_EHTR           | \
 179                                  OR_GPCM_EAD)
 180
 181 /* NOR Flash 1 on CS1 */
 182 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
 183                                  BR_PS_16               | \
 184                                  BR_V)
 185 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
 186
 187 /* NAND flash on CS2 */
 188 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
 189                                  (2<<BR_DECC_SHIFT)     | \
 190                                  BR_PS_8                | \
 191                                  BR_MS_FCM              | \
 192                                  BR_V)
 193
 194 /* NAND flash on CS2 */
 195 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB    | \
 196                                  OR_FCM_PGS     | \
 197                                  OR_FCM_CSCT    | \
 198                                  OR_FCM_CST     | \
 199                                  OR_FCM_CHT     | \
 200                                  OR_FCM_SCY_1   | \
 201                                  OR_FCM_TRLX    | \
 202                                  OR_FCM_EHTR)
 203
 204 /* NAND flash on CS3 */
 205 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
 206                                  (2<<BR_DECC_SHIFT)     | \
 207                                  BR_PS_8                | \
 208                                  BR_MS_FCM              | \
 209                                  BR_V)
 210 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
 211
 212 /*
 213  * Use L1 as initial stack
 214  */
 215 #define CONFIG_SYS_INIT_RAM_LOCK        1
 216 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
 217 #define CONFIG_SYS_INIT_RAM_SIZE                0x00004000
 218
 219 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 220 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 221
 222 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
 223 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
 224
 225 /*
 226  * Serial Port
 227  */
 228 #define CONFIG_CONS_INDEX               1
 229 #define CONFIG_SYS_NS16550
 230 #define CONFIG_SYS_NS16550_SERIAL
 231 #define CONFIG_SYS_NS16550_REG_SIZE     1
 232 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 233 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
 234 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
 235 #define CONFIG_SYS_BAUDRATE_TABLE       \
 236         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
 237 #define CONFIG_BAUDRATE                 115200
 238 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
 239 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
 240
 241 /*
 242  * Use the HUSH parser
 243  */
 244 #define CONFIG_SYS_HUSH_PARSER
 245 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 246
 247 /*
 248  * Pass open firmware flat tree
 249  */
 250 #define CONFIG_OF_LIBFDT                1
 251 #define CONFIG_OF_BOARD_SETUP           1
 252 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
 253 #define CONFIG_FDT_FIXUP_PCI_IRQ        1
 254
 255 /*
 256  * I2C
 257  */
 258 #define CONFIG_FSL_I2C                          /* Use FSL common I2C driver */
 259 #define CONFIG_HARD_I2C                         /* I2C with hardware support */
 260 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed and slave address */
 261 #define CONFIG_SYS_I2C_SLAVE            0x7F
 262 #define CONFIG_SYS_I2C_OFFSET           0x3000
 263 #define CONFIG_SYS_I2C2_OFFSET          0x3100
 264 #define CONFIG_I2C_MULTI_BUS
 265
 266 /* I2C DS7505 temperature sensor */
 267 #define CONFIG_DTT_LM75
 268 #define CONFIG_DTT_SENSORS              { 0 }
 269 #define CONFIG_SYS_I2C_LM75_ADDR        0x48
 270
 271 /* I2C ADT7461 temperature sensor */
 272 #define CONFIG_SYS_I2C_LM90_ADDR        0x4C
 273
 274 /* I2C EEPROM - AT24C128B */
 275 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
 276 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
 277 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
 278 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
 279
 280 /* I2C RTC */
 281 #define CONFIG_RTC_M41T11               1
 282 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 283 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
 284
 285 /* GPIO */
 286 #define CONFIG_PCA953X
 287 #define CONFIG_SYS_I2C_PCA953X_ADDR0    0x18
 288 #define CONFIG_SYS_I2C_PCA953X_ADDR1    0x1c
 289 #define CONFIG_SYS_I2C_PCA953X_ADDR2    0x1e
 290 #define CONFIG_SYS_I2C_PCA953X_ADDR3    0x1f
 291 #define CONFIG_SYS_I2C_PCA953X_ADDR     CONFIG_SYS_I2C_PCA953X_ADDR0
 292
 293 /*
 294  * GPIO pin definitions, PU = pulled high, PD = pulled low
 295  */
 296 /* PCA9557 @ 0x18*/
 297 #define CONFIG_SYS_PCA953X_C0_SER0_EN           0x01 /* PU; UART0 enable (1: enabled) */
 298 #define CONFIG_SYS_PCA953X_C0_SER0_MODE         0x02 /* PU; UART0 serial mode select (1: RS-485, 0: RS-232) */
 299 #define CONFIG_SYS_PCA953X_C0_SER1_EN           0x04 /* PU; UART1 enable (1: enabled) */
 300 #define CONFIG_SYS_PCA953X_C0_SER1_MODE         0x08 /* PU; UART1 serial mode select (1: RS-485, 0: RS-232) */
 301 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS     0x10 /* PU; Boot flash CS select */
 302 #define CONFIG_SYS_PCA953X_NVM_WP               0x20 /* PU; Write protection (0: disabled, 1: enabled) */
 303
 304 /* PCA9557 @ 0x1e*/
 305 #define CONFIG_SYS_PCA953X_XMC_GA0              0x01 /* PU; */
 306 #define CONFIG_SYS_PCA953X_XMC_GA1              0x02 /* PU; */
 307 #define CONFIG_SYS_PCA953X_XMC_GA2              0x04 /* PU; */
 308 #define CONFIG_SYS_PCA953X_XMC_WAKE             0x10 /* PU; */
 309 #define CONFIG_SYS_PCA953X_XMC_BIST             0x20 /* Enable XMC BIST */
 310 #define CONFIG_SYS_PCA953X_PMC_EREADY           0x40 /* PU; PMC PCI eready */
 311 #define CONFIG_SYS_PCA953X_PMC_MONARCH          0x80 /* PMC monarch mode enable */
 312
 313 /* PCA9557 @ 0x1f */
 314 #define CONFIG_SYS_PCA953X_MC_GPIO0             0x01 /* PU; */
 315 #define CONFIG_SYS_PCA953X_MC_GPIO1             0x02 /* PU; */
 316 #define CONFIG_SYS_PCA953X_MC_GPIO2             0x04 /* PU; */
 317 #define CONFIG_SYS_PCA953X_MC_GPIO3             0x08 /* PU; */
 318 #define CONFIG_SYS_PCA953X_MC_GPIO4             0x10 /* PU; */
 319 #define CONFIG_SYS_PCA953X_MC_GPIO5             0x20 /* PU; */
 320 #define CONFIG_SYS_PCA953X_MC_GPIO6             0x40 /* PU; */
 321 #define CONFIG_SYS_PCA953X_MC_GPIO7             0x80 /* PU; */
 322
 323 /*
 324  * General PCI
 325  * Memory space is mapped 1-1, but I/O space must start from 0.
 326  */
 327
 328 /* controller 1 - PEX8112 or XMC, depending on build option */
 329 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 330 #define CONFIG_SYS_PCIE1_MEM_PHYS       CONFIG_SYS_PCIE1_MEM_BUS
 331 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x40000000      /* 1G */
 332 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 333 #define CONFIG_SYS_PCIE1_IO_PHYS        0xe8000000
 334 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00800000      /* 8M */
 335
 336
 337 /*
 338  * Networking options
 339  */
 340 #define CONFIG_TSEC_ENET                /* tsec ethernet support */
 341 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
 342 #define CONFIG_NET_MULTI        1
 343 #define CONFIG_TSEC_TBI
 344 #define CONFIG_MII              1       /* MII PHY management */
 345 #define CONFIG_MII_DEFAULT_TSEC 1       /* Allow unregistered phys */
 346 #define CONFIG_ETHPRIME         "eTSEC2"
 347
 348 #define CONFIG_TSEC1            1
 349 #define CONFIG_TSEC1_NAME       "eTSEC1"
 350 #define TSEC1_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 351 #define TSEC1_PHY_ADDR          1
 352 #define TSEC1_PHYIDX            0
 353 #define CONFIG_HAS_ETH0
 354
 355 #define CONFIG_TSEC2            1
 356 #define CONFIG_TSEC2_NAME       "eTSEC2"
 357 #define TSEC2_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 358 #define TSEC2_PHY_ADDR          2
 359 #define TSEC2_PHYIDX            0
 360 #define CONFIG_HAS_ETH1
 361
 362 #define CONFIG_TSEC3            1
 363 #define CONFIG_TSEC3_NAME       "eTSEC3"
 364 #define TSEC3_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 365 #define TSEC3_PHY_ADDR          3
 366 #define TSEC3_PHYIDX            0
 367 #define CONFIG_HAS_ETH2
 368
 369 /*
 370  * USB
 371  */
 372 #define CONFIG_USB_STORAGE
 373 #define CONFIG_USB_EHCI
 374 #define CONFIG_USB_EHCI_FSL
 375 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 376 #define CONFIG_DOS_PARTITION
 377
 378 /*
 379  * Command configuration.
 380  */
 381 #include <config_cmd_default.h>
 382
 383 #define CONFIG_CMD_ASKENV
 384 #define CONFIG_CMD_DATE
 385 #define CONFIG_CMD_DHCP
 386 #define CONFIG_CMD_DTT
 387 #define CONFIG_CMD_EEPROM
 388 #define CONFIG_CMD_ELF
 389 #define CONFIG_CMD_FLASH
 390 #define CONFIG_CMD_I2C
 391 #define CONFIG_CMD_JFFS2
 392 #define CONFIG_CMD_MII
 393 #define CONFIG_CMD_NAND
 394 #define CONFIG_CMD_NET
 395 #define CONFIG_CMD_PCA953X
 396 #define CONFIG_CMD_PCA953X_INFO
 397 #define CONFIG_CMD_PCI
 398 #define CONFIG_CMD_PCI_ENUM
 399 #define CONFIG_CMD_PING
 400 #define CONFIG_CMD_REGINFO
 401 #define CONFIG_CMD_SAVEENV
 402 #define CONFIG_CMD_SNTP
 403 #define CONFIG_CMD_USB
 404
 405 /*
 406  * Miscellaneous configurable options
 407  */
 408 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 409 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 410 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt */
 411 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 412 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 413 #define CONFIG_SYS_MAXARGS      16              /* max number of command args */
 414 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 415 #define CONFIG_SYS_HZ           1000            /* decrementer freq: 1ms ticks */
 416 #define CONFIG_CMDLINE_EDITING  1               /* add command line history     */
 417 #define CONFIG_AUTO_COMPLETE    1               /* add autocompletion support */
 418 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
 419 #define CONFIG_BOOTDELAY        3               /* -1 disables auto-boot */
 420 #define CONFIG_PANIC_HANG                       /* do not reset board on panic */
 421 #define CONFIG_PREBOOT                          /* enable preboot variable */
 422 #define CONFIG_FIT              1
 423 #define CONFIG_FIT_VERBOSE      1
 424 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
 425
 426 /*
 427  * For booting Linux, the board info and command line data
 428  * have to be in the first 16 MB of memory, since this is
 429  * the maximum mapped by the Linux kernel during initialization.
 430  */
 431 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
 432 #define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
 433
 434 /*
 435  * Boot Flags
 436  */
 437 #define BOOTFLAG_COLD           0x01            /* Normal Power-On: Boot from FLASH */
 438 #define BOOTFLAG_WARM           0x02            /* Software reboot */
 439
 440 /*
 441  * Environment Configuration
 442  */
 443 #define CONFIG_ENV_IS_IN_FLASH  1
 444 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
 445 #define CONFIG_ENV_SIZE         0x8000
 446 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
 447
 448 /*
 449  * Flash memory map:
 450  * fff80000 - ffffffff     Pri U-Boot (512 KB)
 451  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
 452  * fff00000 - fff3ffff     Pri FDT (256KB)
 453  * fef00000 - ffefffff     Pri OS image (16MB)
 454  * f8000000 - feefffff     Pri OS Use/Filesystem (111MB)
 455  *
 456  * f7f80000 - f7ffffff     Sec U-Boot (512 KB)
 457  * f7f40000 - f7f7ffff     Sec U-Boot Environment (256 KB)
 458  * f7f00000 - f7f3ffff     Sec FDT (256KB)
 459  * f6f00000 - f7efffff     Sec OS image (16MB)
 460  * f0000000 - f6efffff     Sec OS Use/Filesystem (111MB)
 461  */
 462 #define CONFIG_UBOOT1_ENV_ADDR  MK_STR(0xfff80000)
 463 #define CONFIG_UBOOT2_ENV_ADDR  MK_STR(0xf7f80000)
 464 #define CONFIG_FDT1_ENV_ADDR    MK_STR(0xfff00000)
 465 #define CONFIG_FDT2_ENV_ADDR    MK_STR(0xf7f00000)
 466 #define CONFIG_OS1_ENV_ADDR     MK_STR(0xfef00000)
 467 #define CONFIG_OS2_ENV_ADDR     MK_STR(0xf6f00000)
 468
 469 #define CONFIG_PROG_UBOOT1                                              \
 470         "$download_cmd $loadaddr $ubootfile; "                          \
 471         "if test $? -eq 0; then "                                       \
 472                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
 473                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
 474                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
 475                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
 476                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
 477                 "if test $? -ne 0; then "                               \
 478                         "echo PROGRAM FAILED; "                         \
 479                 "else; "                                                \
 480                         "echo PROGRAM SUCCEEDED; "                      \
 481                 "fi; "                                                  \
 482         "else; "                                                        \
 483                 "echo DOWNLOAD FAILED; "                                \
 484         "fi;"
 485
 486 #define CONFIG_PROG_UBOOT2                                              \
 487         "$download_cmd $loadaddr $ubootfile; "                          \
 488         "if test $? -eq 0; then "                                       \
 489                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
 490                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
 491                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
 492                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
 493                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
 494                 "if test $? -ne 0; then "                               \
 495                         "echo PROGRAM FAILED; "                         \
 496                 "else; "                                                \
 497                         "echo PROGRAM SUCCEEDED; "                      \
 498                 "fi; "                                                  \
 499         "else; "                                                        \
 500                 "echo DOWNLOAD FAILED; "                                \
 501         "fi;"
 502
 503 #define CONFIG_BOOT_OS_NET                                              \
 504         "$download_cmd $osaddr $osfile; "                               \
 505         "if test $? -eq 0; then "                                       \
 506                 "if test -n $fdtaddr; then "                            \
 507                         "$download_cmd $fdtaddr $fdtfile; "             \
 508                         "if test $? -eq 0; then "                       \
 509                                 "bootm $osaddr - $fdtaddr; "            \
 510                         "else; "                                        \
 511                                 "echo FDT DOWNLOAD FAILED; "            \
 512                         "fi; "                                          \
 513                 "else; "                                                \
 514                         "bootm $osaddr; "                               \
 515                 "fi; "                                                  \
 516         "else; "                                                        \
 517                 "echo OS DOWNLOAD FAILED; "                             \
 518         "fi;"
 519
 520 #define CONFIG_PROG_OS1                                                 \
 521         "$download_cmd $osaddr $osfile; "                               \
 522         "if test $? -eq 0; then "                                       \
 523                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
 524                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
 525                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
 526                 "if test $? -ne 0; then "                               \
 527                         "echo OS PROGRAM FAILED; "                      \
 528                 "else; "                                                \
 529                         "echo OS PROGRAM SUCCEEDED; "                   \
 530                 "fi; "                                                  \
 531         "else; "                                                        \
 532                 "echo OS DOWNLOAD FAILED; "                             \
 533         "fi;"
 534
 535 #define CONFIG_PROG_OS2                                                 \
 536         "$download_cmd $osaddr $osfile; "                               \
 537         "if test $? -eq 0; then "                                       \
 538                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
 539                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
 540                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
 541                 "if test $? -ne 0; then "                               \
 542                         "echo OS PROGRAM FAILED; "                      \
 543                 "else; "                                                \
 544                         "echo OS PROGRAM SUCCEEDED; "                   \
 545                 "fi; "                                                  \
 546         "else; "                                                        \
 547                 "echo OS DOWNLOAD FAILED; "                             \
 548         "fi;"
 549
 550 #define CONFIG_PROG_FDT1                                                \
 551         "$download_cmd $fdtaddr $fdtfile; "                             \
 552         "if test $? -eq 0; then "                                       \
 553                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
 554                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
 555                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
 556                 "if test $? -ne 0; then "                               \
 557                         "echo FDT PROGRAM FAILED; "                     \
 558                 "else; "                                                \
 559                         "echo FDT PROGRAM SUCCEEDED; "                  \
 560                 "fi; "                                                  \
 561         "else; "                                                        \
 562                 "echo FDT DOWNLOAD FAILED; "                            \
 563         "fi;"
 564
 565 #define CONFIG_PROG_FDT2                                                \
 566         "$download_cmd $fdtaddr $fdtfile; "                             \
 567         "if test $? -eq 0; then "                                       \
 568                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
 569                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
 570                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
 571                 "if test $? -ne 0; then "                               \
 572                         "echo FDT PROGRAM FAILED; "                     \
 573                 "else; "                                                \
 574                         "echo FDT PROGRAM SUCCEEDED; "                  \
 575                 "fi; "                                                  \
 576         "else; "                                                        \
 577                 "echo FDT DOWNLOAD FAILED; "                            \
 578         "fi;"
 579
 580 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 581         "autoload=yes\0"                                                \
 582         "download_cmd=tftp\0"                                           \
 583         "console_args=console=ttyS0,115200\0"                           \
 584         "root_args=root=/dev/nfs rw\0"                                  \
 585         "misc_args=ip=on\0"                                             \
 586         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
 587         "bootfile=/home/user/file\0"                                    \
 588         "osfile=/home/user/board.uImage\0"                              \
 589         "fdtfile=/home/user/board.dtb\0"                                \
 590         "ubootfile=/home/user/u-boot.bin\0"                             \
 591         "fdtaddr=c00000\0"                                              \
 592         "osaddr=0x1000000\0"                                            \
 593         "loadaddr=0x1000000\0"                                          \
 594         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
 595         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
 596         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
 597         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
 598         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
 599         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
 600         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
 601         "bootcmd_flash1=run set_bootargs; "                             \
 602                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
 603         "bootcmd_flash2=run set_bootargs; "                             \
 604                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
 605         "bootcmd=run bootcmd_flash1\0"
 606 #endif  /* __CONFIG_H */