patches/0042-ENGR00116924-Uboot-Boot-up-hang-at-detecting-NAND-w.patch

   1 From 6532550c9f7e96cbe32488f24ca53b2e3648fef1 Mon Sep 17 00:00:00 2001
   2 From: Jason <r64343@freescale.com>
   3 Date: Mon, 12 Oct 2009 10:48:31 +0800
   4 Subject: [PATCH] ENGR00116924 Uboot: Boot up hang at detecting NAND when cold boot
   5
   6 Boot from MMC card failed at detecting NAND. The fix will
   7 1. Set RBB_MODE to 1 and using atomic status command
   8 2. Set FW correctly by adding CONFIG_NAND_FW_8 config
   9 3. Correct the BLS register value
  10
  11 Signed-off-by:Jason Liu <r64343@freescale.com>
  12 (cherry picked from commit 7142651386271c340a6ae061a6e2893695675724)
  13 ---
  14  drivers/mtd/nand/mxc_nand.c          |   59 ++++++++++++++++++++++++++--------
  15  include/asm-arm/arch-mx51/mxc_nand.h |   16 +++++----
  16  include/configs/mx51_3stack.h        |    1 +
  17  3 files changed, 55 insertions(+), 21 deletions(-)
  18
  19 diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
  20 index cf27c66..71d2d9e 100644
  21 --- a/drivers/mtd/nand/mxc_nand.c
  22 +++ b/drivers/mtd/nand/mxc_nand.c
  23 @@ -415,7 +415,9 @@ static void send_cmd_auto(struct mtd_info *mtd, u16 cmd)
  24                 break;
  25         case NAND_CMD_RESET:
  26                 send_cmd_interleave(mtd, cmd);
  27 +               break;
  28         case NAND_CMD_STATUS:
  29 +               send_cmd_atomic(mtd, cmd);
  30                 break;
  31         default:
  32                 break;
  33 @@ -540,20 +542,15 @@ static u16 mxc_do_status_auto(struct mtd_info *mtd)
  34                 /* clear status */
  35                 ACK_OPS;
  36
  37 -               /* FIXME, NFC Auto erase may have
  38 -                * problem, have to pollingit until
  39 -                * the nand get idle, otherwise
  40 -                * it may get error
  41 -                */
  42 -               do {
  43 -                       raw_write(NFC_AUTO_STATE, REG_NFC_OPS);
  44 -               #if defined(CONFIG_MX51_3DS) || defined(CONFIG_MX51_BBG)
  45 -                       /* mx51to2 NFC need wait the op done */
  46 -                       if (is_soc_rev(CHIP_REV_2_0) == 0)
  47 -                               wait_op_done(TROP_US_DELAY);
  48 -               #endif
  49 -                       status = (raw_read(NFC_CONFIG1) & mask) >> 16;
  50 -               } while ((status & NAND_STATUS_READY) == 0);
  51 +               /* use atomic mode to read status instead
  52 +                * of using auto mode,auto-mode has issues
  53 +                * and the status is not correct.
  54 +               */
  55 +               raw_write(NFC_STATUS, REG_NFC_OPS);
  56 +
  57 +               wait_op_done(TROP_US_DELAY);
  58 +
  59 +               status = (raw_read(NFC_CONFIG1) & mask) >> 16;
  60
  61                 if (status & NAND_STATUS_FAIL)
  62                         break;
  63 @@ -731,6 +728,26 @@ static u16 mxc_nand_read_word(struct mtd_info *mtd)
  64  }
  65
  66  /*!
  67 + * This function reads byte from the NAND Flash
  68 + *
  69 + * @param     mtd     MTD structure for the NAND Flash
  70 + *
  71 + * @return    data read from the NAND Flash
  72 + */
  73 +static u_char mxc_nand_read_byte16(struct mtd_info *mtd)
  74 +{
  75 +       struct nand_chip *this = mtd->priv;
  76 +       struct nand_info *info = this->priv;
  77 +
  78 +       /* Check for status request */
  79 +       if (info->status_req)
  80 +               return mxc_nand_get_status(mtd) & 0xFF;
  81 +
  82 +       return mxc_nand_read_word(mtd) & 0xFF;
  83 +}
  84 +
  85 +
  86 +/*!
  87   * This function writes data of length \b len from buffer \b buf to the NAND
  88   * internal RAM buffer's MAIN area 0.
  89   *
  90 @@ -1197,6 +1214,7 @@ int board_nand_init(struct nand_chip *nand)
  91  {
  92         struct nand_info *info;
  93         struct nand_chip *this = nand;
  94 +       struct mtd_info *mtd; /* dummy for compile */
  95         int err;
  96
  97         info = kmalloc(sizeof(struct nand_info), GFP_KERNEL);
  98 @@ -1218,6 +1236,7 @@ int board_nand_init(struct nand_chip *nand)
  99  #ifdef CONFIG_MXC_NFC_SP_AUTO
 100         info->auto_mode = 1;
 101  #endif
 102 +
 103         /* init the nfc */
 104         mxc_nfc_init();
 105
 106 @@ -1242,5 +1261,17 @@ int board_nand_init(struct nand_chip *nand)
 107         this->ecc.bytes = 9;
 108         this->ecc.size = 512;
 109
 110 +#ifdef CONFIG_NAND_FW_16BIT
 111 +       if (CONFIG_NAND_FW_16BIT == 1) {
 112 +               this->read_byte = mxc_nand_read_byte16;
 113 +               this->options |= NAND_BUSWIDTH_16;
 114 +               NFC_SET_NFMS(1 << NFMS_NF_DWIDTH);
 115 +       } else {
 116 +               NFC_SET_NFMS(0);
 117 +       }
 118 +#else
 119 +       NFC_SET_NFMS(0);
 120 +#endif
 121 +
 122         return 0;
 123  }
 124 diff --git a/include/asm-arm/arch-mx51/mxc_nand.h b/include/asm-arm/arch-mx51/mxc_nand.h
 125 index 539d0fd..ee5bf91 100644
 126 --- a/include/asm-arm/arch-mx51/mxc_nand.h
 127 +++ b/include/asm-arm/arch-mx51/mxc_nand.h
 128 @@ -72,7 +72,7 @@
 129
 130  #define IS_4BIT_ECC \
 131  ( \
 132 -       is_soc_rev(CHIP_REV_2_0) == 0 ? \
 133 +       is_soc_rev(CHIP_REV_2_0) >= 0 ? \
 134                 !((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) : \
 135                 ((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) \
 136  )
 137 @@ -84,7 +84,7 @@
 138
 139  #define NFC_SET_ECC_MODE(v)            \
 140  do { \
 141 -       if (is_soc_rev(CHIP_REV_2_0) == 0) { \
 142 +       if (is_soc_rev(CHIP_REV_2_0) >= 0) { \
 143                 if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \
 144                         raw_write(((raw_read(NFC_CONFIG2) & \
 145                                         NFC_ECC_MODE_MASK) | \
 146 @@ -201,9 +201,9 @@ do { \
 147  #define NFC_PPB_256                    (3 << 7)
 148  #define NFC_PPB_RESET                  (~(3 << 7))
 149
 150 -#define NFC_BLS_LOCKED                 (0 << 16)
 151 -#define NFC_BLS_LOCKED_DEFAULT         (1 << 16)
 152 -#define NFC_BLS_UNLCOKED               (2 << 16)
 153 +#define NFC_BLS_LOCKED                 (0 << 6)
 154 +#define NFC_BLS_LOCKED_DEFAULT         (1 << 6)
 155 +#define NFC_BLS_UNLCOKED               (2 << 6)
 156  #define NFC_BLS_RESET                  (~(3 << 16))
 157  #define NFC_WPC_LOCK_TIGHT             1
 158  #define NFC_WPC_LOCK                   (1 << 1)
 159 @@ -335,7 +335,8 @@ do { \
 160  /*should set the fw,ps,spas,ppb*/
 161  #define NFC_SET_NFMS(v)        \
 162  do {   \
 163 -       NFC_SET_FW(NFC_FW_8);   \
 164 +       if (!(v)) \
 165 +               NFC_SET_FW(NFC_FW_8);   \
 166         if (((v) & (1 << NFMS_NF_DWIDTH)))      \
 167                 NFC_SET_FW(NFC_FW_16);  \
 168         if (((v) & (1 << NFMS_NF_PG_SZ))) {     \
 169 @@ -356,7 +357,8 @@ do {        \
 170                 NFC_SET_SPAS(GET_NAND_OOB_SIZE >> 1);   \
 171                 NFC_SET_ECC_MODE(GET_NAND_OOB_SIZE >> 1); \
 172                 NFC_SET_ST_CMD(0x70); \
 173 -               raw_write(raw_read(NFC_CONFIG3) | 1 << 20, NFC_CONFIG3); \
 174 +               raw_write(raw_read(NFC_CONFIG3) | NFC_NO_SDMA, NFC_CONFIG3); \
 175 +               raw_write(raw_read(NFC_CONFIG3) | NFC_RBB_MODE, NFC_CONFIG3); \
 176         } \
 177  } while (0)
 178
 179 diff --git a/include/configs/mx51_3stack.h b/include/configs/mx51_3stack.h
 180 index e0fa523..bd2d27b 100644
 181 --- a/include/configs/mx51_3stack.h
 182 +++ b/include/configs/mx51_3stack.h
 183 @@ -205,6 +205,7 @@
 184  #define NAND_MAX_CHIPS         8
 185  #define CONFIG_SYS_MAX_NAND_DEVICE    1
 186  #define CONFIG_SYS_NAND_BASE          0x40000000
 187 +#define CONFIG_NAND_FW_16BIT   0 /* 1: 16bit 0: 8bit */
 188
 189  /* Monitor at beginning of flash */
 190  #define CONFIG_FSL_ENV_IN_NAND
 191 --
 192 1.5.4.4
 193