]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - drivers/i2c/mxc_i2c.c
driver/i2c/mxc: Enable I2C bus 3 and 4
[karo-tx-uboot.git] / drivers / i2c / mxc_i2c.c
index 48468d74bdd838ae414688951011b6e5da8e70d8..36edf03b28868c22bc44b2cd879f9d8d7531c8b2 100644 (file)
@@ -114,6 +114,9 @@ static u16 i2c_clk_div[50][2] = {
 #ifndef CONFIG_SYS_MXC_I2C3_SPEED
 #define CONFIG_SYS_MXC_I2C3_SPEED 100000
 #endif
+#ifndef CONFIG_SYS_MXC_I2C4_SPEED
+#define CONFIG_SYS_MXC_I2C4_SPEED 100000
+#endif
 
 #ifndef CONFIG_SYS_MXC_I2C1_SLAVE
 #define CONFIG_SYS_MXC_I2C1_SLAVE 0
@@ -124,6 +127,9 @@ static u16 i2c_clk_div[50][2] = {
 #ifndef CONFIG_SYS_MXC_I2C3_SLAVE
 #define CONFIG_SYS_MXC_I2C3_SLAVE 0
 #endif
+#ifndef CONFIG_SYS_MXC_I2C4_SLAVE
+#define CONFIG_SYS_MXC_I2C4_SLAVE 0
+#endif
 
 
 /*
@@ -135,7 +141,7 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
        unsigned int div;
        u8 clk_div;
 
-#if defined(CONFIG_MX31)
+#if defined(CONFIG_SOC_MX31)
        struct clock_control_regs *sc_regs =
                (struct clock_control_regs *)CCM_BASE;
 
@@ -168,6 +174,9 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
        u8 clk_idx = i2c_imx_get_clk(speed);
        u8 idx = i2c_clk_div[clk_idx][1];
 
+       if (!base)
+               return -ENODEV;
+
        /* Store divider value */
        writeb(idx, &i2c_regs->ifdr);
 
@@ -330,6 +339,9 @@ int bus_i2c_read(void *base, uchar chip, uint addr, int alen, uchar *buf,
        int i;
        struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
+       if (!base)
+               return -ENODEV;
+
        ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
        if (ret < 0)
                return ret;
@@ -389,6 +401,9 @@ int bus_i2c_write(void *base, uchar chip, uint addr, int alen,
        int i;
        struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
+       if (!base)
+               return -ENODEV;
+
        ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
        if (ret < 0)
                return ret;
@@ -402,38 +417,43 @@ int bus_i2c_write(void *base, uchar chip, uint addr, int alen,
        return ret;
 }
 
-struct i2c_parms {
-       void *base;
-       void *idle_bus_data;
-       int (*idle_bus_fn)(void *p);
-};
-
-struct sram_data {
-       unsigned curr_i2c_bus;
-       struct i2c_parms i2c_data[3];
-};
-
 static void * const i2c_bases[] = {
-#if defined(CONFIG_MX25)
+#if defined(CONFIG_SOC_MX25)
        (void *)IMX_I2C_BASE,
        (void *)IMX_I2C2_BASE,
        (void *)IMX_I2C3_BASE
-#elif defined(CONFIG_MX27)
+#elif defined(CONFIG_SOC_MX27)
        (void *)IMX_I2C1_BASE,
        (void *)IMX_I2C2_BASE
-#elif defined(CONFIG_MX31) || defined(CONFIG_MX35) || \
-       defined(CONFIG_MX51) || defined(CONFIG_MX53) || \
-       defined(CONFIG_MX6)
+#elif defined(CONFIG_SOC_MX31) || defined(CONFIG_SOC_MX35) || \
+       defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53) || \
+       defined(CONFIG_SOC_MX6) || defined(CONFIG_LS102XA)
        (void *)I2C1_BASE_ADDR,
        (void *)I2C2_BASE_ADDR,
        (void *)I2C3_BASE_ADDR
-#elif defined(CONFIG_VF610)
+#elif defined(CONFIG_SOC_VF610)
        (void *)I2C0_BASE_ADDR
+#elif defined(CONFIG_FSL_LSCH3)
+       (void *)I2C1_BASE_ADDR,
+       (void *)I2C2_BASE_ADDR,
+       (void *)I2C3_BASE_ADDR,
+       (void *)I2C4_BASE_ADDR
 #else
 #error "architecture not supported"
 #endif
 };
 
+struct i2c_parms {
+       void *base;
+       void *idle_bus_data;
+       int (*idle_bus_fn)(void *p);
+};
+
+struct sram_data {
+       unsigned curr_i2c_bus;
+       struct i2c_parms i2c_data[ARRAY_SIZE(i2c_bases)];
+};
+
 void *i2c_get_base(struct i2c_adapter *adap)
 {
        return i2c_bases[adap->hwadapnr];
@@ -538,12 +558,17 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
                         mxc_i2c_set_bus_speed,
                         CONFIG_SYS_MXC_I2C2_SPEED,
                         CONFIG_SYS_MXC_I2C2_SLAVE, 1)
-#if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\
-       defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\
-       defined(CONFIG_MX6)
+#ifdef CONFIG_SYS_I2C_MXC_I2C3
 U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
                         mxc_i2c_read, mxc_i2c_write,
                         mxc_i2c_set_bus_speed,
                         CONFIG_SYS_MXC_I2C3_SPEED,
                         CONFIG_SYS_MXC_I2C3_SLAVE, 2)
 #endif
+#ifdef CONFIG_SYS_I2C_MXC_I2C4
+U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
+                        mxc_i2c_read, mxc_i2c_write,
+                        mxc_i2c_set_bus_speed,
+                        CONFIG_SYS_MXC_I2C4_SPEED,
+                        CONFIG_SYS_MXC_I2C4_SLAVE, 3)
+#endif