include/configs/cgtqmx6eval.h

   1 /*
   2  *
   3  * Congatec Conga-QEVAl board configuration file.
   4  *
   5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
   6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
   7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
   8  * Leo Sartre, <lsartre@adeneo-embedded.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_CGTQMX6EVAL_H
  14 #define __CONFIG_CGTQMX6EVAL_H
  15
  16 #include "mx6_common.h"
  17
  18 #define CONFIG_MACH_TYPE        4122
  19
  20 /* Size of malloc() pool */
  21 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  22
  23 #define CONFIG_BOARD_EARLY_INIT_F
  24 #define CONFIG_MISC_INIT_R
  25
  26 #define CONFIG_MXC_UART
  27 #define CONFIG_MXC_UART_BASE           UART2_BASE
  28
  29 /* MMC Configs */
  30 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
  31
  32 /* Miscellaneous commands */
  33 #define CONFIG_CMD_BMODE
  34
  35 /* Thermal support */
  36 #define CONFIG_IMX6_THERMAL
  37
  38 #define CONFIG_CMD_FUSE
  39 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
  40 #define CONFIG_MXC_OCOTP
  41 #endif
  42
  43 #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
  44
  45 #define CONFIG_EXTRA_ENV_SETTINGS \
  46         "script=boot.scr\0" \
  47         "image=zImage\0" \
  48         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  49         "boot_dir=/boot\0" \
  50         "console=ttymxc1\0" \
  51         "fdt_high=0xffffffff\0" \
  52         "initrd_high=0xffffffff\0" \
  53         "fdt_addr=0x18000000\0" \
  54         "boot_fdt=try\0" \
  55         "mmcdev=1\0" \
  56         "mmcpart=1\0" \
  57         "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
  58         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  59                 "root=${mmcroot}\0" \
  60         "loadbootscript=" \
  61                 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  62         "bootscript=echo Running bootscript from mmc ...; " \
  63                 "source\0" \
  64         "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
  65                 "${boot_dir}/${image}\0" \
  66         "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
  67                 "${boot_dir}/${fdt_file}\0" \
  68         "mmcboot=echo Booting from mmc ...; " \
  69                 "run mmcargs; " \
  70                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  71                         "if run loadfdt; then " \
  72                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  73                         "else " \
  74                                 "if test ${boot_fdt} = try; then " \
  75                                         "bootz; " \
  76                                 "else " \
  77                                         "echo WARN: Cannot load the DT; " \
  78                                 "fi; " \
  79                         "fi; " \
  80                 "else " \
  81                         "bootz; " \
  82                 "fi;\0"
  83
  84 #define CONFIG_BOOTCOMMAND \
  85            "mmc dev ${mmcdev};" \
  86            "mmc dev ${mmcdev}; if mmc rescan; then " \
  87                    "if run loadbootscript; then " \
  88                            "run bootscript; " \
  89                    "else " \
  90                            "if run loadimage; then " \
  91                                    "run mmcboot; " \
  92                            "else "\
  93                                    "echo ERR: Fail to boot from mmc; " \
  94                            "fi; " \
  95                    "fi; " \
  96            "else echo ERR: Fail to boot from mmc; fi"
  97
  98 #define CONFIG_SYS_MEMTEST_START       0x10000000
  99 #define CONFIG_SYS_MEMTEST_END         0x10010000
 100 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
 101
 102 /* Physical Memory Map */
 103 #define CONFIG_NR_DRAM_BANKS           1
 104 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 105 #define PHYS_SDRAM_SIZE                        (1u * 1024 * 1024 * 1024)
 106
 107 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
 108 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
 109 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 110
 111 #define CONFIG_SYS_INIT_SP_OFFSET \
 112         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 113 #define CONFIG_SYS_INIT_SP_ADDR \
 114         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 115
 116 /* Environment organization */
 117 #define CONFIG_ENV_SIZE                 (8 * 1024)
 118
 119 #define CONFIG_ENV_IS_IN_MMC
 120
 121 #define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
 122 #define CONFIG_SYS_MMC_ENV_DEV          0
 123
 124 #endif                         /* __CONFIG_CGTQMX6EVAL_H */