2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/sizes.h>
12 #include <asm/arch/imx-regs.h>
15 * Ka-Ro TX6 board - SoC configuration
18 #define CONFIG_SYS_MX6_HCLK 24000000
19 #define CONFIG_SYS_MX6_CLK32 32768
20 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
21 #define CONFIG_SHOW_ACTIVITY
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_BOARDINFO
24 #define CONFIG_BOARD_LATE_INIT
25 #define CONFIG_BOARD_EARLY_INIT_F
28 /* LCD Logo and Splash screen support */
31 #define CONFIG_SPLASH_SCREEN
32 #define CONFIG_SPLASH_SCREEN_ALIGN
33 #define CONFIG_VIDEO_IPUV3
34 #define CONFIG_IPUV3_CLK 266000000
35 #define CONFIG_LCD_LOGO
36 #define LCD_BPP LCD_COLOR24
37 #define CONFIG_CMD_BMP
38 #define CONFIG_VIDEO_BMP_RLE8
39 #endif /* CONFIG_LCD */
40 #endif /* CONFIG_MFG */
42 #ifdef CONFIG_SYS_LVDS_IF
49 * Memory configuration options
51 #define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
52 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
53 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
54 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
56 #define PHYS_SDRAM_1_WIDTH 64
58 #define PHYS_SDRAM_1_SIZE (SZ_512M * (PHYS_SDRAM_1_WIDTH / 32))
61 #define CONFIG_SYS_SDRAM_CLK 528
63 #define CONFIG_SYS_SDRAM_CLK 400
65 #define CONFIG_STACKSIZE SZ_128K
66 #define CONFIG_SYS_MALLOC_LEN SZ_8M
67 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
68 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
71 * U-Boot general configurations
73 #define CONFIG_SYS_LONGHELP
75 #define CONFIG_SYS_PROMPT "TX6Q U-Boot > "
77 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
79 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
80 #define CONFIG_SYS_PBSIZE \
81 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
82 /* Print buffer size */
83 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
84 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
85 /* Boot argument buffer size */
86 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
87 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
88 #define CONFIG_CMDLINE_EDITING /* Command history etc */
90 #define CONFIG_SYS_64BIT_VSPRINTF
91 #define CONFIG_SYS_NO_FLASH
94 * Flattened Device Tree (FDT) support
97 #define CONFIG_OF_LIBFDT
98 #ifdef CONFIG_OF_LIBFDT
99 #define CONFIG_FDT_FIXUP_PARTITIONS
100 #define CONFIG_OF_BOARD_SETUP
101 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
102 #endif /* CONFIG_OF_LIBFDT */
103 #endif /* CONFIG_MFG */
108 #define xstr(s) str(s)
110 #define __pfx(x, s) (x##s)
111 #define _pfx(x, s) __pfx(x, s)
113 #define CONFIG_CMDLINE_TAG
114 #define CONFIG_INITRD_TAG
115 #define CONFIG_SETUP_MEMORY_TAGS
117 #define CONFIG_BOOTDELAY 1
119 #define CONFIG_BOOTDELAY 0
121 #define CONFIG_ZERO_BOOTDELAY_CHECK
122 #define CONFIG_SYS_AUTOLOAD "no"
124 #define CONFIG_BOOTFILE "uImage"
125 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
126 #define CONFIG_BOOTCOMMAND "run bootcmd_${boot_mode} bootm_cmd"
128 #define CONFIG_BOOTCOMMAND "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
129 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
130 #define CONFIG_DELAY_ENVIRONMENT
131 #endif /* CONFIG_MFG */
132 #define CONFIG_LOADADDR 18000000
133 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
134 #define CONFIG_IMX_WATCHDOG
135 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
141 #ifdef CONFIG_ENV_IS_NOWHERE
142 #define CONFIG_EXTRA_ENV_SETTINGS \
146 "fdtaddr=11000000\0" \
147 "mtdids=" MTDIDS_DEFAULT "\0" \
148 "mtdparts=" MTDPARTS_DEFAULT "\0"
150 #define CONFIG_EXTRA_ENV_SETTINGS \
152 "baseboard=stk5-v3\0" \
153 "bootargs_jffs2=run default_bootargs;set bootargs ${bootargs}" \
154 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
155 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
156 " root=/dev/mmcblk0p2 rootwait\0" \
157 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
158 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
160 "bootargs_ubifs=run default_bootargs;set bootargs ${bootargs}" \
161 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
162 "bootcmd_jffs2=set autostart no;run bootargs_jffs2" \
164 "bootcmd_mmc=set autostart no;run bootargs_mmc" \
165 ";fatload mmc 0 ${loadaddr} uImage\0" \
166 "bootcmd_nand=set autostart no;run bootargs_ubifs" \
168 "bootcmd_net=set autoload y;set autostart n;run bootargs_nfs" \
170 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
173 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
174 " ${append_bootargs}\0" \
175 "fdtaddr=11000000\0" \
176 "fdtsave=nand erase.part dtb" \
177 ";nand write ${fdtaddr} dtb ${fdtsize}\0" \
178 "mtdids=" MTDIDS_DEFAULT "\0" \
179 "mtdparts=" MTDPARTS_DEFAULT "\0" \
180 "nfsroot=/tftpboot/rootfs\0" \
181 "otg_mode=device\0" \
182 "touchpanel=tsc2007\0" \
184 #endif /* CONFIG_ENV_IS_NOWHERE */
185 #endif /* CONFIG_MFG */
187 #define MTD_NAME "gpmi-nand"
188 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
189 #define CONFIG_SYS_NAND_ONFI_DETECTION
194 #include <config_cmd_default.h>
195 #define CONFIG_CMD_CACHE
196 #define CONFIG_CMD_MMC
197 #define CONFIG_CMD_NAND
198 #define CONFIG_CMD_MTDPARTS
199 #define CONFIG_CMD_BOOTCE
200 #define CONFIG_CMD_TIME
201 #define CONFIG_CMD_I2C
202 #define CONFIG_CMD_MEMTEST
207 #define CONFIG_MXC_UART
208 #define CONFIG_MXC_UART_BASE UART1_BASE
209 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
210 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
211 #define CONFIG_SYS_CONSOLE_INFO_QUIET
216 #define CONFIG_MXC_GPIO
221 #define CONFIG_FEC_MXC
222 #ifdef CONFIG_FEC_MXC
223 /* This is required for the FEC driver to work with cache enabled */
224 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
225 #define CONFIG_SYS_CACHELINE_SIZE 64
227 #define IMX_FEC_BASE ENET_BASE_ADDR
228 #define CONFIG_FEC_MXC_PHYADDR 0
229 #define CONFIG_PHYLIB
230 #define CONFIG_PHY_SMSC
232 #define CONFIG_FEC_XCV_TYPE RMII
233 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
234 #define CONFIG_CMD_MII
235 #define CONFIG_CMD_DHCP
236 #define CONFIG_CMD_PING
237 /* Add for working with "strict" DHCP server */
238 #define CONFIG_BOOTP_SUBNETMASK
239 #define CONFIG_BOOTP_GATEWAY
240 #define CONFIG_BOOTP_DNS
246 #ifdef CONFIG_CMD_I2C
247 #define CONFIG_HARD_I2C
248 #define CONFIG_I2C_MXC
249 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
250 #define CONFIG_SYS_I2C_MX6_PORT1
251 #define CONFIG_SYS_I2C_SPEED 400000
252 #define CONFIG_SYS_I2C_SLAVE 0x3c
255 #ifndef CONFIG_ENV_IS_NOWHERE
256 /* define one of the following options:
257 #define CONFIG_ENV_IS_IN_NAND
258 #define CONFIG_ENV_IS_IN_MMC
260 #define CONFIG_ENV_IS_IN_NAND
262 #define CONFIG_ENV_OVERWRITE
267 #ifdef CONFIG_CMD_NAND
268 #define CONFIG_MTD_DEVICE
270 #define CONFIG_MTD_DEBUG
271 #define CONFIG_MTD_DEBUG_VERBOSE 4
273 #define CONFIG_NAND_MXS
274 #define CONFIG_NAND_MXS_NO_BBM_SWAP
275 #define CONFIG_APBH_DMA
276 #define CONFIG_APBH_DMA_BURST
277 #define CONFIG_APBH_DMA_BURST8
278 #define CONFIG_CMD_NAND_TRIMFFS
279 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
280 #define CONFIG_SYS_MAX_FLASH_BANKS 1
281 #define CONFIG_SYS_NAND_MAX_CHIPS 1
282 #define CONFIG_SYS_MAX_NAND_DEVICE 1
283 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
284 #define CONFIG_SYS_NAND_USE_FLASH_BBT
285 #define CONFIG_SYS_NAND_BASE 0x00000000
286 #define CONFIG_CMD_ROMUPDATE
288 #undef CONFIG_ENV_IS_IN_NAND
289 #endif /* CONFIG_CMD_NAND */
291 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
292 #define CONFIG_ENV_SIZE SZ_128K
293 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
294 #ifdef CONFIG_ENV_OFFSET_REDUND
295 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
297 xstr(CONFIG_SYS_ENV_PART_SIZE) \
299 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
301 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
303 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
304 #endif /* CONFIG_ENV_OFFSET_REDUND */
309 #ifdef CONFIG_CMD_MMC
311 #define CONFIG_GENERIC_MMC
312 #define CONFIG_FSL_ESDHC
313 #define CONFIG_FSL_USDHC
314 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
316 #define CONFIG_DOS_PARTITION
317 #define CONFIG_CMD_FAT
318 #define CONFIG_CMD_EXT2
321 * Environments on MMC
323 #ifdef CONFIG_ENV_IS_IN_MMC
324 #define CONFIG_SYS_MMC_ENV_DEV 0
325 #undef CONFIG_ENV_OFFSET
326 #undef CONFIG_ENV_SIZE
327 /* Associated with the MMC layout defined in mmcops.c */
328 #define CONFIG_ENV_OFFSET SZ_1K
329 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
330 #define CONFIG_DYNAMIC_MMC_DEVNO
331 #endif /* CONFIG_ENV_IS_IN_MMC */
333 #undef CONFIG_ENV_IS_IN_MMC
334 #endif /* CONFIG_CMD_MMC */
336 #ifdef CONFIG_ENV_IS_NOWHERE
337 #undef CONFIG_ENV_SIZE
338 #define CONFIG_ENV_SIZE SZ_4K
341 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
342 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
343 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
345 CONFIG_SYS_ENV_PART_STR \
346 "4m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
347 xstr(CONFIG_SYS_DTB_PART_SIZE) \
349 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
350 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
352 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
353 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
354 GENERATED_GBL_DATA_SIZE)
356 #endif /* __CONFIG_H */